CN110955565A - Server and error detection method thereof - Google Patents

Server and error detection method thereof Download PDF

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Publication number
CN110955565A
CN110955565A CN201811130551.4A CN201811130551A CN110955565A CN 110955565 A CN110955565 A CN 110955565A CN 201811130551 A CN201811130551 A CN 201811130551A CN 110955565 A CN110955565 A CN 110955565A
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China
Prior art keywords
debug
port
bmc
server
switch
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Pending
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CN201811130551.4A
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Chinese (zh)
Inventor
吴宜桦
陈亿信
刘仲轩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitac Computer Shunde Ltd
Shencloud Technology Co Ltd
Shunda Computer Factory Co Ltd
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Shencloud Technology Co Ltd
Shunda Computer Factory Co Ltd
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Application filed by Shencloud Technology Co Ltd, Shunda Computer Factory Co Ltd filed Critical Shencloud Technology Co Ltd
Priority to CN201811130551.4A priority Critical patent/CN110955565A/en
Publication of CN110955565A publication Critical patent/CN110955565A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2215Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention provides a server and a debugging method thereof, wherein the debugging method of the server comprises a complex programmable logic device for receiving a control signal generated by a switching element and generating a switching signal, and a bus switch for switching a communication port to be communicated and connected with a debugging port or a serial port of a substrate management controller according to the switching signal so as to complete debugging work or receive industrial control application information at the communication port.

Description

Server and error detection method thereof
Technical Field
The present invention relates to a server and a fault detection method thereof, and more particularly, to a server capable of performing fault detection outside a server casing and a fault detection method thereof.
Background
A general server includes a motherboard, and the motherboard further includes a Basic Input/Output System (BIOS). The BIOS is used for initializing the hardware of the server, managing hardware materials, shielding platform characteristics and guiding an operating system, and is a bridge for connecting the basic hardware of the computer and system software. In addition, the BIOS also has access and control capabilities for computer hardware, and therefore, a debug socket is usually configured on the motherboard for debugging during the boot process. When the debugger wants to remove the error, the shell of the server must be opened, and the debug information is received through a debug socket connected in the shell to carry out debugging. However, this debugging method must be performed by opening the chassis, which is not in line with the debugging efficiency required by the debugging personnel.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a server capable of performing error detection outside a server casing and an error detection method thereof.
To solve the above technical problem, a server comprises a housing, a switch, a complex programmable logic device, a baseboard management controller, a debug socket, a communication port and a bus switch. The switching piece is arranged on the outer surface of the shell and used for generating a control signal. The complex programmable logic device is arranged in the shell and coupled to the switching piece, and receives the control signal and generates a switching signal. The baseboard management controller is disposed in the housing and coupled to the complex programmable logic device, and the baseboard management controller has a debug port and a serial port. The debugging socket is arranged in the shell and is coupled with a debugging port of the substrate management controller. The communication port is arranged on the outer surface of the shell and is coupled with the substrate management controller. The bus switch is arranged in the casing and is respectively coupled with the complex programmable logic device, the debugging port, the serial port and the communication port, and is used for switching the communication port to be in communication connection with the debugging port or the serial port of the substrate management controller according to a switching signal.
Preferably, the switching member is a warning light emitting member.
Preferably, the server further comprises an asynchronous transceiver, and the debug socket is coupled to the bmc through the asynchronous transceiver.
Preferably, the communication port is an RS232 communication port.
Preferably, the complex programmable logic device, the baseboard management controller, the debug socket and the bus switch are arranged on a mainboard.
To solve the above technical problem, a method for debugging a server includes: the complex programmable logic device receives the control signal generated by the switching piece and generates a switching signal according to the control signal; the bus switch switches the communication port to be connected with one of the debugging port and the serial port of the substrate management controller according to the switching signal.
Preferably, the debug port and the debug socket of the bmc are in bidirectional communication, and the debug port and the communication port of the bmc are in bidirectional communication.
Preferably, the baseboard management controller is in one-way communication with the serial port, and the baseboard management controller outputs industrial control application information to the serial port.
Preferably, the complex programmable logic device judges that the duration of the control signal generated by the switching piece accords with a specific time and generates the switching signal according to the judgment result.
Preferably, the debug port of the bmc is further communicatively connected to the debug socket, the bmc transmits a first debug message to the debug socket via the debug port, the bmc transmits a second debug message to the communication port, and the first debug message and the second debug message are not identical.
Compared with the prior art, the server and the debugging method thereof can advance the timing sequence of the debugging work to the time after the normal operation of the substrate management controller and before the basic input and output system is not operated. Besides, different detection requirements can be met, and because the basic input and output system is not operated, the machine does not need to be restarted after the debugging work, so that the debugging efficiency can be improved.
[ description of the drawings ]
Fig. 1 is a block diagram illustrating a server according to an embodiment of the present invention.
Fig. 2 is a flowchart illustrating an embodiment of a server debug method according to the present invention.
[ detailed description ] embodiments
Referring to fig. 1, fig. 1 is a block diagram illustrating a server according to an embodiment of the present invention. Fig. 1 shows a server at least including a housing 10, a switch 20, a Complex Programmable logic device 30 (CPLD), a Baseboard management controller 40 (BMC), a debug socket 50, a communication port 60, and a Bus switch 70(Bus switch). Switch 20 and communication port 60 are disposed on the outer surface of chassis 10, and complex programmable logic device 30, bmc 40, debug socket 50 and bus switch 60 are disposed within chassis 10. And the bus switch 60 is coupled to the complex programmable logic device 30, the bmc 40, the debug socket 50 and the communication port 60, respectively.
Further, in one embodiment, the bmc 40 includes a debug port 41 and a serial (serial over Lan) port 42, the bus switch 60 is coupled to the debug port 41 and the serial port 42 of the bmc 40, respectively, and the debug socket 50 is coupled to the debug port 41.
Here, the control signal is generated by the switch 20 on the outer surface of the casing 10, the complex programmable logic device 30 receives the control signal transmitted by the switch 20 on the outer surface of the casing 10 and generates a switching signal, and the bus switch 70 switches the communication port 60 to be communicatively connected to the debug port 41 or the serial port 42 of the board management controller 40 according to the switching signal. Thus, the debug information outputted from the debug port 41 or the industrial control application information outputted from the serial port 42 can be received through the communication port 60 on the outer surface of the housing 10.
Referring to fig. 1, in an embodiment, the complex programmable logic device 30, the bmc 40, the debug socket 50 and the bus switch 70 disposed in the casing 10 are disposed on a Motherboard (Motherboard) and electrically connected to each other through a circuit on the Motherboard. In other embodiments, the bmc 40 is a bmc interface card, and herein, the bmc interface card is inserted into an interface card slot of the motherboard to electrically connect with the motherboard. The invention is not limited to the foregoing embodiments.
In one embodiment, the switch 20 is an existing element on the server housing 10, that is, the switch 20 has an existing first function in the server, and in this embodiment, the switch 20 is given a second function. In this embodiment, the server includes a plurality of switches 20, each switch 20 corresponds to a hard disk or an electronic device in the server or corresponds to a motherboard of the server, and pressing the switch 20 can control whether the alarm light-emitting element of the switch 20 emits light, for example, when the alarm light-emitting element does not emit light, pressing the switch 20 can cause the alarm light-emitting element to emit light, and when the alarm light-emitting element emits light, pressing the switch can cause the alarm light-emitting element to switch state and to present a non-light state. Therefore, after the server maintenance personnel maintain or detect the hard disk or the electronic device in the server, the luminous state of the switching element 20 can be changed to be used as a mark, so that the server maintenance personnel can quickly observe the maintenance or detection state of the hard disk or the electronic device. Here, the function of pressing the switch 20 to change the lighting state is the existing function (first function) of the switch 20 in the server.
In this embodiment, referring to fig. 2, the complex programmable logic device 30 receives the control signal from the switch 20 and generates a switch signal (step S11). Specifically, the control signal is generated when the switch 20 is pressed, the complex programmable logic device 30 receives the control signal and determines whether the continuous generation time of the control signal from the switch 20 indicates that the switch 20 is pressed for a long time, that is, when the switch 20 is pressed for a continuous generation time, the switch 20 generates the control signal corresponding to the continuous generation time, the complex programmable logic device 30 receives the control signal and compares the continuous generation time of the continuously generated control signal according to a specific time to determine whether the switch 20 is pressed for a long time, when the continuous generation time meets the specific time, the switch 20 is determined to be pressed for a long time, at this time, the complex programmable logic device 30 determines that the switch 20 is pressed for a long time according to the determination result to generate the switch signal, when the continuous generation time does not meet the specific time, the complex programmable logic device 30 determines that the switch 20 is not pressed for a long time, but does not generate the switching signal, and the switch 20 switches the state of the warning light emitting element to emit light according to the pressing that does not reach the specific time. Here, the switching member 20 used in the present case has two functions. In this embodiment, the complex programmable logic device 30 can determine whether the duration of the control signal generated by the switching element 20 continuously reaches or exceeds the specific time, for example, the specific time is 3 seconds, and generate the switching signal when the duration of the control signal generated by the switching element 20 continuously corresponds to 3 seconds.
With continued reference to FIG. 1, in one embodiment, the complex programmable logic device 30 has a plurality of General Purpose Input/Output (GPIO) pins 31. Here, the complex programmable logic device 30 at least includes a first general purpose input/output pin 31A and a second general purpose input/output pin 31B.
In one embodiment, the switch 20 is coupled to the complex programmable logic device 30, and the first general input/output pin 31A is used for receiving the control signal generated by the switch 20, and the second general input/output pin 31B is used for outputting the switching signal.
The baseboard management controller 40 is mainly used for managing the servers. Further, the bmc 40 may receive a motherboard power-on detection signal during the power-on process of the server and may output debug information with a hardware debug detection signal through the debug port 41. In one embodiment, the bmc 40 is coupled to the debug socket 50 through a UART (Universal Asynchronous Receiver/Transmitter) via the debug port 41. Therefore, the asynchronous transceiver can communicate with the outside stably through its own characteristics of low voltage and stable speed, that is, the debugging information with the hardware debugging detection signal can be outputted to the outside stably, and the programming signal inputted from the debugging socket 50 can be received stably. Specifically, the debug socket 50 located in the chassis 10 is in normal communication with the bmc 40 to provide debug information in normal.
Further, the debug port 41 of the bmc 40 is a port with bidirectional communication capability and can output debug information with hardware debug detection signals and accept programming signals input by engineering personnel. While serial port 42 is a unidirectional port having only output signal capability. In this embodiment, the switching of the bus switch 60 is matched to allow the communication port 60 to transmit the programming signal inputted to the debug port 41 of the bmc 40 through the communication port 60 and receive the debug information with the hardware debug detection signal outputted from the debug port 41 through the communication port 60 or receive the industrial control application information from the serial port 42 through the communication port 60, for example, receive the industrial control application information from the serial port 42 and output the industrial control application information to the barcode machine, printer, modem, plotter or joystick device connected to the communication port 60 through the communication port 60.
Based on the above, when the user wants to detect the error, the complex programmable logic device 30 determines whether the continuous generation time of the control signal continuously generated by the switch 20 matches the specific time as long as the switch 20 is continuously pressed for the specific time. When the complex programmable logic device 30 determines that the continuous generation time of the control signal generated continuously by the continuous pressing of the switch 20 matches the specific time, the complex programmable logic device 30 generates the switching signal according to the determination result. The bus switch 70 switches the communication port 60 to be communicatively connected to one of the debug port 41 and the serial port 42 of the bmc 40 according to the switching signal (step S12). Thus, the user can perform error detection or receive industrial control application information through the communication port 60 (step S13).
Specifically, the user can switch the connection between the communication port 60 and the debug port 41 of the bmc 40 through the bus switch 70 to perform a debug mode, i.e. the communication port 60 receives the debug information outputted from the debug port 41 by the bmc 40 and the communication port 60 transmits the programming signal to the debug port 41 of the bmc 40, or the bus switch 70 is switched to connect the communication port 60 and the serial port 42 of the bmc 40 to perform a serial mode, i.e. the communication port 60 receives the industrial control application information outputted from the serial port 41 of the bmc 40 and the communication port 60 outputs the industrial control application information.
In detail, when the switch 20 is not continuously pressed for the specific time, the debug socket 50 is communicatively connected to the bmc 40, and the user can receive the debug information through the debug socket 50. After the switch 20 is continuously pressed for the specific time, the complex programmable logic device 30 generates the switch signal, and the bus switch 70 switches the communication port 60 to be communicatively connected to the debug port 41 of the bmc 40. Thus, the user can receive the debug information through the communication port 60 on the outer surface of the casing 10, and the debug can be performed quickly and conveniently without opening the casing 10. Furthermore, for the whole server, since the user does not need to open the casing 10 during debugging, the probability that the original precise wiring or routing in the casing 10 is damaged or changed is reduced, and the stability of the server can be ensured.
Still further, in some embodiments, in order to control the content of the debug information provided to the general user, the bmc 40 outputs the first debug information from the debug port 41 to the debug socket 50; the bmc 40 outputs the second debug message from the debug port 41 to the communication port 60; and the first error detection information and the second error detection information are not identical. That is, since the communication port 60 located on the outer surface of the housing 10 is mostly a general consumer or user, the debug information outputted to the communication port 60 by the bmc 40 is consistent with general information required by the general consumer or user. Specifically, the debug information output by the bmc 40 from the debug port 41 to the debug socket 50 may include more debug information than the debug information output to the communication port 60, so as to facilitate advanced debugging or programming by high-level engineers or programmers.
In addition, the debug information outputted from the debug port 41 by the bmc 40 is also larger than the industrial application information outputted from the serial port 42 by the bmc 40. Specifically, the bmc 40 is responsible for monitoring and managing the operating status of the servers and can access the operating information data of the servers, wherein the industry control application information and the debugging information come from the bmc 40, but the serial port 42 is a unidirectional port with only signal output capability, so the industry control application information content output by the serial port 42 of the bmc 40 is specific and limited.
Since the debug port 41 is a port with bidirectional communication capability, the bmc 40 can request the bmc 40 to obtain other non-predetermined information through the programming signal in addition to the predetermined information outputted from the debug port 41. Therefore, the debug information output by the debug port 41 of the bmc 40 is more than the industrial application information output by the serial port 42 of the bmc 40.
Further, in the present embodiment, the debug information outputted from the debug port 41 to the debug socket 50 or the communication port 60 of the bmc 40 is not determined by the bmc 40 itself, but is determined by switching the bus switch 70.
Therefore, in order to allow the bmc 40 to output the debug information to the debug socket 51 or the communication port 60 and determine that part of the locked/restricted/marked data cannot be sent out through the communication port 60. In this embodiment, the bmc 40 may determine whether the bus switch 70 will switch the communication port 60 to be communicatively connected to the debug port 41 of the bmc 40. Specifically, by making the bmc 40 obtain the same switching signal for switching the communication port 60 of the bus switch 70, the bmc 40 can determine whether the bus switch 70 will switch the communication port 60 to be communicatively connected to the debug port 41 of the bmc 40, so that the data partially locked/limited/marked according to the determination can not be sent from the debug port 41, that is, when it is determined that the bus switch 70 switches the communication port 60 to be communicatively connected to the debug port 41 of the bmc 40, the bmc 40 locks part of the locked/defined/noted data, so that the partially locked/restricted/marked data cannot be sent out through the debug port 41, thereby preventing the portion of the locked/restricted/marked data from being sent out of the communication port 60.
In one embodiment, the bmc 40 also has a timer, so that when determining whether the switch 20 is pressed for a long time, the complex programmable logic device 30 can determine whether the switch 20 is pressed for a long time and then transmit the switch signal to the bus switch 70 and the bmc 40 at the same time, so that the bmc 40 can obtain the same switch signal as the bus switch 70, and can determine whether the bus switch 70 will switch the communication port 60 to be communicatively connected to the debug port 41.
In another embodiment, it may be determined directly by the bmc 40, where the switch 20 outputs the control signal to the cpld 30 and the bmc 40 at the same time, and the cpld 30 and the bmc 40 respectively determine whether the duration of the control signal matches a specific time, and generate the same switching signal according to the determination result, so that the bmc 40 can obtain the same switching signal as that transmitted to the bus switch 70 by the cpld 30, and can determine whether the bus switch 70 will switch the communication port 60 to be communicatively connected to the debug port 41.
It should be noted that, since the complex programmable logic device 30 controls the power-on sequence of each electronic component in the server, the complex programmable logic device 30 is in an operable state when the server is in a standby state (the boot-up procedure is not completed). In this way, the control signal can be generated by pressing the switch 20 in the standby state of the server, and the complex programmable logic device 30 can also determine whether the control signal is in accordance with the expectation in this state to generate the switch signal.
Therefore, the boot program of the general server is to start the bmc 40 first, and then start the bios after the bmc 40 operates normally, so as to complete the start of the entire os. Therefore, if the server needs to detect errors before the bios is started after the bmc 40 is normally operated, since the complex programmable logic device 30 can determine whether the control signal is expected to generate the switching signal, the bmc 40 can be communicatively connected to the communication port 60 through the switch 20 in this state, so that the user can receive the debug information through the communication port 60 on the outer surface of the chassis 10.
In summary, the server and the fault detection method thereof of the present invention can advance the timing of the fault detection operation to the time after the bmc 40 normally operates and before the bios is not operated. Besides, different detection requirements can be met, and because the basic input and output system is not operated, the machine does not need to be restarted after the debugging work, so that the debugging efficiency can be improved.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (11)

1. A server, comprising:
a housing;
a switching piece arranged on the outer surface of the shell and used for generating a control signal;
a complex programmable logic device, which is arranged in the shell and coupled with the switching piece, receives the control signal and generates a switching signal;
a baseboard management controller disposed in the housing and coupled to the complex programmable logic device, the baseboard management controller having a debug port and a serial port;
a debug socket disposed in the housing and coupled to the debug port of the baseboard management controller;
a communication port arranged on the outer surface of the shell and coupled with the substrate management controller; and
a bus switch disposed in the housing and coupled to the complex programmable logic device, the debug port, the serial port and the communication port respectively, for switching the communication port to be communicatively connected to the debug port or the serial port of the bmc according to the switching signal.
2. The server according to claim 1, wherein the switching element is an alarm light emitting element.
3. The server of claim 1, further comprising an asynchronous transceiver, the debug socket coupled to the bmc via the asynchronous transceiver.
4. The server according to claim 1, wherein the communication port is an RS232 communication port.
5. The server of claim 1, wherein the MCCH, the BMC, the debug socket, and the bus switch are disposed on a motherboard.
6. A method for debugging a server, comprising:
a complex programmable logic device receives a control signal generated by a switching piece and generates a switching signal according to the control signal; and
a bus switch switches a communication port to be communicatively connected to one of a debug port and a serial port of a BMC according to the switching signal.
7. The method of claim 6, wherein the debug port of the BMC is in two-way communication with a debug socket, and the debug port of the BMC is in two-way communication with the communication port.
8. The method of claim 6, wherein the baseboard management controller communicates with the serial port in a single direction, and the baseboard management controller outputs information to the serial port.
9. The method of claim 6, wherein the BMC outputs a debug message via the debug port, and the BMC outputs an application message via the serial port, wherein the debug message is larger than the application message.
10. The method of claim 6, wherein the CPLD determines the duration of the control signal from the switch to be a specific time and generates the switch signal according to the determination result.
11. The method of claim 6, wherein the debug port of the BMC is further communicatively connected to a debug socket, the BMC sends a first debug message to the debug socket, the BMC sends a second debug message to the communication port, and the first debug message and the second debug message are not identical.
CN201811130551.4A 2018-09-27 2018-09-27 Server and error detection method thereof Pending CN110955565A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113411212A (en) * 2021-06-16 2021-09-17 英业达科技有限公司 BIOS control system of intelligent network card and BIOS control method of intelligent network card
CN113760612A (en) * 2020-06-05 2021-12-07 佛山市顺德区顺达电脑厂有限公司 Server debugging method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW523657B (en) * 2001-07-06 2003-03-11 Inventec Corp Method for serial port debug during system power off or standby
CN101739320A (en) * 2008-11-27 2010-06-16 英业达股份有限公司 Error detection device of server and error detection method thereof
CN101930381A (en) * 2009-06-22 2010-12-29 英业达股份有限公司 Debugging system of server
CN104182309A (en) * 2013-05-23 2014-12-03 英业达科技有限公司 Debugging device and debugging method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW523657B (en) * 2001-07-06 2003-03-11 Inventec Corp Method for serial port debug during system power off or standby
CN101739320A (en) * 2008-11-27 2010-06-16 英业达股份有限公司 Error detection device of server and error detection method thereof
CN101930381A (en) * 2009-06-22 2010-12-29 英业达股份有限公司 Debugging system of server
CN104182309A (en) * 2013-05-23 2014-12-03 英业达科技有限公司 Debugging device and debugging method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113760612A (en) * 2020-06-05 2021-12-07 佛山市顺德区顺达电脑厂有限公司 Server debugging method
CN113411212A (en) * 2021-06-16 2021-09-17 英业达科技有限公司 BIOS control system of intelligent network card and BIOS control method of intelligent network card
CN113411212B (en) * 2021-06-16 2023-02-03 英业达科技有限公司 BIOS control system of intelligent network card and BIOS control method of intelligent network card

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