CN110911352B - Diffusion barrier layer for Cu interconnection and preparation method and application thereof - Google Patents
Diffusion barrier layer for Cu interconnection and preparation method and application thereof Download PDFInfo
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 72
- 230000004888 barrier function Effects 0.000 title claims abstract description 41
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 238000000137 annealing Methods 0.000 claims abstract description 18
- 229910007948 ZrB2 Inorganic materials 0.000 claims abstract description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 27
- 238000004544 sputter deposition Methods 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 16
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000013077 target material Substances 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 10
- 239000011261 inert gas Substances 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 7
- 238000005202 decontamination Methods 0.000 claims description 6
- 230000003588 decontaminative effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 238000004321 preservation Methods 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 abstract description 7
- 229910052751 metal Inorganic materials 0.000 abstract description 7
- 229910052707 ruthenium Inorganic materials 0.000 abstract description 7
- 230000000694 effects Effects 0.000 abstract description 5
- WCCJDBZJUYKDBF-UHFFFAOYSA-N copper silicon Chemical compound [Si].[Cu] WCCJDBZJUYKDBF-UHFFFAOYSA-N 0.000 abstract description 4
- 230000002035 prolonged effect Effects 0.000 abstract description 4
- 239000013078 crystal Substances 0.000 abstract description 3
- 239000000126 substance Substances 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 28
- 239000000523 sample Substances 0.000 description 11
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
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- 230000007547 defect Effects 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910017758 Cu-Si Inorganic materials 0.000 description 2
- 229910017931 Cu—Si Inorganic materials 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910018067 Cu3Si Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
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- 238000000024 high-resolution transmission electron micrograph Methods 0.000 description 1
- 238000002173 high-resolution transmission electron microscopy Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
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- 239000002957 persistent organic pollutant Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 238000010183 spectrum analysis Methods 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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Abstract
The invention discloses a diffusion impervious layer for Cu interconnection and a preparation method and application thereof, which are applied to ZrB2The film is doped with Ru atoms with different contents, so that the crystal structure of the film is changed, a rapid diffusion channel of Cu atoms is eliminated, a diffusion path is prolonged, and the high-temperature stability of the diffusion barrier layer is improved. In addition, the metal Ru has lower resistivity, exists in the diffusion barrier layer in a simple substance metal form, can improve the conductivity of Zr-Ru-B, and Ru atoms are difficult to oxidize compared with Zr atoms, so that the doping of O elements is reduced, a large number of holes are formed on the surface of a Cu film through high-temperature annealing treatment, a copper-silicon high-resistance phase is generated, the scattering effect of the surface of a sample on electrons is enhanced, the obtained Zr-Ru-B ternary structure has better high-temperature stability, the diffusion barrier property of the diffusion barrier layer is improved, the reliability of a Cu interconnection line is further improved, and the service life of an integrated circuit is prolonged.
Description
Technical Field
The invention belongs to the technical field of super-large-scale integrated circuit manufacturing, and particularly relates to a diffusion barrier layer for Cu interconnection and a preparation method thereof.
Background
The Cu metal wire has lower resistivity, high temperature stability, high thermal conductivity and excellent electromigration resistance, so that the Cu metal wire is a mainstream interconnection material instead of the traditional Al lead wire. Although Cu lines are the most promising interconnect leads for very large scale integrated circuits, they have their own shortcomings: firstly, the Cu can react with Si or a low-k dielectric layer at the temperature lower than 200 ℃ to generate high-resistance copper-silicon phase Cu3Si, which leads to an increase in the resistance of the entire interconnect system and can damage the interconnect system, which ultimately leads to device failure, and Cu can diffuse into Si rapidly (diffusion coefficient D)Cu＝4.7×10- 3cm2·s-1) Causing deep well defects and reducing minority carrier lifetime; secondly, the bonding performance of Cu and a Si substrate is poor, the peeling between a film layer and the substrate is easy to occur, and the defects obviously limit the application of the Cu interconnection line in the ultra-large scale integrated circuit.
The best solution is to use Cu and Si or SiO2Between the layers is added a Diffusion Barrier (DB), referred to as Diffusion Barrier (Barrier), which on the one hand prevents Cu from diffusing into Si or SiO2One in the otherThe aspect can enhance the bonding strength between Cu and the dielectric layer. In addition to Cu interconnects, diffusion barriers have also found application in chip packaging. Therefore, the problems of selecting materials for the diffusion barrier layer material and how to select the optimal preparation process become hot spots for research.
Among the alternatives for the diffusion barrier, borides have very excellent physical properties, such as low resistivity, high melting point, good chemical stability, and excellent mechanical properties. In particular a binary compound ZrB2Inherently having a lower resistivity (4.6 μ Ω. cm) and a higher melting point (3245 ℃ C.). In addition, ZrB2Can be epitaxially grown on Si (111), 4H-SiC (0001), GaN (0001) and Si (001) substrates, has small lattice mismatch, is favorable for structural stability and inhibits atoms from being in ZrB2Medium high temperature diffusion. Wang P et al deposited ZrB on graphene substrates using CVD techniques2The results show that ZrB was produced2The structure is a polycrystalline structure, and the internal structure is loose. This provides a rapid diffusion path for Cu atoms, and the barrier effect is poor, and in addition, the structural porosity increases the resistivity.
Disclosure of Invention
The invention aims to provide a diffusion impervious layer for Cu interconnection and a preparation method thereof, which overcome the defects of the existing method.
In order to achieve the purpose, the invention adopts the following technical scheme:
a preparation method of a diffusion impervious layer for Cu interconnection comprises the following steps:
step 1), performing decontamination treatment on the surface of a silicon substrate;
step 2), co-sputtering Ru target and ZrB on the surface of the silicon substrate subjected to decontamination treatment by magnetron sputtering2The sputtering power of the Ru target is 20-50W and ZrB2The sputtering power of the target is 100-150W; the co-sputtering time is 1200-1800 s, and the Zr-Ru-B diffusion impervious layer film is obtained.
Further, the magnetron sputtering in the step 2) is carried out in a vacuum inert gas atmosphere.
Furthermore, Ne gas or Ar gas is used as the inert gas, the flow rate of the inert gas is 20-30 sccm, and the working pressure is 0.3-0.5 Pa.
Further, the background vacuum degree of the sputtering chamber for magnetron sputtering is 1.0 multiplied by 10-4～6.0×10-4Pa。
Further, Ru target and ZrB2The purity of the target material is 99.99 percent.
Further, the Ru target material adopts radio frequency magnetron sputtering, ZrB2The target material adopts direct current magnetron sputtering.
The thickness of the diffusion impervious layer film for Cu interconnection is 3-10 nm.
A preparation method of a Cu interconnection lead layer based on a diffusion impervious layer for Cu interconnection comprises the following steps:
step 1), preparing and forming a Zr-Ru-B diffusion impervious layer on the surface of a silicon substrate;
and 2) carrying out magnetron sputtering of a Cu target on the Zr-Ru-B diffusion barrier layer to form a Cu lead layer, and then carrying out high-temperature annealing to obtain a Cu interconnection lead layer containing the Zr-Ru-B diffusion barrier layer, wherein the annealing temperature is 300-700 ℃, and the heat preservation time is 30-60 min.
Further, the Cu target is deposited by direct current sputtering, the magnetron sputtering deposition power is 100-130W, and the deposition pressure is 0.2-0.5 Pa.
Compared with the prior art, the invention has the following beneficial technical effects:
the invention provides a preparation method of a diffusion impervious layer for Cu interconnection, which is characterized in that ZrB is adopted2The film is doped with Ru atoms, so that the crystal structure of the film is changed, a rapid diffusion channel of Cu atoms is eliminated, a diffusion path is prolonged, and the high-temperature stability of the diffusion barrier layer is improved.
A Cu interconnection lead layer based on diffusion impervious layer for Cu interconnection is prepared through preparing ZrB2The Ru atoms are doped into the thin film, so that the crystal structure of the thin film is changed, a rapid diffusion channel of Cu atoms is eliminated, a diffusion path is prolonged, the high-temperature stability of the diffusion barrier layer is improved, the metal Ru has lower resistivity, and exists in the diffusion barrier layer in a simple substance metal form, so that the conductivity of Zr-Ru-B can be improved, and compared with the Zr atoms, the Ru atoms are not easy to oxidize, so that the doping of O elements is reduced; by high temperature annealing treatment, CAnd a large number of holes appear on the surface of the u film to generate a copper-silicon high-resistance phase, the scattering effect of the surface of the sample on electrons is enhanced, the obtained Zr-Ru-B ternary structure has better high-temperature stability, the diffusion barrier property of the diffusion barrier layer is improved, and the reliability of the Cu interconnection line is further improved.
Drawings
FIG. 1 is an HRTEM image of the amorphous structure of a diffusion barrier with 5.39% Ru content.
Fig. 2 is an HRTEM of an amorphous structure of a diffusion barrier with 52.41% Ru content.
FIG. 3 is an SEM image of a film system with 5.39% Ru content after annealing at 650 ℃.
FIG. 4 is an XRD pattern of a Cu/Zr-Ru-B thin film with a Ru content of 8.99%.
FIG. 5 is a plot of sheet resistance of a Cu/Zr-Ru-B film with a Ru content of 37.14%.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
a preparation method of a diffusion impervious layer for Cu interconnection comprises the following steps:
step 1), performing decontamination treatment on the surface of a silicon substrate; specifically, a silicon substrate is sequentially placed in acetone and ethanol for ultrasonic cleaning to remove organic pollutants on the surface of the silicon substrate and improve the film-substrate binding force; wherein the concentration of the acetone solution is more than 99.9 percent; the concentration of the ethanol solution is more than 99.9 percent.
Step 2), co-sputtering Ru target and ZrB on the surface of the silicon substrate subjected to decontamination treatment by magnetron sputtering2The sputtering power of the Ru target is 20-50W and ZrB2The sputtering power of the target is 100-150W; the co-sputtering time is 1200-1800 s, and the Zr-Ru-B diffusion impervious layer film is obtained.
The magnetron sputtering in the step 2) is carried out in a vacuum inert gas atmosphere.
The background vacuum degree of a sputtering chamber for magnetron sputtering is 1.0 multiplied by 10-4～6.0×10-4Pa; ru target material adopts radio frequency magnetron sputtering, ZrB2The target material adopts direct current magnetron sputtering. The method is implemented at normal temperature by adopting double-chamber magnetron sputtering coating equipment; ru target and ZrB used therefor2The purity of the target material is 99.99 percent; the Ru target material adopts radio frequency magnetron sputtering, ZrB2The target material adopts direct current magnetron sputtering. The prepared Zr-Ru-B diffusion impervious layer is an alloy diffusion impervious layer.
Ne gas or Ar gas is used as the inert gas, the flow rate of the inert gas is 20-30 sccm, and the working pressure is 0.3-0.5 Pa.
The invention provides a diffusion impervious layer for Cu interconnection, wherein a doped Ru element exists in a metal form, and the thickness of an obtained Zr-Ru-B diffusion impervious layer film is 3-10 nm.
A preparation method of a Cu interconnection lead layer based on the diffusion impervious layer for Cu interconnection comprises the following steps:
step 1), preparing and forming a Zr-Ru-B diffusion impervious layer on the surface of a silicon substrate;
step 2), forming a Cu lead layer on the Zr-Ru-B diffusion barrier layer through magnetron sputtering of a Cu target, and then performing high-temperature annealing to obtain a Cu interconnection lead layer containing the Zr-Ru-B diffusion barrier layer, wherein the annealing temperature is 300-700 ℃, and the heat preservation time is 30-60 min; the magnetron sputtering deposition power is 100-130W, and the deposition pressure is 0.2-0.5 Pa.
Examples
Adopts JPG-450a type double-chamber magnetron sputtering equipment to sputter Zr-Ru-B diffusion impervious layer film, and the target materials are Ru target and ZrB2Target, argon gas with purity of 99.99%, Ru target and ZrB2Sputtering power of the target is respectively 30W and 120W, bias voltage is 150V, working pressure is 0.3Pa, pre-sputtering time is 15min, and sputtering time is 0.5h, so that a diffusion barrier layer film with the thickness of 5nm is obtained; after the deposition of the diffusion barrier layer film is finished, depositing a 200nm Cu film by using direct current sputtering, wherein the purity of a Cu target is 99.99%, the magnetron sputtering deposition power is 120W, and the deposition pressure is 0.3 Pa; obtaining a Cu interconnection sample containing a Zr-Ru-B diffusion barrier layer, carrying out high-temperature annealing on the prepared Cu interconnection sample in an atmosphere annealing furnace, wherein the annealing temperature is 300-700 ℃, the heat preservation time is 30-60min, and then testing the Cu interconnection sample containing the Zr-Ru-B diffusion barrier layer;
the diffusion barrier layer film is prepared under the condition of different magnetron sputtering powers, and the specific parameters are shown in table 1:
TABLE 1
When the microstructure of the Zr-Ru-B diffusion barrier layer prepared in the above embodiment is observed by TEM, as can be seen from fig. 1 and fig. 2, when the Ru doping content is low, the film is in an amorphous structure, and when the Ru doping content is high, the film is in a nanocrystalline structure; FIG. 3 is an SEM picture of a film system with 5.39% Ru content after annealing at 650 ℃, which shows that the surface of the Cu film is aggregated and has a large number of holes and a small number of rod-shaped particles are generated, and the particles are Cu-Si compounds through energy spectrum analysis, which shows that diffusion has occurred inside the film and the diffusion barrier layer fails. FIG. 4 is an XRD pattern of a Cu/Zr-Ru-B film with 8.99% Ru content, and no diffraction peak associated with Cu-Si compounds was observed after annealing the sample to 700 deg.C, indicating that the film system did not fail at least at 700 deg.C.
And (3) measuring the square resistance values of the film in a deposition state and an annealing state by adopting a four-point probe tester for the film sample of the diffusion barrier layer, preparing the film sample of the diffusion barrier layer into a square block of 1cm multiplied by 1cm before testing, testing each sample for 5 times to ensure the accuracy of the test, and finally obtaining the square resistance of the film by taking an average value. As shown in fig. 5, when annealing is performed at 500 ℃ or lower, the sheet resistivity decreases with the increase in annealing temperature, which is caused by the decrease in the number of defects in the Cu film and the disappearance of internal stress. After annealing at 600 ℃ and 700 ℃, the square resistance of the sample is increased sharply, a large number of holes appear on the surface of the Cu film, a copper-silicon high-resistance phase is generated, and the scattering effect of the surface of the sample on electrons is enhanced. In conclusion, compared with the nanocrystalline structure, the amorphous structure has higher thermal stability and better blocking effect on Cu and Si atom diffusion at high temperature.
Claims (7)
1. A preparation method of a diffusion impervious layer for Cu interconnection is characterized by comprising the following steps:
step 1), performing decontamination treatment on the surface of a silicon substrate;
step 2), co-sputtering Ru target and ZrB on the surface of the silicon substrate subjected to decontamination treatment by magnetron sputtering2The sputtering power of the Ru target is 20-50W and ZrB2The sputtering power of the target is 100-150W; the co-sputtering time is 1200-1800 s, and a Zr-Ru-B diffusion barrier layer film is obtained; magnetron sputtering is carried out in a vacuum inert gas atmosphere; ne gas or Ar gas is used as inert gas, the flow rate of the inert gas is 20-30 sccm, and the working pressure is 0.3-0.5 Pa; the background vacuum degree of a sputtering chamber for magnetron sputtering is 1.0 multiplied by 10-4～6.0×10-4Pa。
2. The method as claimed in claim 1, wherein the Ru target material and ZrB are selected from the group consisting of Cu, and Cu2The purity of the target material is 99.99 percent.
3. The method for preparing a diffusion barrier layer for Cu interconnection as claimed in claim 1, wherein the Ru target material is selected from the group consisting of RF magnetron sputtering, ZrB2The target material adopts direct current magnetron sputtering.
4. A diffusion barrier layer for Cu interconnect, characterized by being prepared by any one of the above claims 1 to 3.
5. The diffusion barrier layer for Cu interconnection as claimed in claim 4, wherein the film thickness of the diffusion barrier layer for Cu interconnection is 3 to 10 nm.
6. A preparation method of a Cu interconnection lead layer based on a diffusion impervious layer for Cu interconnection is characterized by comprising the following steps:
step 1), preparing and forming a Zr-Ru-B diffusion impervious layer on the surface of a silicon substrate;
and 2) carrying out magnetron sputtering of a Cu target on the Zr-Ru-B diffusion barrier layer to form a Cu lead layer, and then carrying out high-temperature annealing to obtain a Cu interconnection lead layer containing the Zr-Ru-B diffusion barrier layer, wherein the annealing temperature is 300-700 ℃, and the heat preservation time is 30-60 min.
7. The method for preparing a Cu interconnection lead layer based on a diffusion impervious layer for Cu interconnection as claimed in claim 6, wherein the Cu target is deposited by direct current sputtering, the magnetron sputtering deposition power is 100-130W, and the deposition pressure is 0.2-0.5 Pa.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010011308A (en) * | 1999-07-27 | 2001-02-15 | 김영환 | Method for forming capacitor having zirconiumdiboride layer as diffusion barrier |
| US7510943B2 (en) * | 2005-12-16 | 2009-03-31 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
| CN101673705A (en) * | 2009-09-29 | 2010-03-17 | 哈尔滨工业大学 | Preparation method of thin film of diffusion impervious layer |
| CN102437145A (en) * | 2011-12-06 | 2012-05-02 | 西安交通大学 | Self-formed gradient Zr/ZrN double layer diffusion barrier layer and preparation method thereof |
| CN103132018A (en) * | 2013-03-12 | 2013-06-05 | 电子科技大学 | Method for improving electric conductivity of amorphous silicon membrane |
| EP2827079A1 (en) * | 2013-07-19 | 2015-01-21 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | A solar absorber body for a concentrating solar power system and a method for manufacturing a solar absorber body |
| CN110484883A (en) * | 2019-09-04 | 2019-11-22 | 天津师范大学 | A kind of synthetic method and application of hard Zr-B-O nano compound film |
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| KR100613450B1 (en) * | 2004-12-02 | 2006-08-21 | 주식회사 하이닉스반도체 | barrier metal layer for bit line in semiconductor device and manufacturing method thereof |
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Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010011308A (en) * | 1999-07-27 | 2001-02-15 | 김영환 | Method for forming capacitor having zirconiumdiboride layer as diffusion barrier |
| US7510943B2 (en) * | 2005-12-16 | 2009-03-31 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
| CN101673705A (en) * | 2009-09-29 | 2010-03-17 | 哈尔滨工业大学 | Preparation method of thin film of diffusion impervious layer |
| CN102437145A (en) * | 2011-12-06 | 2012-05-02 | 西安交通大学 | Self-formed gradient Zr/ZrN double layer diffusion barrier layer and preparation method thereof |
| CN103132018A (en) * | 2013-03-12 | 2013-06-05 | 电子科技大学 | Method for improving electric conductivity of amorphous silicon membrane |
| EP2827079A1 (en) * | 2013-07-19 | 2015-01-21 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | A solar absorber body for a concentrating solar power system and a method for manufacturing a solar absorber body |
| CN110484883A (en) * | 2019-09-04 | 2019-11-22 | 天津师范大学 | A kind of synthetic method and application of hard Zr-B-O nano compound film |
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