CN110825206B - Computer integrated system and fault automatic switching method - Google Patents

Computer integrated system and fault automatic switching method Download PDF

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CN110825206B
CN110825206B CN201911103954.4A CN201911103954A CN110825206B CN 110825206 B CN110825206 B CN 110825206B CN 201911103954 A CN201911103954 A CN 201911103954A CN 110825206 B CN110825206 B CN 110825206B
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module
power supply
cpu
main cpu
power
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CN110825206A (en
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张波
张锐锐
曹永青
刘钊
常占胜
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CANGZHOU NORMAL UNIVERSITY
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision

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  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The invention discloses a computer integrated system and a fault automatic switching method, and belongs to the technical field of computer systems. The computer integrated system provided by the invention comprises the dual-power supply system, the cache system, the backup module and the monitoring module, so that the smoothness and the safety of the computer system are greatly improved; according to the fault automatic switching method, the main CPU and the auxiliary CPU are arranged to cooperatively manage the power supply module, so that the safety is higher, and the reaction speed is higher; by utilizing the design, the problems that the existing computer and the computer system are suddenly shut down when encountering power failure, cannot be used continuously, and the work and the life are affected and the computer is damaged are effectively solved.

Description

Computer integrated system and fault automatic switching method
Technical Field
The present invention relates to the field of computer systems, and in particular, to a computer integrated system and a method for automatically switching faults.
Background
The computer is commonly called a computer, is a modern electronic computing machine for high-speed computing, can perform numerical computation and logic computation, has a memory function, and is a modern intelligent electronic device capable of automatically and high-speed processing mass data according to program operation.
The computer is mainly composed of a hardware system and a software system, and a computer without any software installed is called a bare computer. The system can be divided into five types of super computers, industrial control computers, network computers, personal computers and embedded computers, more advanced computers comprise biological computers, photon computers, quantum computers and the like, along with the development of technology, the functions of the computers are more and more diversified, and the rich functions of the computers are realized by relying on the work of various hardware systems and software systems.
The computer is applied to various fields in social life, and has great influence on life of people, especially in the present information society, the use of the computer becomes more diversified, and in the daily use process of the computer, people often encounter sudden shutdown of the computer caused by sudden damage of a power supply, especially in some large-sized computers, the sudden shutdown has great influence, and even damage of the computer or paralysis of a network can be caused, so that it is very necessary to design a computer integrated system and a fault switching method capable of coping with power supply faults.
Disclosure of Invention
The invention aims to solve the problems that the existing computer and computer system can be suddenly shut down when encountering power failure and can not be used continuously, and work and life are influenced and the computer is damaged.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
the utility model provides a computer integrated system, includes dual supply power supply system, dual supply power supply system links with the buffer memory system, link on the buffer memory system and have control module and backup module, still interlinkage between control module and the backup module, control module is including basic operation module, information processing module and storage module, backup module is including buffering data backup and long-term data backup, control module and backup module all link with the control module, the control module still links on the dual supply power supply system.
Preferably, the dual-power supply system comprises a main CPU and a secondary CPU, wherein the main CPU and the secondary CPU respectively comprise a main CPU control module and a secondary CPU control module, the main CPU and the secondary CPU are mutually linked, the main CPU is also linked with a power module, a state module, a voltage and current detection module, a driving module and a communication module, and the secondary CPU is linked with a key, a panel button input module, a signal display lamp module and a liquid crystal display module.
Preferably, the driving module comprises a photoelectric isolator and a relay, wherein the photoelectric isolator is linked on a main CPU, and the relay is linked on the photoelectric isolator; the communication module comprises a CAN communication interface and an upper computer, wherein the CAN communication interface is in bidirectional link with the main CPU, and the upper computer is in bidirectional link with the CAN communication interface.
A method for automatic switching over of faults, applied to a computer integrated system, comprising the steps of:
s1, supplying power to a computer integrated system, so that a main power supply module of a dual-power supply system works to electrify a main CPU and a secondary CPU;
s2, the main CPU and the auxiliary CPU work, and data acquisition is carried out on information such as current and voltage of power supply, current and voltage fed back by the computer integrated system and the like;
s3, processing and analyzing the data acquired in the S2, substituting the tidied data into a calculation method for detecting the power failure, and judging whether the failure exists according to a calculation result;
s4, if the power failure detection calculation result shows that no failure exists, directly returning an instruction, and carrying out the steps of data acquisition and power failure detection calculation again, wherein the whole computer integrated system works normally; if the calculation result shows that the fault exists, judging whether the switching operation condition is met or not by the main CPU and the auxiliary CPU;
s5, if the judging result is that the switching operation condition is not met, returning a control instruction, continuing to acquire data and detect and calculate power failures, and simultaneously, not switching the power supply module, and continuing to use the main power supply module for power supply;
and S6, if the judging result is that the switching operation condition is met, the main CPU and the auxiliary CPU send out a switching command, the power supply of the main power supply module is converted into the power supply of the auxiliary power supply module, and meanwhile, the data acquisition and the power failure detection calculation work are continuously carried out.
Preferably, the power-on operation of the main CPU mentioned in S2 includes the following steps:
a1, after the main CPU is electrified, firstly initializing an internal register, and then automatically performing self-checking by the main CPU;
a2, after the self-checking is finished, carrying out alarming or resetting treatment according to the self-checking result;
a3, after initialization and self-checking are completed, executing a related interrupt service routine, determining the working mode of the computer integrated system, then carrying out switching value input detection, and then carrying out calculation of voltage, current and power;
a4, judging whether the power supply module fails according to the calculation result, if so, immediately performing fault processing, and if not, processing the communication task and performing data communication processing by the slave CPU;
and A5, returning to the self-checking step after the fault processing or the communication task processing is finished, and continuing to work by the main CPU.
Preferably, the power-on operation of the slave CPU mentioned in S2 includes the following steps:
b1, after the CPU is electrified, firstly initializing an internal register, and then performing self-checking work;
b2, automatically detecting whether the functions of the key, the panel button input module, the signal display lamp module and the liquid crystal display module of the slave CPU can work normally or not;
b3, exchanging data between the master CPU and the slave CPU when the self-checking is finished and no fault is displayed;
and B4, resetting the signal lamp according to the data obtained from the main CPU, and displaying the working state of the dual-power supply system according to the actual working condition of the power supply.
Preferably, in the step S3, a computer power failure detection algorithm is mentioned, which specifically includes:
let the grid phase voltage:
the differentiation is as follows:
the sampling point number N is set in one power frequency period, the time interval between two adjacent sampling points is t, and the voltage of the kth sampling point is as follows:
the k-1 th sampling point voltage is:
differential is replaced by differential:
when the sampling interval t is relatively small:
let k=ωt k ,k=1,2,3,4...
Where ωi (k), ψi (k) is the error.
p i (k)=(v i (k)-v i (k-N))-(v i (k-N)-v i (k-2N))
=w i (k)-2w i (k-N)+w i (k-2N)
Q i (k)=(v′ i (k)-v′ i (k-N))-(v′ i (k-N)-v′ i (k-2N))
=ψ i (k)-2ψ i (k-N)+ψ i (k-2N)
Visible in the lightThe voltage is very small at normal times. Assuming that the fundamental voltage drops between (k-1) to (k) th sampling points, the harmonic component assumes inconvenience, and the drop amplitude is a, sampling points after k:
since the fault detection time is much smaller than one power frequency period, the sampling point of the period before the current sampling point can be considered to be fault-free.
Wherein the method comprises the steps of
Due to (aV 1 ) 2 >>Q i (k) Therefore:
J i (k)≈aV 1
it can be considered a fault when a preset threshold is exceeded.
Compared with the prior art, the invention provides a computer integrated system and a fault automatic switching method, which have the following beneficial effects:
(1) The computer integrated system provided by the invention comprises a dual-power supply system, can effectively cope with the situation of sudden power failure in the use process of a computer, and also comprises a cache system and a backup system, wherein the cache system belongs to an upper layer system, can cache some important data information in the working process of the computer, can greatly improve the use speed and fluency of the system, and the backup system can timely backup the important information.
(2) The invention provides a fault automatic switching method based on computer power faults, which aims at a computer integrated system and provides a double-power supply, and simultaneously, in a double-power supply system, a main CPU and a secondary CPU are arranged to control the CPUs, wherein a main program of the main CPU is firstly electrified and self-checked, and is reset in a delayed mode to be initialized after the power supply is stable, and the method comprises the steps of initializing an internal register of the CPU; initializing a memory, initializing an ADC, initializing a timer, initializing communication, etc. After the initialization is finished, executing a related interrupt service routine, after determining the working mode of the system, carrying out switching value input detection, voltage current power calculation, judging whether a power supply fails, locking conversion, executing conversion and carrying out data communication processing with a slave CPU, and carrying out power-on initialization on the slave CPU software as well, mainly completing the functions of keyboard input, man-machine interface display, communication of a master CPU and the like.
(3) The power supply fault detection algorithm provided by the invention is an algorithm for detecting voltage abrupt change, the abrupt change is compared with a threshold value preset by a system, if the abrupt change exceeds the threshold value, conversion is executed, otherwise, conversion is not executed; the algorithm has small calculated amount, strong anti-interference capability and high reaction speed, and can detect faults only by two sampling periods at most; at any electrical angle, the algorithm adopted in the method can react in a very short time, so that the real-time monitoring of the power supply and the switching of the power supply can be realized in the shortest time when the power supply fails can be realized rapidly and effectively, the normal work of a computer is ensured, and the normal work of the work and the life of a user is not influenced.
Drawings
FIG. 1 is a system flow diagram of a computer integrated system according to the present invention;
FIG. 2 is a block diagram illustrating a method for automatic failover according to the present invention;
FIG. 3 is a main CPU workflow diagram of an automatic failover method according to the present invention;
fig. 4 is a slave CPU workflow diagram of a fail-over method according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
In the description of the present invention, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the present invention and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Example 1:
referring to fig. 1, a computer integrated system includes a dual-power supply system, the dual-power supply system is linked with a cache system, a control module and a backup module are linked on the cache system, the control module and the backup module are also linked with each other, the control module includes a basic operation module, an information processing module and a storage module, the backup module includes a cache data backup and a long-term data backup, the control module and the backup module are both linked with a monitoring module, and the monitoring module is also linked with the dual-power supply system.
The dual-power supply system comprises a main CPU and a secondary CPU, wherein the main CPU and the secondary CPU respectively comprise a main CPU control module and a secondary CPU control module, the main CPU and the secondary CPU are mutually linked, the main CPU is also linked with a power module, a state module, a voltage and current detection module, a driving module and a communication module, and the secondary CPU is linked with a key, a panel button input module, a signal display lamp module and a liquid crystal display module.
The driving module comprises a photoelectric isolator and a relay, wherein the photoelectric isolator is linked on the main CPU, and the relay is linked on the photoelectric isolator; the communication module comprises a CAN communication interface and an upper computer, wherein the CAN communication interface is in bidirectional link with the main CPU, and the upper computer is in bidirectional link with the CAN communication interface.
(4) The computer integrated system provided by the invention comprises a dual-power supply system, can effectively cope with the situation of sudden power failure in the use process of a computer, and also comprises a cache system and a backup system, wherein the cache system belongs to an upper layer system, can cache some important data information in the working process of the computer, can greatly improve the use speed and fluency of the system, and the backup system can timely backup the important information.
Example 2:
referring to fig. 2-4, the difference is based on embodiment 1;
a method for automatic switching over of faults, which is applied to a computer integrated system, and comprises the following steps:
s1, supplying power to a computer integrated system, so that a main power supply module of a dual-power supply system works to electrify a main CPU and a secondary CPU;
s2, the main CPU and the auxiliary CPU work, and data acquisition is carried out on information such as current and voltage of power supply, current and voltage fed back by the computer integrated system and the like;
s3, processing and analyzing the data acquired in the S2, substituting the tidied data into a calculation method for detecting the power failure, and judging whether the failure exists according to a calculation result;
s4, if the power failure detection calculation result shows that no failure exists, directly returning an instruction, and carrying out the steps of data acquisition and power failure detection calculation again, wherein the whole computer integrated system works normally; if the calculation result shows that the fault exists, judging whether the switching operation condition is met or not by the main CPU and the auxiliary CPU;
s5, if the judging result is that the switching operation condition is not met, returning a control instruction, continuing to acquire data and detect and calculate power failures, and simultaneously, not switching the power supply module, and continuing to use the main power supply module for power supply;
and S6, if the judging result is that the switching operation condition is met, the main CPU and the auxiliary CPU send out a switching command, the power supply of the main power supply module is converted into the power supply of the auxiliary power supply module, and meanwhile, the data acquisition and the power failure detection calculation work are continuously carried out.
S2, powering up the main CPU, wherein the step comprises the following steps of:
a1, after the main CPU is electrified, firstly initializing an internal register, and then automatically performing self-checking by the main CPU;
a2, after the self-checking is finished, carrying out alarming or resetting treatment according to the self-checking result;
a3, after initialization and self-checking are completed, executing a related interrupt service routine, determining the working mode of the computer integrated system, then carrying out switching value input detection, and then carrying out calculation of voltage, current and power;
a4, judging whether the power supply module fails according to the calculation result, if so, immediately performing fault processing, and if not, processing the communication task and performing data communication processing by the slave CPU;
and A5, returning to the self-checking step after the fault processing or the communication task processing is finished, and continuing to work by the main CPU.
The power-on work of the slave CPU mentioned in S2 comprises the following steps:
b1, after the CPU is electrified, firstly initializing an internal register, and then performing self-checking work;
b2, automatically detecting whether the functions of the key, the panel button input module, the signal display lamp module and the liquid crystal display module of the slave CPU can work normally or not;
b3, exchanging data between the master CPU and the slave CPU when the self-checking is finished and no fault is displayed; and B4, resetting the signal lamp according to the data obtained from the main CPU, and displaying the working state of the dual-power supply system according to the actual working condition of the power supply.
The invention provides a fault automatic switching method based on computer power faults, which aims at a computer integrated system and provides a double-power supply, and simultaneously, in a double-power supply system, a main CPU and a secondary CPU are arranged to control the CPUs, wherein a main program of the main CPU is firstly electrified and self-checked, and is reset in a delayed mode to be initialized after the power supply is stable, and the method comprises the steps of initializing an internal register of the CPU; initializing a memory, initializing an ADC, initializing a timer, initializing communication, etc. After the initialization is finished, executing a related interrupt service routine, after determining the working mode of the system, carrying out switching value input detection, voltage current power calculation, judging whether a power supply fails, locking conversion, executing conversion and carrying out data communication processing with a slave CPU, and carrying out power-on initialization on the slave CPU software as well, mainly completing the functions of keyboard input, man-machine interface display, communication of a master CPU and the like.
Example 3:
the difference is based on the embodiment 1 or 2;
s3, a computer power failure detection algorithm is mentioned, and the specific contents are as follows:
let the grid phase voltage:
the differentiation is as follows:
the sampling point number N is set in one power frequency period, the time interval between two adjacent sampling points is t, and the voltage of the kth sampling point is as follows:
the k-1 th sampling point voltage is:
differential is replaced by differential:
when the sampling interval t is relatively small:
let k=ωt k ,k=1,2,3,4...
Where ωi (k), ψi (k) is the error.
p i (k)=(v i (k)-v i (k-N))-(v i (k-N)-v i (k-2N))
=w i (k)-2w i (k-N)+w i (k-2N)
Q i (k)=(v′ i (k)-v′ i (k-N))-(v′ i (k-N)-v′ i (k-2N))
=ψ i (k)-2ψ i (k-N)+ψ i (k-2N)
Visible in the lightThe voltage is very small at normal times. Assuming that the fundamental voltage drops between (k-1) to (k) th sampling points, the harmonic component assumes inconvenience, and the drop amplitude is a, sampling points after k:
since the fault detection time is much smaller than one power frequency period, the sampling point of the period before the current sampling point can be considered to be fault-free.
Wherein the method comprises the steps of
Due to (aV 1 ) 2 >>Q i (k) Therefore:
J i (k)≈aV 1
it can be considered a fault when a preset threshold is exceeded.
The power supply fault detection algorithm provided by the invention is an algorithm for detecting voltage abrupt change, the abrupt change is compared with a threshold value preset by a system, if the abrupt change exceeds the threshold value, conversion is executed, otherwise, conversion is not executed; the algorithm has small calculated amount, strong anti-interference capability and high reaction speed, and can detect faults only by two sampling periods at most; at any electrical angle, the algorithm adopted in the method can react in a very short time, so that the real-time monitoring of the power supply and the switching of the power supply can be realized in the shortest time when the power supply fails can be realized rapidly and effectively, the normal work of a computer is ensured, and the normal work of the work and the life of a user is not influenced.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art, who is within the scope of the present invention, should make equivalent substitutions or modifications according to the technical scheme of the present invention and the inventive concept thereof, and should be covered by the scope of the present invention.

Claims (6)

1. A method of automatic switching over between faults, comprising the steps of:
s1, supplying power to a computer integrated system, so that a main power supply module of a dual-power supply system works to electrify a main CPU and a secondary CPU;
s2, the main CPU and the auxiliary CPU work, and data acquisition is carried out on current and voltage of power supply and current and voltage information fed back by the computer integrated system;
s3, processing and analyzing the data acquired in the S2, substituting the tidied data into a calculation method for detecting the power failure, and judging whether the failure exists according to a calculation result;
the power failure detection algorithm comprises the following specific contents:
let the grid phase voltage:
the differentiation is as follows:
the sampling point number N is set in one power frequency period, the time interval between two adjacent sampling points is t, and the voltage of the kth sampling point is as follows:
the k-1 th sampling point voltage is:
differential is replaced by differential:
when the sampling interval t is relatively small:
order thek=ωt kk=1,2,3,4...
Wherein the method comprises the steps ofω i (k),ψ i (k)Is an error;
visible in the lightThe voltage is very small when normal; assuming that the fundamental voltage drops between (k-1) to (k) th sampling points, the harmonic component assumes inconvenience, and the drop amplitude is a, sampling points after k:
because the fault detection time is far less than one power frequency period, the sampling point of the period before the current sampling point can be considered to be fault-free;
wherein the method comprises the steps of
Due toTherefore:
it can be considered a fault when a preset threshold is exceeded;
s4, if the power failure detection calculation result shows that no failure exists, directly returning an instruction, and carrying out the steps of data acquisition and power failure detection calculation again, wherein the whole computer integrated system works normally; if the calculation result shows that the fault exists, judging whether the switching operation condition is met or not by the main CPU and the auxiliary CPU;
s5, if the judging result is that the switching operation condition is not met, returning a control instruction, continuing to acquire data and detect and calculate power failures, and simultaneously, not switching the power supply module, and continuing to use the main power supply module for power supply;
and S6, if the judging result is that the switching operation condition is met, the main CPU and the auxiliary CPU send out a switching command, the power supply of the main power supply module is converted into the power supply of the auxiliary power supply module, and meanwhile, the data acquisition and the power failure detection calculation work are continuously carried out.
2. The method for automatically switching between faults according to claim 1, wherein: the main CPU mentioned in the S2 is powered on and works, and comprises the following steps:
a1, after the main CPU is electrified, firstly initializing an internal register, and then automatically performing self-checking by the main CPU;
a2, after the self-checking is finished, carrying out alarming or resetting treatment according to the self-checking result;
a3, after initialization and self-checking are completed, executing a related interrupt service routine, determining the working mode of the computer integrated system, then carrying out switching value input detection, and then carrying out calculation of voltage, current and power;
a4, judging whether the power supply module fails according to the calculation result, if so, immediately performing fault processing, and if not, processing the communication task and performing data communication processing by the slave CPU;
and A5, returning to the self-checking step after the fault processing or the communication task processing is finished, and continuing to work by the main CPU.
3. The method for automatically switching between faults according to claim 1, wherein: the power-on work of the slave CPU mentioned in the step S2 comprises the following steps:
b1, after the CPU is electrified, firstly initializing an internal register, and then performing self-checking work;
b2, automatically detecting whether the functions of the key, the panel button input module, the signal display lamp module and the liquid crystal display module of the slave CPU can work normally or not;
b3, exchanging data between the master CPU and the slave CPU when the self-checking is finished and no fault is displayed;
and B4, resetting the signal lamp according to the data obtained from the main CPU, and displaying the working state of the dual-power supply system according to the actual working condition of the power supply.
4. A computer integrated system for use in the fail-over method of any of claims 1-3, comprising a dual power supply system, characterized in that: the dual-power supply system is linked with the cache system, the cache system is linked with a control module and a backup module, the control module and the backup module are also linked with each other, the control module comprises a basic operation module, an information processing module and a storage module, the backup module comprises cache data backup and long-term data backup, the control module and the backup module are both linked with a monitoring module, and the monitoring module is also linked with the dual-power supply system.
5. A computer integrated system as claimed in claim 4, wherein: the dual-power supply system comprises a main CPU and a secondary CPU, wherein the main CPU and the secondary CPU respectively comprise a main CPU control module and a secondary CPU control module, the main CPU and the secondary CPU are mutually linked, the main CPU is also linked with a power module, a state module, a voltage and current detection module, a driving module and a communication module, and the secondary CPU is linked with a key, a panel button input module, a signal display lamp module and a liquid crystal display module.
6. A computer integrated system as claimed in claim 5, wherein: the driving module comprises photoelectric isolation and a relay, wherein the photoelectric isolation is linked on the main CPU, and the relay is linked on the photoelectric isolation; the communication module comprises a CAN communication interface and an upper computer, wherein the CAN communication interface is in bidirectional link with the main CPU, and the upper computer is in bidirectional link with the CAN communication interface.
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