CN110797297A - Method for preparing silicon structure on insulating layer by using self-control layer separation mode - Google Patents

Method for preparing silicon structure on insulating layer by using self-control layer separation mode Download PDF

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Publication number
CN110797297A
CN110797297A CN201810876184.6A CN201810876184A CN110797297A CN 110797297 A CN110797297 A CN 110797297A CN 201810876184 A CN201810876184 A CN 201810876184A CN 110797297 A CN110797297 A CN 110797297A
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silicon
wafer
self
temperature
insulating layer
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CN201810876184.6A
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Chinese (zh)
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彦丙智
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SHENYANG SILICON TECHNOLOGY CO LTD
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SHENYANG SILICON TECHNOLOGY CO LTD
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Priority to CN201810876184.6A priority Critical patent/CN110797297A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Abstract

A method for preparing a silicon structure on an insulating layer using a self-controlling layer separation method, characterized by: micro-bubbles are generated by the reaction after the injection layer is heated, the micro-bubbles expand and break under the vacuum condition, and the bonded wafer is automatically separated to form a silicon-on-insulating layer structure by the pressure difference generated inside and outside the wafer. According to the invention, the injection layer of the SOI silicon chip prepared by TM-SOI is in a vacuum environment, reaction energy is provided at high temperature to form micro bubbles, and the micro bubbles expand to generate internal and external pressure difference under vacuum, so that the wafer is automatically separated. The method greatly reduces particles on the surface of the silicon wafer and improves the cleanliness of the silicon wafer; it has outstanding and better technical effect. The method has expectable huge economic value and social value.

Description

Method for preparing silicon structure on insulating layer by using self-control layer separation mode
The technical field is as follows:
the invention relates to the technical field of SOI technology research and development, production and application, and particularly provides a method for preparing a silicon structure on an insulating layer by using a self-control layer separation mode.
Background art:
in the prior art, Self-Controlled Layer transfer (Self-Controlled Layer transfer) is a structural technology for obtaining silicon on an insulating Layer based on an ion implantation lift-off method. Its in-depth application in the related art is gradually expanding. It is desirable to have a method for fabricating a silicon on insulator structure using a self-controlling layer separation method with excellent technical effects.
The invention content is as follows:
the invention aims to provide a method for preparing a silicon structure on an insulating layer by using a self-control layer separation mode with excellent technical effect.
The invention provides a method for preparing a silicon structure on an insulating layer by using a self-control layer separation mode, which is characterized by comprising the following steps of: the concrete requirements are as follows: the H + injection layer is heated and reacts to generate micro-bubbles, the micro-bubbles expand, polymerize and break under the vacuum condition, and pressure difference is generated inside and outside the wafer to enable the bonded wafer to be automatically separated to form a silicon structure on the insulating layer.
The method for producing a silicon structure on an insulating layer using a self-controlling layer separation method according to the invention preferably further claims the following:
the method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode specifically comprises the following steps:
step 1), preparing two silicon wafers, namely a silicon wafer A and a silicon wafer B, wherein the two silicon wafers are specifically ① silicon oxide wafers and original silicon wafers, ② silicon oxide wafers and silicon oxide wafers, ③ original silicon wafers and original silicon wafers;
step 2): carrying out ion implantation on a silicon wafer B (as shown in the attached figure 1), wherein the implantation source is as follows: hydrogen or a hydrogen-helium mixture gas; equipment requiring ion implantation can ensure that an implanted layer is uniformly distributed with hydrogen ions or hydrogen helium ions;
step 3): pre-bonding the silicon wafer B and the silicon wafer A which are injected in the step 2) by using a plasma activation technology under a low-temperature condition, dehydrating OH bonds by using a low-temperature annealing technology, and completing question bonding to obtain a bonded wafer C meeting requirements;
step 4): putting the wafer C into a sealed cavity for heating, wherein the sealed cavity has the characteristics of high temperature resistance, radiation resistance and the like, and the condition in the sealed cavity is a vacuum condition less than 0.2 MPa; heating the wafer C to the temperature required by the separation of the self-control layer by mechanical heating or electromagnetic heating and the like: 200-500 ℃; keeping the temperature constant on the basis of reaching the separation set temperature of the automatic control layer, and setting the constant temperature time which is generally less than 60 min; wherein: the set temperature and the set time of the separation of the automatic control layer are in inverse proportion (as shown in figure 2);
step 5): and 4) after the step 4) is finished, changing the vacuum condition of the sealed cavity into the normal pressure condition, and cooling the sealed cavity and the wafer C for more than 1 min. Taking out the separated wafer C after cooling; obtaining a silicon structure on the insulating layer;
when the pressure of the wafer C injection layer is higher than the pressure in the sealed cavity, the polymerized micro bubbles explode and crack, and the wafer C automatically separates from the injection layer to form a silicon structure on the insulating layer; or after step 5) the separation is assisted by mechanical force to form a silicon-on-insulator structure.
The equipment conditions of the method for forming the silicon structure on the insulating layer are that the sealed cavity condition is less than 0.2MPa, the temperature can reach more than 500 ℃ through mechanical heating or electromagnetic heating, key parameters can be monitored and set in real time, and further the preferable technical requirements are that the method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode also meets the process condition requirements that an ① silicon wafer injection layer is uniformly and fully distributed with hydrogen ions or hydrogen and helium mixed ions, ② accords with a bonded wafer obtained through a low-temperature bonding technology, the working cavity condition of ③ self-control layer separation equipment is less than 0.2MPa vacuum, the set temperature of ④ self-control layer separation equipment is 200-500 ℃, the set constant temperature time of ⑤ self-control layer separation equipment is less than 60min, and the cooling time of the sealed cavity of ④ self-control layer separation equipment is more than 1 min.
Compared with the prior art, the invention is an extension of the technology of TM-SOI intelligent cutting method, and the specific method comprises the following steps: forming a uniform ion separation layer in one silicon wafer film by using an ion implantation method, bonding the ion implanted surface to the other silicon wafer at low temperature, and forming a bonding body by using an ion activation technology. Then annealing is carried out to make the bonding surface firm. And then changing the internal pressure of the cavity in the sealed cavity to raise the temperature in the cavity to a set temperature point, keeping the temperature constant for a certain time after the temperature is balanced and stable, polymerizing the injected ions in the ion separation layer into gas molecules to form a layer of separation membrane, separating the membrane, finishing membrane stripping, and forming a silicon-on-insulating layer structure.
The invention has the following advantages:
1. aiming at an SOI silicon chip prepared by TM-SOI, the method of the invention uses the injection layer to provide reaction energy at high temperature in a vacuum environment to form micro bubbles in order to achieve the purposes of completely removing a damaged layer after cracking and repairing SOI defects, and the vacuum causes the micro bubbles to expand to generate internal and external pressure difference so as to automatically separate the wafer.
2. The method of the invention adopts a vacuum mode, which is beneficial to completely reacting the hydrogen elements or the hydrogen helium elements distributed at different depths to promote H2Forming bubbles, and discharging after expansion and rupture to repair the defects.
3. The method adopts a vacuum mode, can effectively remove reactants, byproducts and impurities in the reaction cavity, and ensures the surface state of the silicon wafer.
4. After the reaction at constant high temperature, the temperature is quickly reduced to the set temperature, which is beneficial to defect repair.
5. The method is carried out in a sealed cavity, so that the contact with the outside is avoided, particles on the surface of the silicon wafer are reduced, and the cleanliness of the silicon wafer is improved.
6. The silicon chip in the method of the invention is not contacted with excessive chemicals, thus reducing the risk of pollution.
In conclusion, the invention has outstanding and better technical effects. The method has expectable huge economic value and social value.
Description of the drawings:
FIG. 1 is a simplified schematic illustration of the process for preparing a silicon on insulator structure using a self-controlling layer separation scheme;
FIG. 2 is a schematic diagram showing the basic relationship between the separation set temperature and the set time of the self-control layer.
The specific implementation mode is as follows:
example 1
A method for preparing a silicon structure on an insulating layer by using a self-controlled layer separation mode specifically requires that: micro-bubbles are generated by the reaction after the injection layer is heated, the micro-bubbles expand and break under the vacuum condition, and the bonded wafer is automatically separated to form a silicon-on-insulating layer structure by the pressure difference generated inside and outside the wafer.
The method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode specifically comprises the following steps:
step 1), preparing two silicon wafers, namely a silicon wafer A and a silicon wafer B, wherein the two silicon wafers are specifically ① silicon oxide wafers and original silicon wafers, ② silicon oxide wafers and silicon oxide wafers, ③ original silicon wafers and original silicon wafers;
step 2): carrying out ion implantation on a silicon wafer B (as shown in the attached figure 1), wherein the implantation source is as follows: hydrogen or a hydrogen-helium mixture gas; equipment requiring ion implantation can ensure that an implanted layer is uniformly distributed with hydrogen ions or hydrogen helium ions;
step 3): pre-bonding the silicon wafer B and the silicon wafer A which are injected in the step 2) by using a plasma activation technology under a low-temperature condition, dehydrating OH bonds by using a low-temperature annealing technology, and completing question bonding to obtain a bonded wafer C meeting requirements;
step 4): putting the wafer C into a sealed cavity for heating, wherein the sealed cavity has the characteristics of high temperature resistance, radiation resistance and the like, and the condition in the sealed cavity is a vacuum condition less than 0.2 MPa; heating the wafer C to the temperature required by the separation of the self-control layer by mechanical heating or electromagnetic heating and the like: 200-500 ℃; keeping the temperature constant on the basis of reaching the separation set temperature of the automatic control layer, and setting the constant temperature time which is generally less than 60min (note: the set temperature of the automatic control layer separation and the set time are in inverse proportion, as shown in figure 2);
step 5): after the step 4), the sealed cavity is changed from a vacuum condition to a normal pressure condition, and the sealed cavity and the wafer C are cooled for more than 1 min; the temperature is reduced to the set temperature; the wafers are separated either automatically or with the assistance of a certain mechanical force. Taking out the separated wafer C after cooling; a silicon structure on the insulating layer is obtained. The surface mirror surface, the roughness can use CMP surface polishing technology to carry on the intact restoration;
in addition, supplementary explanation is as follows: when the pressure of the wafer C injection layer is higher than the pressure in the sealed cavity, the polymerized micro bubbles explode and crack, and the wafer C automatically separates from the injection layer to form a silicon structure on the insulating layer; or after step 5) the separation is assisted by mechanical force to form a silicon-on-insulator structure.
The equipment conditions of the method for forming the silicon structure on the insulating layer are that the sealed cavity condition is less than 0.2MPa, the temperature can reach more than 500 ℃ through mechanical heating or electromagnetic heating, key parameters can be monitored and set in real time, and the specific technical requirements are that the method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode also meets the process condition requirements that an ① silicon wafer injection layer is uniformly distributed with hydrogen ions or hydrogen helium mixed ions, ② meets a bonded wafer obtained through a low-temperature bonding technology, the working cavity condition of ③ self-control layer separation equipment is less than 0.2MPa vacuum, the set temperature of ④ self-control layer separation equipment is 200-500 ℃, the set constant temperature time of ⑤ self-control layer separation equipment is less than 60min, and the cooling time of the sealed cavity of ④ self-control layer separation equipment is more than 1 min.
Compared with the prior art, the invention is an extension of the technology of TM-SOI intelligent cutting method, and the specific method comprises the following steps: forming a uniform ion separation layer in one silicon wafer film by using an ion implantation method, bonding the ion implanted surface to the other silicon wafer at low temperature, and forming a bonding body by using an ion activation technology. Then annealing is carried out to make the bonding surface firm. And then changing the internal pressure of the cavity in the sealed cavity to raise the temperature in the cavity to a set temperature point, keeping the temperature constant for a certain time after the temperature is balanced and stable, polymerizing the injected ions in the ion separation layer into gas molecules to form a layer of separation membrane, separating the membrane, finishing membrane stripping, and forming a silicon-on-insulating layer structure.
The embodiment has the following advantages:
1. in the method, aiming at an SOI silicon wafer prepared by using TM-SOI, in order to achieve the purposes of completely removing a damaged layer after cracking and repairing SOI defects, reaction energy is provided at high temperature to form micro bubbles by using an injection layer in a vacuum environment, and the vacuum causes the micro bubbles to expand to generate internal and external pressure difference, so that the wafer is automatically separated.
2. The method of the embodiment adopts a vacuum mode, which is beneficial to completely reacting the hydrogen elements or the hydrogen helium elements distributed at different depths to promote H2Forming bubbles, and discharging after expansion and rupture to repair the defects.
3. The method adopts a vacuum mode, can effectively remove reactants, byproducts and impurities in the reaction cavity, and ensures the surface state of the silicon wafer.
4. In the method of the embodiment, after the reaction at a constant high temperature, the temperature is quickly reduced to the set temperature, which is beneficial to defect repair.
5. The embodiment is carried out in a sealed cavity, so that the contact with the outside is avoided, particles on the surface of the silicon wafer are reduced, and the cleanliness of the silicon wafer is improved.
6. In the method, the silicon wafer is not contacted with excessive chemicals, so that the risk of pollution is reduced.
In conclusion, the present embodiment has a significantly better technical effect. The method has expectable huge economic value and social value.
Example 2
This embodiment is basically the same as embodiment 1, except that: and after the B piece is oxidized, injecting, and increasing the thickness of silicon dioxide of an insulating layer between the substrate silicon and the top layer silicon. The product meets the requirements of different insulating layers. However, the same technique is used to obtain the same high quality silicon-on-insulator structure during self-control layer separation.

Claims (4)

1. A method for preparing a silicon structure on an insulating layer using a self-controlling layer separation method, characterized by: the concrete requirements are as follows: injecting H + into a silicon wafer, bonding the wafer, heating the bonded wafer in a closed space under a vacuum condition, reacting an injection layer to generate micro-bubbles, expanding and breaking the micro-bubbles in a certain time, and automatically separating the bonded wafer to form a silicon structure on the insulating layer by generating pressure difference inside and outside the bonded wafer.
2. The method of forming a silicon-on-insulator structure using self-controlling layer separation as claimed in claim 1, wherein: the method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode specifically comprises the following steps:
step 1), preparing two silicon wafers, namely a silicon wafer A and a silicon wafer B, wherein the two silicon wafers are specifically ① silicon oxide wafers and original silicon wafers, ② silicon oxide wafers and silicon oxide wafers, ③ original silicon wafers and original silicon wafers;
step 2): carrying out ion implantation on a silicon wafer B (as shown in the attached figure 1), wherein the implantation source is as follows: hydrogen or a hydrogen-helium mixture gas; equipment requiring ion implantation can ensure that an implanted layer is uniformly distributed with hydrogen ions or hydrogen helium ions;
step 3): pre-bonding the silicon wafer B and the silicon wafer A which are injected in the step 2) by using a plasma activation technology under a low-temperature condition, dehydrating OH bonds by using a low-temperature annealing technology, and completing low-temperature bonding to obtain a bonded wafer C meeting the requirements;
step 4): putting the wafer C into a sealed cavity for heating, wherein the sealed cavity has the characteristics of high temperature resistance, radiation resistance and the like, and the condition in the sealed cavity is a vacuum condition less than 0.2 MPa; heating the wafer C to the temperature required by the separation of the self-control layer by mechanical heating or electromagnetic heating and the like: 200-500 ℃; keeping the temperature constant on the basis of reaching the separation set temperature of the automatic control layer, and setting the constant temperature time which is generally less than 60 min; wherein: the set temperature and the set time of the separation of the automatic control layer are in inverse proportion;
step 5): and 4) after the step 4) is finished, changing the vacuum condition of the sealed cavity into the normal pressure condition, and cooling the sealed cavity and the wafer C for more than 1 min. Taking out the separated wafer C after cooling; a silicon structure on the insulating layer is obtained.
3. The method of forming a silicon-on-insulator structure using self-controlling layer separation as claimed in claim 2, wherein: when the pressure of the wafer C injection layer is higher than the pressure in the sealed cavity, the polymerized micro bubbles explode and crack, and the wafer C automatically separates from the injection layer to form a silicon structure on the insulating layer; or after step 5) the separation is assisted by mechanical force to form a silicon-on-insulator structure.
4. The method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode as claimed in claim 2 or 3, wherein the method for preparing the silicon structure on the insulating layer by using the self-control layer separation mode further meets the process requirements that an implanted layer of an ① silicon wafer is uniformly distributed with hydrogen ions or hydrogen-helium mixed ions, ② matched bonded wafers are obtained by a low-temperature bonding technology, the working cavity condition of a ③ self-control layer separation device is vacuum less than 0.2MPa, the set temperature of a ④ self-control layer separation device is 200-500 ℃, the set constant temperature time of a ⑤ self-control layer separation device is less than 60min, and the cooling time of a sealed cavity of a ④ self-control layer separation device is more than 1 min.
CN201810876184.6A 2018-08-03 2018-08-03 Method for preparing silicon structure on insulating layer by using self-control layer separation mode Pending CN110797297A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5374564A (en) * 1991-09-18 1994-12-20 Commissariat A L'energie Atomique Process for the production of thin semiconductor material films
CN1632911A (en) * 2003-12-24 2005-06-29 联合晶圆公司 Method for making thin film by transferring on base plate
CN101325154A (en) * 2008-07-16 2008-12-17 中国科学院上海微系统与信息技术研究所 Germanium-painting structure for insulating layer of mixed graphical monocrystaline silicon as well as method and application thereof
CN107785235A (en) * 2016-08-31 2018-03-09 沈阳硅基科技有限公司 A kind of method that film is manufactured on substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5374564A (en) * 1991-09-18 1994-12-20 Commissariat A L'energie Atomique Process for the production of thin semiconductor material films
CN1632911A (en) * 2003-12-24 2005-06-29 联合晶圆公司 Method for making thin film by transferring on base plate
CN101325154A (en) * 2008-07-16 2008-12-17 中国科学院上海微系统与信息技术研究所 Germanium-painting structure for insulating layer of mixed graphical monocrystaline silicon as well as method and application thereof
CN107785235A (en) * 2016-08-31 2018-03-09 沈阳硅基科技有限公司 A kind of method that film is manufactured on substrate

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Application publication date: 20200214