CN110784178B - Broadband injection locking frequency multiplier - Google Patents
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- CN110784178B CN110784178B CN201911029869.8A CN201911029869A CN110784178B CN 110784178 B CN110784178 B CN 110784178B CN 201911029869 A CN201911029869 A CN 201911029869A CN 110784178 B CN110784178 B CN 110784178B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
Abstract
The invention discloses a broadband injection locking frequency multiplier which adopts a double injection type structure and comprises two harmonic generators and an injection locking oscillator. The two harmonic generators are coupled with the injection locking oscillator through transformers composed of inductors in the harmonic generators; the two harmonic generators convert the input fundamental wave signals into two paths of harmonic signals, and then the two paths of harmonic signals are respectively coupled to the injection locking oscillator through a transformer to realize frequency multiplication. Compared with the traditional structure, the broadband injection locking frequency multiplier has a wider locking range when the input power is smaller, and has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, high integration and the like.
Description
Technical Field
The invention relates to a broadband injection locking frequency multiplier, belonging to the technical field of radio frequency and analog integrated circuits of microelectronics and solid electronics.
Background
In recent years, wireless communication technology is rapidly developed, and development of millimeter wave and terahertz frequency bands becomes a hot spot, and the design of a wireless transceiver with high integration, high broadband and low power consumption becomes very important. Wireless transceiver systems rely on reliable intermediate frequency signals to enable better system performance. The frequency multiplier is used as an important component in an intermediate frequency signal generation link and completes the function of frequency multiplication of fundamental wave frequency.
In the use of intermediate frequency signals, frequency doubling measures are frequently required to improve the system performance. In a superheterodyne receiver architecture or a double-conversion zero-if transceiver architecture, two intermediate frequency signals, one high and one low, need to be used. In a transceiver, a phase-locked loop is generally used to provide a reliable and stable intermediate frequency signal, but a single phase-locked loop has a limited bandwidth and can only provide a single intermediate frequency signal, and in a system requiring the use of multiple intermediate frequency signals, the use of multiple phase-locked loops is unreasonable in terms of chip area and power consumption, and thus the output of the phase-locked loop needs to be multiplied or divided in frequency to flexibly adjust the intermediate frequency.
The next generation of 5G wireless communications, which requires MIMO transceivers to support 28GHz, 37GHz and 39GHz, providing such a wide range of intermediate frequency would be a formidable challenge. In the future, the ultra-high-speed wireless communication with wider band can be realized in E band (60-90 GHz) and W band (75-110 GHz), a voltage-controlled oscillator is designed in the frequency range and above to obtain good phase noise and lower power consumption, the design difficulty is huge, the design difficulty can be reduced by using a scheme of frequency doubling of lower frequency signals by a frequency multiplier, and better phase noise can be obtained, wherein the injection locking frequency multiplier is used as a low-power-consumption design to control the final power consumption in a lower range.
When the total phase shift of an ideal inverter at a certain frequency reaches 360 degrees, if the Barkhausen criterion is met, a resonance signal is generated at the frequency, and if an injection signal with proper amplitude and frequency is selected and added, the resonance signal is pulled to be consistent with the injection signal, so that the injection locking phenomenon is generated. The injection locking frequency doubler is injected by using the double frequency of the fundamental wave generated by the push-push pair, so that the signal resonates at the double frequency. The output signal power is basically obtained by resonance, so that the injection locking frequency doubler has the characteristic of low power consumption. The injection locking frequency tripler is used for injecting the triple frequency of the generated fundamental wave, so that the signal is resonated at the triple frequency, and the injection locking frequency tripler also has the characteristic of low power consumption.
The document "Li A, Zheng S, Yin J, et al.A 21-48 GHz fundamental Injection-Locked Fractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications [ J ]. IEEE Journal of Solid-State Circuits,2014,49(8):1785 and 1799". The Injection-Locked Frequency multiplier has a very high locking range by using a 6-step transformer design. However, the 6-order transformer adopts a 3-turn inductor design, and a frequency doubling signal is injected into the resonant cavity and cannot obtain a flat gain, so that the phenomenon that one end of a locking range is easy to lock and the other end of the locking range is difficult to lock can occur.
The document "Zhang J, Liu H, Zhao C, et al.a 22.8-to-43.2GHz tuning-less injection-locked frequency triple injection-current boosting with 76.4% locking range for multiband 5G applications [ C ]// Solid-state Circuits reference. ieee, 2018" also adopts a 6-step transformer design, achieving triple frequency injection locking. But the lock range narrows rapidly as the input power decreases.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: aiming at the phenomenon that the traditional injection locking frequency multiplier has a wider locking range under high-power input, but the locking range is rapidly narrowed after the input power is reduced, the broadband injection locking frequency multiplier with low input sensitivity is provided, so that the wider locking range can be kept while the input power is reduced, and the broadband injection locking frequency multiplier has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, high integration and the like.
The invention adopts the following technical scheme for solving the technical problems:
the broadband injection locking frequency multiplier adopts a double-injection structure and comprises a first harmonic generator, a second harmonic generator and an injection locking oscillator; the two harmonic generators are respectively used for generating harmonic signals, and the injection locking oscillator is used for locking the harmonic signals generated by the harmonic generators; the first harmonic generator, the second harmonic generator and the injection locking oscillator are coupled and connected through transformers composed of inductors in the first harmonic generator, the second harmonic generator and the injection locking oscillator; the two harmonic generators convert the input fundamental wave signals into two paths of harmonic signals, and then the two paths of harmonic signals are respectively coupled to the injection locking oscillator through a transformer to realize frequency multiplication.
The first harmonic generator comprises a first coupling inductor, the second harmonic generator comprises a second coupling inductor, the injection locking oscillator comprises a third coupling inductor, the first coupling inductor, the second coupling inductor and the third coupling inductor form a transformer, and the transimpedance gain and the bandwidth of the frequency multiplier are adjusted by adjusting the coupling coefficient between the first coupling inductor and the second coupling inductor, the coupling coefficient between the first coupling inductor and the third coupling inductor and the coupling coefficient between the second coupling inductor and the third coupling inductor so as to ensure the performance of the frequency multiplier.
Preferably, when the broadband injection locking frequency multiplier is used for realizing frequency doubling, the first harmonic generator generates a second harmonic signal, and the second harmonic generator generates the second harmonic signal. The first harmonic generator comprises first and second transistors, a first coupling inductor and a first capacitor; the grid electrode of the first transistor is connected with the positive electrode input end, the grid electrode of the second transistor is connected with the negative electrode input end, the source electrode of the first transistor and the source electrode of the second transistor are grounded, the drain electrode of the first transistor and the drain electrode of the second transistor are connected with one end of a first coupling inductor and one end of a first capacitor, the other end of the first coupling inductor is connected with a power supply, and the other end of the first capacitor is grounded or powered; the first capacitor is one or the combination of several of a parasitic capacitor of the connected first coupling inductor, a parasitic capacitor of the output end of the harmonic generator, parasitic capacitors of the first transistor and the second transistor, and an adjustable capacitor. The second harmonic generator comprises a third transistor, a fourth transistor, a second coupling inductor and a second capacitor; the grid electrode of the third transistor is connected with the anode input end, the grid electrode of the fourth transistor is connected with the cathode input end, the source electrode of the third transistor and the source electrode of the fourth transistor are grounded, the drain electrode of the third transistor and the drain electrode of the fourth transistor are connected with one end of the second coupling inductor and one end of the second capacitor, the other end of the second coupling inductor is connected with the power supply, and the other end of the second capacitor is grounded or powered; the second capacitor is one or the combination of several of the parasitic capacitor of the second coupling inductor, the parasitic capacitor of the output end of the harmonic generator, the parasitic capacitors of the third and fourth transistors and the adjustable capacitor.
Preferably, when the broadband injection locking frequency multiplier is used for realizing frequency tripling, the first harmonic generator generates a third harmonic signal, and the second harmonic generator generates a third harmonic signal. The first harmonic generator comprises a first P-type transistor, a first N-type transistor, a first coupling inductor and a first capacitor; the grid electrode of the first P-type transistor and the grid electrode of the first N-type transistor are connected with the positive input end, the source electrode of the first N-type transistor is grounded, the source electrode of the first P-type transistor is connected with the power supply, the drain electrode of the first P-type transistor is connected with one end of the first coupling inductor and one end of the first capacitor, and the drain electrode of the first N-type transistor is connected with the other end of the first coupling inductor and the other end of the first capacitor; the first capacitor is one or a combination of several of a connected inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the first P-type transistor and the first N-type transistor, and an adjustable capacitor. The second harmonic generator comprises a second P-type transistor, a second N-type transistor, a second coupling inductor and a second capacitor; the grid electrode of the second P-type transistor and the grid electrode of the second N-type transistor are connected with the input negative terminal, the source electrode of the second N-type transistor is grounded, the source electrode of the second P-type transistor is connected with the power supply, the drain electrode of the second P-type transistor is connected with one end of the second coupling inductor and one end of the second capacitor, and the drain electrode of the second N-type transistor is connected with the other end of the second coupling inductor and the other end of the second capacitor; the second capacitor is one or a combination of several of a connected inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the second P-type transistor and the second N-type transistor and an adjustable capacitor.
Preferably, the injection locked oscillator includes a third coupling inductor, a third capacitor, a fifth transistor, a sixth transistor, and a current source; the center tap of the third coupling inductor is connected with one end of a current source, the other end of the current source is connected with a power supply, one end of the third coupling inductor is connected with the drain electrode of the fifth transistor, the grid electrode of the sixth transistor, one end of the third capacitor and the positive output end, the other end of the third coupling inductor is connected with the drain electrode of the sixth transistor, the grid electrode of the fifth transistor, the other end of the third capacitor and the negative output end, and the source electrode of the fifth transistor and the source electrode of the sixth transistor are grounded; the third capacitor is one or a combination of a third coupling inductor, a parasitic capacitor of the connected transistor and an adjustable capacitor.
Preferably, the wideband injection-locked frequency multiplier may further include an input buffer and an output buffer, the input buffer is connected to an input end of a core circuit formed by the first and second harmonic generators and the injection-locked oscillator, and the output buffer is connected to an output end of the core circuit; the connection mode is direct coupling, transformer coupling or alternating current coupling.
The broadband injection locking frequency multiplier adopts a double-injection structure, the two harmonic generators and the injection locking oscillator are respectively coupled and connected through the transformer consisting of the self-contained inductor, and a proper coupling coefficient can be selected by adjusting the coupling coefficient between the coupling inductors during circuit design, so that the transimpedance gain and the bandwidth of the frequency multiplier are expanded, and the good performance of the frequency multiplier is ensured. Compared with the prior art, the invention has the following technical effects:
1. the problem that a traditional injection locking frequency multiplier has a wider locking range under high-power input, but the locking range is rapidly narrowed after the input power is reduced is solved, and the broadband injection locking frequency multiplier with low input sensitivity is provided, so that the frequency multiplier still has the wider locking range when the input power is smaller.
2. The broadband injection locking frequency multiplier has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, high integration degree and the like, can be widely applied to millimeter wave/radio frequency transceivers, and has novelty and universality.
Drawings
Fig. 1 is a circuit schematic of an embodiment of a wideband injection locked frequency multiplier of the present invention.
Fig. 2 is a block diagram of another embodiment of a wideband injection locked frequency multiplier in accordance with the present invention.
Fig. 3 is a circuit diagram of an embodiment of the wideband injection locked frequency multiplier of the present invention for implementing frequency doubling.
Fig. 4 is a circuit diagram of an embodiment of the wideband injection locked frequency multiplier of the present invention for implementing frequency tripling.
Fig. 5 is a graph of the transimpedance gain characteristic of the broadband injection-locked frequency multiplier of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
Example one
The embodiment of the invention aims at the problem that the traditional injection locking frequency multiplier has a wider locking range under high-power input, but the locking range can be rapidly narrowed after the input power is reduced, and adopts a double-injection structure, as shown in figure 1, comprising a first harmonic generator, a second harmonic generator and an injection locking oscillator; the harmonic generator is used for generating an nth harmonic signal (n is 2, 3 and 4 …), and the injection locking oscillator is used for locking the harmonic signal generated by the harmonic generator; the two harmonic generators and the injection locking oscillator are coupled and connected through a transformer consisting of inductors in the harmonic generators and the injection locking oscillator; the two harmonic generators convert the input fundamental wave signals into two paths of harmonic signals, and then the two paths of harmonic signals are respectively coupled to the injection locking oscillator through a transformer to realize frequency multiplication.
The first harmonic generator comprises a first coupling inductor L1, the second harmonic generator comprises a second coupling inductor L2, the injection locking oscillator comprises a third coupling inductor L3, the first coupling inductor, the second coupling inductor and the third coupling inductor form a transformer, the coupling coefficient between the first coupling inductor L1 and the second coupling inductor L2 is k12, the coupling coefficient between the first coupling inductor L1 and the third coupling inductor L3 is k13, and the coupling coefficient between the second coupling inductor L2 and the third coupling inductor L3 is k 23.
Example two
In the embodiment of the present invention, an input buffer and an output buffer are added on the basis of the first embodiment, and as shown in fig. 2, two harmonic generators and one injection locked oscillator form a core circuit of a wideband injection locked frequency multiplier. The broadband injection locking frequency multiplier comprises a core circuit, an input buffer and an output buffer, wherein the input buffer is connected with the input end of the core circuit, and the output buffer is connected with the output end of the core circuit; the connection mode can be direct coupling, transformer coupling or alternating current coupling.
EXAMPLE III
The broadband injection locking frequency multiplier disclosed by the embodiment of the invention is an injection locking frequency multiplier capable of realizing double-bandwidth, and the circuit of the broadband injection locking frequency multiplier is shown in figure 3 and comprises two harmonic generators for generating second harmonic and an injection locking oscillator. The two harmonics generators comprise: a common-source stage first transistor M1 and a second transistor M2, a common-source stage third transistor M3 and a fourth transistor M4, a first coupling inductor L1 and a second coupling inductor L2, and a first capacitor C1 and a second capacitor C2; the first transistor M1, the second transistor M2, the first coupling inductor L1 and the first capacitor C1 form a first harmonic generator, and the third transistor M3, the fourth transistor M4, the second coupling inductor L2 and the second capacitor C2 form a second harmonic generator; the grid of the first transistor M1 is connected with the positive input end, the grid of the second transistor M2 is connected with the negative input end, the source of the first transistor M1 and the source of the second transistor M2 are grounded, the drain of the first transistor M1 and the drain of the second transistor M2 are connected with one end of a first coupling inductor L1 and one end of a first capacitor C1, the other end of the first coupling inductor L1 is connected with a power supply, and the other end of the first capacitor C1 is grounded or powered; the grid electrode of the third transistor M3 is connected with the anode input end, the grid electrode of the fourth transistor M4 is connected with the cathode input end, the source electrode of the third transistor M3 and the source electrode of the fourth transistor M4 are grounded, the drain electrode of the third transistor M3 and the drain electrode of the fourth transistor M4 are connected with one end of the second coupling inductor L2 and one end of the second capacitor C2, the other end of the second coupling inductor L2 is connected with the power supply, and the other end of the second capacitor C2 is grounded or the power supply; the first capacitor C1 and the second capacitor C2 are one or a combination of several of a connecting inductor, a parasitic capacitor at the output end of the harmonic generator, a parasitic capacitor of a transistor and an adjustable capacitor. The injection locked oscillator includes: a third coupling inductor L3, a third capacitor C3, a fifth transistor M5, a sixth transistor M6 and a current source; a center tap of the third coupling inductor L3 is connected with one end of a current source, the other end of the current source is connected with a power supply, one end of the third coupling inductor L3 is connected with a drain electrode of the fifth transistor M5, a gate electrode of the sixth transistor M6, one end of the third capacitor C3 and an anode output end, the other end of the third coupling inductor L3 is connected with a drain electrode of the sixth transistor M6, a gate electrode of the fifth transistor M5, the other end of the third capacitor C3 and a cathode output end, and a source electrode of the fifth transistor M5 and a source electrode of the sixth transistor M6 are grounded; the third capacitor C3 is one or a combination of several of a third coupling inductor L3, a parasitic capacitor of a transistor and an adjustable capacitor; the first coupling inductor L1, the second coupling inductor L2 and the third coupling inductor L3 form a transformer, and the frequency multiplier can achieve good performance by adjusting a coupling coefficient k12 between the first coupling inductor L1 and the second coupling inductor L2, a coupling coefficient k13 between the first coupling inductor L1 and the third coupling inductor L3, and a coupling coefficient k23 between the second coupling inductor L2 and the third coupling inductor L3.
Example four
The broadband injection locking frequency multiplier disclosed by the embodiment of the invention is a broadband injection locking frequency multiplier capable of realizing triple frequency, and the circuit of the broadband injection locking frequency multiplier is shown in figure 4 and comprises two harmonic generators for generating triple harmonics and an injection locking oscillator. The two harmonics generators comprise: a first P-type transistor M1P and a second P-type transistor M2P, a first N-type transistor M1N and a second N-type transistor M2N, a first coupling inductor L1 and a second coupling inductor L2, and a first capacitor C1 and a second capacitor C2; the first P-type transistor M1P, the first N-type transistor M1N, the first coupling inductor L1 and the first capacitor C1 form a first harmonic generator, and the second P-type transistor M2P, the second N-type transistor M2N, the second coupling inductor L2 and the second capacitor C2 form a second harmonic generator; the grid electrode of the first P-type transistor M1P and the grid electrode of the first N-type transistor M1N are connected with the positive input terminal, the source electrode of the first N-type transistor M1N is grounded, the source electrode of the first P-type transistor M1P is connected with the power supply, the drain electrode of the first P-type transistor M1P is connected with one end of the first coupling inductor L1 and one end of the first capacitor C1, and the drain electrode of the first P-type transistor M1N is connected with the other end of the first coupling inductor L1 and the other end of the first capacitor C1; the gate of the second P-type transistor M2P and the gate of the second N-type transistor M2N are connected to the input negative terminal, the source of the second N-type transistor M2N is grounded, the source of the second P-type transistor M2P is connected to the power supply, the drain of the second P-type transistor M2P is connected to one end of the second coupling inductor L2 and one end of the second capacitor C2, and the drain of the second N-type transistor M2N is connected to the other end of the second coupling inductor L2 and the other end of the second capacitor C2; the first capacitor C1 and the second capacitor C2 are one or a combination of several of connected inductors, parasitic capacitors at the output end of the harmonic generator, parasitic capacitors of the P-type and N-type transistors and adjustable capacitors. The injection locked oscillator includes: the injection locking oscillator comprises a third coupling inductor L3, a third capacitor C3, a fifth transistor M5, a sixth transistor M6 and a current source; a center tap of the third coupling inductor L3 is connected with one end of a current source, the other end of the current source is connected with a power supply, one end of the inductor L3 is connected with a drain electrode of the fifth transistor M5, a grid electrode of the sixth transistor M6, one end of the third capacitor C3 and an anode output end, the other end of the inductor L3 is connected with a drain electrode of the sixth transistor M6, a grid electrode of the fifth transistor M5, the other end of the third capacitor C3 and a cathode output end, and a source electrode of the fifth transistor M5 and a source electrode of the sixth transistor M6 are grounded; the third capacitor C3 is one or a combination of several of a third coupling inductor L3, a parasitic capacitor of a transistor and an adjustable capacitor; the first coupling inductor L1, the second coupling inductor L2 and the third coupling inductor L3 form a transformer, and the frequency multiplier can achieve good performance by adjusting a coupling coefficient k12 between the first coupling inductor L1 and the second coupling inductor L2, a coupling coefficient k13 between the first coupling inductor L1 and the third coupling inductor L3, and a coupling coefficient k23 between the second coupling inductor L2 and the third coupling inductor L3.
In summary, the broadband injection locking frequency multiplier of the invention adopts a double injection structure, and can effectively expand the transimpedance gain and the bandwidth. As shown in fig. 5, the first harmonic generator and the injection locked oscillator are coupled via a transformer, the coupling coefficient is k13, and the transimpedance gain characteristic curve is Z31; the second harmonic generator and the injection locking oscillator are coupled through a transformer, the coupling coefficient is k23, and the transimpedance gain characteristic curve is Z32. The total transimpedance gain characteristic curve is Z31+ Z32, and transimpedance gain and bandwidth are both remarkably improved.
The above embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the protection scope of the present invention.
Claims (7)
1. The broadband injection locking frequency multiplier is characterized in that a double injection structure is adopted, and the broadband injection locking frequency multiplier comprises a first harmonic generator, a second harmonic generator and an injection locking oscillator; the two harmonic generators are respectively used for generating harmonic signals, and the injection locking oscillator is used for locking the harmonic signals generated by the harmonic generators; the first harmonic generator, the second harmonic generator and the injection locking oscillator are coupled and connected through transformers composed of inductors in the first harmonic generator, the second harmonic generator and the injection locking oscillator; the two harmonic generators convert the input fundamental wave signals into two paths of harmonic signals, and then the two paths of harmonic signals are respectively coupled to the injection locking oscillator through a transformer to realize frequency multiplication; the first harmonic generator comprises a first coupling inductor, the second harmonic generator comprises a second coupling inductor, the injection locking oscillator comprises a third coupling inductor, the first coupling inductor, the second coupling inductor and the third coupling inductor form a transformer, and the transimpedance gain and the bandwidth of the frequency multiplier are adjusted by adjusting the coupling coefficient between the first coupling inductor and the second coupling inductor, the coupling coefficient between the first coupling inductor and the third coupling inductor and the coupling coefficient between the second coupling inductor and the third coupling inductor to ensure the performance of the frequency multiplier.
2. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is used to implement frequency doubling, the first harmonic generator generates a second harmonic signal, and the first harmonic generator comprises first and second transistors, a first coupling inductor, and a first capacitor; the grid electrode of the first transistor is connected with the positive electrode input end, the grid electrode of the second transistor is connected with the negative electrode input end, the source electrode of the first transistor and the source electrode of the second transistor are grounded, the drain electrode of the first transistor and the drain electrode of the second transistor are connected with one end of a first coupling inductor and one end of a first capacitor, the other end of the first coupling inductor is connected with a power supply, and the other end of the first capacitor is grounded or powered; the first capacitor is one or a combination of several of a parasitic capacitor of the first coupling inductor, a parasitic capacitor of the output end of the harmonic generator, parasitic capacitors of the first transistor and the second transistor, and an adjustable capacitor.
3. The wideband injection locked frequency multiplier of claim 1, wherein when the wideband injection locked frequency multiplier is used to implement frequency doubling, the second harmonic generator generates a second harmonic signal, and the second harmonic generator comprises third and fourth transistors, a second coupling inductor, and a second capacitor; the grid electrode of the third transistor is connected with the anode input end, the grid electrode of the fourth transistor is connected with the cathode input end, the source electrode of the third transistor and the source electrode of the fourth transistor are grounded, the drain electrode of the third transistor and the drain electrode of the fourth transistor are connected with one end of the second coupling inductor and one end of the second capacitor, the other end of the second coupling inductor is connected with the power supply, and the other end of the second capacitor is grounded or powered; the second capacitor is one or a combination of several of a parasitic capacitor of the second coupling inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the third transistor and the fourth transistor, and an adjustable capacitor.
4. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is used for implementing frequency tripling, the first harmonic generator generates a third harmonic signal, and the first harmonic generator comprises a first P-type transistor, a first N-type transistor, a first coupling inductor and a first capacitor; the grid electrode of the first P-type transistor and the grid electrode of the first N-type transistor are connected with the positive input end, the source electrode of the first N-type transistor is grounded, the source electrode of the first P-type transistor is connected with the power supply, the drain electrode of the first P-type transistor is connected with one end of the first coupling inductor and one end of the first capacitor, and the drain electrode of the first N-type transistor is connected with the other end of the first coupling inductor and the other end of the first capacitor; the first capacitor is one or a combination of several of a parasitic capacitor of the first coupling inductor, a parasitic capacitor of the output end of the harmonic generator, parasitic capacitors of the first P-type transistor and the first N-type transistor, and an adjustable capacitor.
5. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is configured to implement frequency tripling, the second harmonic generator generates a third harmonic signal, and the second harmonic generator comprises a second P-type transistor, a second N-type transistor, a second coupling inductor, and a second capacitor; the grid electrode of the second P-type transistor and the grid electrode of the second N-type transistor are connected with the input negative terminal, the source electrode of the second N-type transistor is grounded, the source electrode of the second P-type transistor is connected with the power supply, the drain electrode of the second P-type transistor is connected with one end of the second coupling inductor and one end of the second capacitor, and the drain electrode of the second N-type transistor is connected with the other end of the second coupling inductor and the other end of the second capacitor; the second capacitor is one or a combination of several of a parasitic capacitor of the second coupling inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the second P-type transistor and the second N-type transistor, and an adjustable capacitor.
6. The wideband injection-locked frequency multiplier of claim 1, wherein the injection-locked oscillator comprises a third coupling inductor, a third capacitor, a fifth transistor, a sixth transistor, and a current source; the center tap of the third coupling inductor is connected with one end of a current source, the other end of the current source is connected with a power supply, one end of the third coupling inductor is connected with the drain electrode of the fifth transistor, the grid electrode of the sixth transistor, one end of the third capacitor and the positive output end, the other end of the third coupling inductor is connected with the drain electrode of the sixth transistor, the grid electrode of the fifth transistor, the other end of the third capacitor and the negative output end, and the source electrode of the fifth transistor and the source electrode of the sixth transistor are grounded; the third capacitor is one or a combination of a parasitic capacitor of the third coupling inductor, parasitic capacitors of the fifth transistor and the sixth transistor, and an adjustable capacitor.
7. The wideband injection-locked frequency multiplier of claim 1, further comprising an input buffer coupled to an input of a core circuit comprising the first and second harmonic generators and the injection-locked oscillator, and an output buffer coupled to an output of the core circuit; the connection mode is direct coupling, transformer coupling or alternating current coupling.
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