CN110781100B - Data detection method, logic chip and network equipment - Google Patents
Data detection method, logic chip and network equipment Download PDFInfo
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
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- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
- H03M7/12—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word having two radices, e.g. binary-coded-decimal code
Abstract
The application provides a data detection method, a logic chip and network equipment, wherein the method comprises the following steps: storing data to be written into a designated storage position of a second storage medium, and acquiring unique code data according to the designated storage position; dividing the data to be written into M sub-write data, determining the storage address of the sub-write data aiming at each sub-write data, and reading decoding data from the storage address; generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address; dividing data to be detected into M pieces of sub-detection data, determining a storage address of the sub-detection data aiming at each piece of sub-detection data, and reading decoding data from the storage address; and determining whether the network equipment stores the data to be detected or not according to the read M decoded data. Through the technical scheme of the application, the internal storage resources of the equipment can be fully utilized, and the resource utilization rate is improved.
Description
Technical Field
The present application relates to the field of communications, and in particular, to a data detection method, a logic chip, and a network device.
Background
Network devices (e.g., routers, switches, etc.) may store content entries that are used to record legitimate content. For example, when the content entry is used to record a Media Access Control (MAC) Address, the MAC Address in the ARP (Address Resolution Protocol) table may be recorded in the content entry. For another example, when the content entry is used to record an IP address, the IP address in the routing table and/or the ARP table may be recorded in the content entry.
After receiving the message, the network device parses a key field, such as a destination MAC address, from the message. And comparing the destination MAC address with each MAC address in the content table entry. If the destination MAC address is the same as any MAC address in the content table entry, the message is continuously processed. If the destination MAC address is different from all MAC addresses in the content table entry, the message is discarded and is not processed any more.
However, since a large number of MAC addresses are included in the content entry, how to efficiently determine whether the destination MAC address is the same as the MAC address in the content entry is a problem to be solved.
Disclosure of Invention
The application provides a data detection method, which is applied to network equipment, wherein the network equipment comprises a first storage medium and a second storage medium, the first storage medium comprises M sub-storage media, and the method comprises the following steps:
storing data to be written into a designated storage position of the second storage medium, and acquiring unique hot code data corresponding to the data to be written according to the designated storage position;
dividing the data to be written into M sub-write-in data, wherein different sub-write-in data correspond to different sub-storage media; for each sub-write data, determining a storage address of the sub-write data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-write data; generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address;
dividing data to be detected into M pieces of sub-detection data, wherein different sub-detection data correspond to different sub-storage media; for each piece of sub-detection data, determining a storage address of the sub-detection data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-detection data;
and determining whether the network equipment stores the data to be detected or not according to the read M decoded data.
The present application provides a logic chip, the logic chip includes a first storage medium and a second storage medium, the first storage medium includes M sub-storage media, the logic chip includes:
the data writing module is used for storing the data to be written into a specified storage position of a second storage medium;
the decoding module is used for acquiring the one-hot code data corresponding to the data to be written according to the specified storage position and outputting the one-hot code data to the matching module;
the selector module is used for acquiring data to be written and outputting the data to be written to the matching module;
the matching module is used for dividing the data to be written into M sub-write-in data, and different sub-write-in data correspond to different sub-storage media; for each sub-write data, determining a storage address of the sub-write data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-write data; generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address;
the selector module is also used for outputting the data to be detected to the matching module;
the matching module is further used for dividing the data to be detected into M pieces of sub-detection data, and different sub-detection data correspond to different sub-storage media; for each piece of sub-detection data, determining a storage address of the sub-detection data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-detection data; and determining whether the network equipment stores the data to be detected or not according to the read M decoded data.
The application provides a network device, which comprises a CPU and the logic chip.
Based on the technical scheme, in the embodiment of the application, the data to be written can be stored through the second storage medium of the network device, one piece of decoded data is stored through each sub-storage medium of the first storage medium, that is, M pieces of decoded data are stored in the M sub-storage media, and the data to be detected is detected according to the M pieces of decoded data, so that whether the data to be detected is the same as the locally stored data is efficiently determined, and the service experience is improved. The storage medium is the storage resource of the network equipment, no additional hardware is needed, the hardware cost of the equipment is reduced, the development period of the hardware is shortened, the internal storage resource of the equipment is fully utilized, and the resource utilization rate is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments of the present application or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings of the embodiments of the present application.
FIG. 1 is a schematic diagram of an application scenario in an embodiment of the present application;
FIG. 2 is a flow chart of a data storage method in one embodiment of the present application;
FIG. 3 is a flow chart of a data detection method in one embodiment of the present application;
FIG. 4 is a block diagram of a logic chip in one embodiment of the present application;
fig. 5 is a structural diagram of a logic chip in another embodiment of the present application.
Detailed Description
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein is meant to encompass any and all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used in the embodiments of the present application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. Depending on the context, moreover, the word "if" as used may be interpreted as "at … …" or "when … …" or "in response to a determination".
The network device may store a content entry for recording the legitimate content data. For example, the content entry is used to record a MAC address, an IP address, and the like. In the embodiment of the present application, the content table entry may be stored in a storage medium of the network device, that is, the content data is stored in the storage medium of the network device.
In one example, the storage medium may be any storage medium of a network Device, for example, the network Device may include a Logic chip (e.g., an FPGA (Field Programmable Gate Array), a CPLD (Complex Programmable Logic Device), an ASIC (Application Specific Integrated circuit), etc.), and the storage medium may be a RAM (Random Access Memory) inside the Logic chip. Also for example, the storage medium may be a memory or the like. Of course, the above are just two examples. This is not limiting.
Referring to fig. 1, which is a schematic structural diagram of a network device, the network device includes a first storage medium and a second storage medium, the first storage medium includes M sub-storage media, and 4 sub-storage media are taken as an example in fig. 1, and in an actual application, the number of the sub-storage media may be configured arbitrarily. For example, the first storage medium and the second storage medium may be implemented by RAM inside the logic chip, that is, the first storage medium (i.e., a plurality of sub-storage media) and the second storage medium are constructed by the RAM inside the logic chip.
In an example, the second storage medium is a storage medium with a depth of N and a bit width of P, and both N and P may be configured arbitrarily, that is, the second storage medium with configurable depth and bit width may be constructed.
For example, the depth N of the second storage medium may be 20, which means that there are 20 storage locations in the second storage medium, each storage location can store one data to be written, and then these 20 storage locations are denoted as storage location 1-storage location 20. Of course, the depth N of the second storage medium is configurable, for example, the depth N of the second storage medium may also be other depths such as 40, 50, 80, etc., which is not limited in this respect.
For example, the bit width P of the second storage medium may be 20, which means that one storage location of the second storage medium can store 20 bits (bit) of data. Of course, the bit width P of the second storage medium is configurable, for example, the bit width P of the second storage medium may also be 30, 40, and the like, which is not limited thereto.
In one example, the first storage medium includes M sub-storage media, and the number M of sub-storage media is related to the number of divisions of data to be written. For example, the length of the data to be written is 20 bits, which is the same as the bit width P of the second storage medium. Assuming that the data to be written needs to be divided into 4 sub-write data, each of which is 5 bits, the number M of sub-storage media is 4. Assuming that the data to be written needs to be divided into 5 sub-write data, each of which is 4 bits, the number M of sub-storage media is 5. Of course, the above is only an example, and the method is not limited thereto, and 4 sub-storage media are taken as an example in the following.
In summary, it can be seen that the length of the data to be written is P, and the length of each sub-write data is P/M.
In one example, each sub-storage medium is a storage medium with a depth of Q and a bit width of N, and Q and N can be configured arbitrarily, that is, the sub-storage media with configurable depth and bit width can be constructed.
For example, for each sub storage medium in the first storage medium, the depth Q of the sub storage medium is set based on the length of the sub write data, and the depth Q of the sub storage medium is described as 32, which indicates that there are 32 storage addresses in total in the sub storage medium (similar to the storage location of the second storage medium, for the sake of convenience of distinction, the storage location in the sub storage medium is referred to as a storage address), each storage address can store one piece of decoded data, and these 32 storage addresses are subsequently denoted as storage address 1-storage address 32. Illustratively, the depth Q of the sub-storage medium is related to the length of the sub-write data, and if the length of the sub-write data is 5 bits, the depth Q of the sub-storage medium is 32 (5 powers of 2), and if the length of the sub-write data is 4 bits, the depth Q of the sub-storage medium is 16 (4 powers of 2), and the depth Q is not limited.
For example, the bit width N of the sub storage medium is described by taking 20 as an example, and indicates that one storage address of the sub storage medium can store 20 bits of data. Illustratively, the bit width N of the sub storage medium is related to the number of storage locations of the second storage medium (i.e., the depth N of the second storage medium), for example, if the second storage medium has 20 storage locations, the bit width N of the sub storage medium is 20, and if the second storage medium has 30 storage locations, the bit width N of the sub storage medium is 30, which is not limited.
In the above application scenario, referring to fig. 2, a flowchart of a data storage method is shown, which includes:
Specifically, a specific storage location of the data to be written may be obtained, where the specific storage location is a certain storage location of the second storage medium, and the obtaining manner is not limited, and then, the data to be written is stored in the specific storage location of the second storage medium. For example, for the 1 st data to be written, the storage location is designated as storage location 1, and so on, for the 20 th data to be written, the storage location is designated as storage location 20, and for the 21 st data to be written, the storage location is designated as storage location 1.
In one example, obtaining the one-hot code data corresponding to the data to be written according to the specified storage location (the one-hot code data is related to the specified storage location of the data to be written), which may include but is not limited to: setting a bit corresponding to the designated storage location in the one-hot code data as a first identifier (such as 1); and setting the bit which does not correspond to the appointed storage position in the one-hot code data as a second identifier (such as 0). Wherein the second storage medium may comprise N storage locations, the one-hot code data may comprise N bits, each storage location corresponding to one bit of the one-hot code data, and different storage locations corresponding to different bits of the one-hot code data.
For example, assuming that the designated storage location of data a is storage location 6, data a is stored into storage location 6 of the second storage medium. Assuming that the second storage medium includes 20 storage locations, the one-hot code data includes 20 bits, and in the one-hot code data, the 6 th bit corresponding to the storage location 6 is 1, and the bit not corresponding to the storage location 6 is 0, and thus, the one-hot code data is 00000000000000100000.
For example, assuming that data a "00100000110001000001" needs to be written, the data a is used as data to be written, and the length of the data a is the same as the bit width P of the second storage medium, i.e., the length of the data a is 20 bits. Then, since the number M of the sub storage media is 4, the data a is divided into 4 sub write data each having a length of 5 bits. The sub write data a1 is 00001, and the sub write data a1 corresponds to the sub storage medium 1; the sub write data A2 is 00010, and the sub write data A2 corresponds to the sub storage medium 2; the sub write data A3 is 00011, and the sub write data A3 corresponds to the sub storage medium 3; the sub-write data a4 is 00100, and the sub-write data a4 corresponds to the sub-storage medium 4.
Determining the storage address of the sub-write data may include: each piece of sub-write data uniquely corresponds to one memory address, and therefore, the memory address of the sub-write data can be directly determined. For example, binary sub-write data is converted into decimal data, and each decimal data corresponds to one storage address of the sub-storage medium. For example, when the sub write data is 00000, the decimal data is 0, corresponding to the memory address 1; when the sub write data is 00001, the decimal data is 1 and corresponds to the memory address 2; when the sub write data is 11111, the decimal data is 31 corresponding to the memory address 32. Referring to the above-mentioned embodiment, when the length of the sub-write data is 5 bits, the depth Q of the sub-storage medium is 32, that is, the sub-storage medium includes 32 storage addresses, and obviously, the sub-write data of 5 bits corresponds to the 32 storage addresses of the sub-storage medium one to one.
Wherein, generating new decoding data according to the one-hot code data and the decoding data may include, but is not limited to: and carrying out or operation on the one-hot code data and the decoded data according to bits to obtain new decoded data. For example, the 1 st bit of the one-hot code data is or-operated with the 1 st bit of the decoded data, and so on, the 20 th bit of the one-hot code data is or-operated with the 20 th bit of the decoded data, and finally, new decoded data with 20 bits is obtained.
For example, for sub-write data a1(00001), the storage address is storage address 2, the decoded data is read from storage address 2 of sub-storage medium 1, the length of the decoded data is 20 bits, and assuming that the decoded data is 10000000110000000000, the one-hot code data is 000000000000000000100000 and the decoded data 10000000110000000000 OR operation to obtain new decoded data 10000000110000100000 and writes the new decoded data into the storage address 2 of the sub storage medium 1. The next time the decoded data is read from storage address 2 of the sub storage medium 1, it is 10000000110000100000.
Similarly, for the sub-write data a2(00010), if the storage address is storage address 3, the decoded data can be read from the storage address 3 of the sub-storage medium 2, and the unique hot code data 00000000000000100000 is ored with the decoded data to obtain new decoded data, and the new decoded data is written into the storage address 3 of the sub-storage medium 2. Further, for the sub write data a3(00011), if the storage address is storage address 4, the decoded data can be read from the storage address 4 of the sub storage medium 3, and the one-hot code data 00000000000000100000 and the decoded data are ored to obtain new decoded data, and the new decoded data is written into the storage address 4 of the sub storage medium 3. Furthermore, for the sub-write data a4(00100), if the storage address is storage address 5, the decoded data can be read from the storage address 5 of the sub-storage medium 4, and the unique hot code data 00000000000000100000 is ored with the decoded data to obtain new decoded data, and the new decoded data is written into the storage address 5 of the sub-storage medium 4.
As described above, as for the storage address of each sub-storage medium, the storage address is used to store the decoded data (of course, the decoded data is merely an example for convenience of distinction, it is binary data, and the length of the decoded data is the same as that of the unique code data), and the initial value of the decoded data in all the storage addresses is 00000000000000000000. In the subsequent process, the decoding data in the storage address is continuously adjusted according to the one-hot code data, and the adjusted decoding data is stored in the storage address.
In the above embodiment, the data to be written needs to be stored in the designated storage location of the second storage medium, and if the designated storage location of the second storage medium has no data, the data to be written is directly stored in the designated storage location of the second storage medium. If the designated storage location of the second storage medium already has data (the data is recorded as stored data), the stored data may be deleted from the designated storage location, and the data to be written may be stored in the designated storage location of the second storage medium after the stored data is deleted.
In one example, if there is stored data in the designated storage location of the second storage medium, the following steps may be performed before step 201, and step 201 may be performed after the following steps are performed.
And a step a of deleting the stored data from the designated storage position.
B, acquiring reverse code data corresponding to the stored data according to the specified storage position; the reverse code data comprises N bits, the bit corresponding to the appointed storage position in the reverse code data is a second mark, and the bit not corresponding to the appointed storage position in the reverse code data is a first mark.
Specifically, the reverse code data is determined based on the designated storage location of the stored data (i.e., the designated storage location of the data to be written, which are the same). The second storage medium includes N storage locations, and the reverse code data may also include N bits, where each storage location corresponds to one bit and different storage locations correspond to different bits. In the reverse code data, a bit corresponding to a designated storage location is a second flag (e.g., 0), and a bit not corresponding to the designated storage location is a first flag (e.g., 1). For example, assuming that the designated storage position is storage position 6, in the reverse direction code data, the 6 th bit corresponding to storage position 6 is 0, and the bit not corresponding to storage position 6 is 1, that is, the reverse direction code data is 11111111111111011111.
And c, dividing the stored data into M pieces of sub-storage data, wherein each piece of sub-storage data corresponds to one sub-storage medium, and different pieces of sub-storage data correspond to different sub-storage media.
Assuming that the stored data in the second storage medium is data B "11100000110001000001", since the number M of the sub storage media is 4, the data B is divided into 4 sub storage data each having a length of 5 bits. Sub storage data B1 is 00001 and corresponds to sub storage medium 1; sub storage data B2 is 00010 and corresponds to sub storage medium 2; sub storage data B3 is 00011 and corresponds to sub storage medium 3; the sub storage data B4 is 11100, and corresponds to the sub storage medium 4.
Step d, aiming at each piece of sub-storage data, determining the storage address of the sub-storage data, and reading the decoded data from the storage address of the sub-storage medium corresponding to the sub-storage data; and generating new decoding data according to the reverse code data and the decoding data, and storing the new decoding data into the storage address.
Wherein, the storage address of the sub-storage data is determined, and the implementation manner is referred to step 203, which is not described herein again.
Wherein generating new decoded data according to the reverse code data and the decoded data may include: and performing bitwise AND operation on the reverse code data and the decoded data to obtain new decoded data. For example, the 1 st bit of the reverse code data is and-operated with the 1 st bit of the decoded data, and so on, the 20 th bit of the reverse code data is and-operated with the 20 th bit of the decoded data, and finally, 20 bits of new decoded data is obtained.
For example, for the sub storage data B1(00001), the storage address is storage address 2, the decoded data is read from the storage address 2 of the sub storage medium 1, the length of the decoded data is 20 bits, and it is assumed that the decoded data is 10000000110000 bits100000, then the reverse code data 11111111111111 is coded011111 and the decoded data 10000000110000100000 anding to obtain new decoded data 10000000110000000000 and stores the new decoded data in the storage address 2 of the sub storage medium 1. The next time the decoded data is read from storage address 2 of the sub-storage medium 1, 10000000110000 is read000000。
In addition, the processing manner of the sub storage data B2, the sub storage data B3, the sub storage data B4, and the like may be the same as that of the sub storage data B1, and thus, the description thereof is not repeated.
The above process can adjust the decoded data in the storage address of each sub-storage data, i.e. the bit position 0 corresponding to the stored data in the decoded data is erased, and the accuracy of the data is ensured.
Based on the above data storage process, referring to fig. 3, it is a flowchart of a data detection method, including:
Specifically, after receiving the message, the key field (e.g., destination MAC address, source MAC address, destination IP address, source IP address, protocol type, etc.) may be parsed from the message, and the binary data of the key field is the data to be detected, for example, the data to be detected is data C "00100000110001000001".
Illustratively, the length of the data C is the same as the bit width P of the second storage medium, i.e., the length of the data C is 20 bits. Then, since the number M of the sub storage media is 4, the data C may be divided into 4 sub detection data each having a length of 5 bits. The sub detection data C1 is 00001, and the sub detection data C1 corresponds to the sub storage medium 1; the sub detection data C2 is 00010, and the sub detection data C2 corresponds to the sub storage medium 2; the sub detection data C3 is 00011, and the sub detection data C3 corresponds to the sub storage medium 3; the sub detection data C4 is 00100, and the sub detection data C4 corresponds to the sub storage medium 4.
Determining the storage address of the sub-detection data may include: each piece of sub-detection data uniquely corresponds to one storage address, and therefore, the storage address of the sub-detection data is directly determined. For example, binary sub detection data is converted into decimal data, and each decimal data corresponds to one storage address of the sub storage medium. For example, when the sub detection data is 00000, the decimal data is 0, corresponding to the memory address 1; when the sub detection data is 00001, the decimal data is 1 and corresponds to the memory address 2; when the sub detection data is 11111, the decimal data is 31 corresponding to the memory address 32. Referring to the above-mentioned embodiment, when the length of the sub detection data is 5 bits, the depth Q of the sub storage medium is 32, that is, the sub storage medium includes 32 storage addresses, and obviously, the 5 bits of sub detection data correspond to the 32 storage addresses of the sub storage medium one to one.
In one example, the length of the M decoded data is N bits, and if the S-th bit of each decoded data in the M decoded data is the first identifier, it may be determined that the network device stores the data to be detected; otherwise, it may be determined that the network device does not store the data to be detected.
Further, after it is determined that the network device stores the data to be detected, the storage location where the data to be detected is output may be the S-th storage location of the second storage medium.
For example, for the sub detection data C1(00001), the storage address is storage address 2, the decoded data is read from storage address 2 of the sub storage medium 1,assume that the decoded data is 10000000110000100000. In addition, if the storage address is storage address 3 for the sub detection data C2(00010), the decoded data is read from the storage address 3 of the sub storage medium 2, and it is assumed that the decoded data is 10010000000000100001. In addition, if the storage address is storage address 4 for the sub detection data C3(00011), the decoded data is read from the storage address 4 of the sub storage medium 3, and it is assumed that the decoded data is 00100000010000100000. In addition, if the storage address is storage address 5 for the sub detection data C4(00100), the decoded data is read from the storage address 5 of the sub storage medium 4, and it is assumed that the decoded data is 00000000010000100010。
Through the above processing, 4 pieces of decoded data can be obtained, and since the 6 th bit in the 4 pieces of decoded data is 1, it can be determined that the network device stores data C, and the data C is stored in the 6 th storage location of the second storage medium, that is, the data C is stored in the storage location 6 of the second storage medium.
For example, to know whether the S-th bit in the M decoded data is the first flag, the following method may be adopted: and performing bitwise AND operation on all M decoded data to obtain output data. If a bit of the output data is the first identifier, the bit is the S-th bit. Otherwise, the S bit does not exist in the M decoded data, and the network equipment is determined not to store the data to be detected.
For example, the 1 st bit of all M decoded data is and-operated, and so on, the 20 th bit of all M decoded data is and-operated, and finally the output data of 20 bits is obtained.
For example, 4 decoded data 10000000110000 may be combined100000、10010000000000100001、00100000010000100000 and 00000000010000100010 AND operation, the output data obtained is 00000000000000100000. Obviously, since the 6 th bit is 1, the network device stores data C, and the data C is stored in the 6 th storage location of the second storage medium.
Based on the technical scheme, in the embodiment of the application, the data to be written can be stored through the second storage medium of the network device, one piece of decoded data is stored through each sub-storage medium of the first storage medium, that is, M pieces of decoded data are stored in the M sub-storage media, and the data to be detected is detected according to the M pieces of decoded data, so that whether the data to be detected is the same as the locally stored data is efficiently determined, and the service experience is improved. The storage medium is the storage resource of the network equipment, no additional hardware is needed, the hardware cost of the equipment is reduced, the development period of the hardware is shortened, the internal storage resource of the equipment is fully utilized, and the resource utilization rate is improved. The depth and bit width can be flexibly expanded according to the RAM in the logic chip, and the method can be applied to applicable scenes.
Alternatively, in an example, when new decoded data is generated according to the one-hot code data and the decoded data and the new decoded data is stored in the storage address of the sub storage medium, writing may be performed according to the interface type of the sub storage medium. For example, if the interface type of the sub storage medium is simple dual port, one decoded data is written in 4 clock cycles (i.e. a new decoded data is stored in the storage address of the sub storage medium); if the interface type of the sub storage medium is true dual port, one decoded data is written in 2 clock cycles.
Based on the same application and communication as the above method, the embodiment of the present application further provides a network device, where the network device may include a CPU and a logic chip, and the structure of the logic chip is shown in fig. 4.
Referring to fig. 4, the logic chip may include a first storage medium and a second storage medium, and the first storage medium may include M sub-storage media. In addition, the logic chip may further include, but is not limited to, a data writing module 41, a decoding module 42, a selector module 43, and a matching module 44.
In one example, when data to be written needs to be written, the data writing module 41 may be enabled with a data writing signal (wr _ en) so that the data writing module 41 performs a data writing operation, and the data writing module 41 outputs a busy signal (busy), where the busy signal indicates that the data writing module 41 is performing the data writing operation and cannot write new data, and after the data writing is completed, the output of the busy signal may be stopped, indicating that the data writing module 41 is capable of performing the data writing operation. Further, the CPU may output a storage location (addr) indicating a designated storage location of data to be written to the data writing module 41. In addition, the CPU may output data a (wdata), which is data to be written and is 20 bits of data, to the data writing module, such as data a may be "00100000110001000001".
And a data writing module 41, configured to store the data to be written in a specified storage location of the second storage medium.
For example, when the storage location is designated as the storage location 6, the data writing module 41 stores the data to be written (i.e., the data a) to the storage location 6 of the second storage medium. After the data a is successfully stored in the storage location 6 of the second storage medium, the data writing module 41 may further enable the data writing signal (wr _ en) to the decoding module 42, the selector module 43, and the matching module 44, respectively, so that the decoding module 42, the selector module 43, and the matching module 44 start to operate after receiving the data writing signal.
And the decoding module 42 is configured to obtain the unique hot code data corresponding to the data to be written according to the specified storage location, and output the unique hot code data to the matching module 44. The decoding module 42 is specifically configured to: setting a bit corresponding to a designated storage position in the one-hot code data as a first identifier; setting a bit which is not corresponding to the appointed storage position in the one-hot code data as a second identifier; the second storage medium comprises N storage positions, the one-hot code data comprises N bits, and different storage positions correspond to different bits.
Specifically, the decoding module 42 may obtain a storage location of the data a in the second storage medium, and obtain the unique code data according to the storage location, and since the data a is stored in the storage location 6 of the second storage medium, in the unique code data, the 6 th bit corresponding to the storage location 6 is 1, the bit not corresponding to the storage location 6 is 0, and the unique code data is 00000000000000100000, which is not limited herein.
And the selector module 43 is configured to obtain data to be written, and output the data to be written to the matching module 44.
For example, during data storage, the selector module 43 may retrieve data a from the storage location 6 of the second storage medium and output data a to the matching module 44.
The matching module 44 is configured to divide data to be written into M sub-write data, where different sub-write data correspond to different sub-storage media; for each piece of sub-write-in data, determining a storage address of the sub-write-in data, and reading decoded data from the storage address of the sub-storage medium corresponding to the sub-write-in data; and generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address.
For example, referring to the above embodiment, the matching module 44 divides the data a into 4 sub-write data, each of which has a length of 5 bits, and the 4 sub-write data are the sub-write data a1, the sub-write data a2, the sub-write data A3, and the sub-write data a4, respectively. For the sub write data a1, the decoded data is read from the storage address 2 of the sub storage medium 1, and the unique hot code data 00000000000000100000 is ored with the decoded data to obtain new decoded data, and the new decoded data is written into the storage address 2 of the sub storage medium 1. The processing method for the sub-write data a2, the sub-write data A3, the sub-write data a4, etc. may be the same as that for the sub-write data a1, and will not be repeated herein.
In one example, when data C needs to be detected, the data detect signal (match _ en) may be enabled to selector module 43 so that selector module 43 performs the data detect operation. Further, the CPU may output data C (match _ data), which is data to be detected, to the selector block 43, and the data C may be one 20-bit data, for example, the data C may be "00100000110001000001".
The selector module 43 is configured to receive data to be detected and output the data to be detected to the matching module 44.
The matching module 44 is configured to divide the data to be detected into M sub-detection data, where different sub-detection data correspond to different sub-storage media; for each piece of sub-detection data, determining the storage address of the sub-detection data, and reading the decoded data from the storage address of the sub-storage medium corresponding to the sub-detection data; and determining whether the network equipment stores the data to be detected according to the read M decoded data.
The length of each of the M decoded data may be N bits, and the matching module 44 is specifically configured to determine whether the network device stores the data to be detected according to the read M decoded data: if the S bit of each of the M decoded data is the first identifier, determining that the network device stores the data to be detected; otherwise, it may be determined that the network device does not store the data to be detected.
The matching module 44 is further configured to: when the network device stores the data to be detected, the storage location capable of outputting the data to be detected is the S-th storage location of the second storage medium. For example, the matching module 44 may output the storage location of the data to be detected to the CPU as the S-th storage location of the second storage medium, so that the CPU can read the data to be detected from the S-th storage location of the second storage medium.
For example, the matching module 44 divides the data C (i.e., the data to be detected) into 4 sub-detection data, each of which has a length of 5 bits, and the 4 sub-detection data are the sub-detection data C1, the sub-detection data C2, the sub-detection data C3, and the sub-detection data C4. Reading the decoded data from the storage address 2 of the sub storage medium 1 for the sub detection data C1; reading the decoded data from the storage address 3 of the sub storage medium 2 for the sub detection data C2; reading the decoded data from the storage address 4 of the sub storage medium 3 for the sub detection data C3; for the sub detection data C4, the decoded data is read from the storage address 5 of the sub storage medium 4. Then, the matching module 44 performs and operation on the 4 decoded data to obtain output data. If "1" is present in the output data, matching information (indicating matching information when match _ ok is high) indicating that data C is stored in the second storage medium, that is, data C match is output, and position information (i.e., match _ addr) indicating that data C is stored in the second storage medium at several storage positions is output to the CPU. If no 1 is present in the output data, the output mismatch information (when match _ ok is low, it indicates mismatch information) indicates that no data C is stored in the second storage medium, that is, that data C is not matched.
In one example, the data writing module 41 is further configured to delete the stored data from the specified storage location before storing the data to be written in the specified storage location of the second storage medium;
the decoding module 42 is further configured to obtain reverse code data corresponding to the stored data according to the specified storage location, and output the reverse code data to the matching module 44; the reverse code data may include N bits, a bit in the reverse code data corresponding to the designated storage location is a second identifier, and a bit in the reverse code data not corresponding to the designated storage location is a first identifier;
a selector module 43, further configured to obtain the stored data and output the stored data to the matching module 44;
the matching module 44 is further configured to divide the stored data into M sub-storage data, where different sub-storage data correspond to different sub-storage media; for each piece of sub-storage data, determining a storage address of the sub-storage data, and reading decoded data from the storage address of the sub-storage medium corresponding to the sub-storage data; and generating new decoding data according to the reverse code data and the decoding data, and storing the new decoding data to the storage address.
Optionally, in an example, the network device may further include a plurality of second storage media and a plurality of first storage media, where the number of the second storage media is the same as the number of the first storage media, each second storage medium corresponds to one first storage medium, and different second storage media correspond to different first storage media.
For example, the structure shown in fig. 4 may be multiple, the structure shown in fig. 4 is referred to as a basic unit, and a memory unit with any depth and any bit width can be obtained by parallel combination of multiple basic units, for example, a memory unit with a depth of 10K and a bit width of 128 bits can be obtained, so as to meet more memory requirements.
Referring to fig. 5, which is a schematic diagram of a memory cell with any depth and any bit width, fig. 5 shows a parallel combination of i × j basic cells, resulting in a memory cell with a bit width of i × 20 and a depth of j × 20. The bit width is i × 20, which means that the bit width of the second storage medium of each elementary unit is 20, and the i elementary units are combined together to obtain a storage unit with the bit width of i × 20, that is, the total bit width of the second storage medium of the i elementary units is i × 20. The depth is j × 20, which means the depth of the second storage medium of each basic unit is 20, and such j groups of basic units (i.e. the combination of i basic units) are connected in parallel, so as to obtain the storage unit with the depth of j × 20, i.e. the total depth of the second storage medium of j groups of basic units is j × 20.
In one example, for a set of basic units, the depth is 20, which means that the second storage medium has 20 storage locations and is capable of storing 20 data to be written. The storage units with the depth of j × 20 are obtained by connecting the j groups of basic units in parallel, so that the second storage media of all the basic units have j × 20 storage positions in total, and j × 20 data to be written can be stored, thereby increasing the number of data storage.
In one example, a bit width of 20 for one elementary unit indicates that the second storage medium is capable of storing 20 bits of data. By combining the i basic units together, a storage unit with the bit width of i × 20 is obtained, so that the total bit width of the second storage medium of the i basic units is i × 20, and i × 20 bits of data can be stored in total, thereby increasing the bit width of data storage and ensuring that all data to be written can be stored.
Based on the design, when the length of the data to be written is greater than 20 bits, the data to be written can be split into several data to be written, and the length of each data to be written is not greater than the bit width 20 of the second storage medium. For example, for a MAC address, the length of the MAC address is 48 bits, the MAC address can be split into 3 pieces of data to be written, and each piece of data to be written can be 20 bits (the MAC address is first complemented by 0 to obtain data with a length of 60 bits, and then the data to be written is split into 3 pieces of 20 bits).
Then, writing 3 data to be written into 3 basic units, each of which writes one data to be written, and referring to the above embodiment, the writing process of each data to be written is not described herein again. In this way, a 48-bit MAC address can be written to 3 elementary units.
When a 48-bit MAC address is written into 3 elementary units, the MAC address is written into a corresponding position of the 3 elementary units. For example, when writing the data 1 to be written to the storage location 6 of the second storage medium of the base unit 1, the data 2 to be written is written to the storage location 6 of the second storage medium of the base unit 2, and the data 3 to be written is written to the storage location 6 of the second storage medium of the base unit 3.
In the data detection process, after a 48-bit MAC address is obtained, the 48-bit MAC address is split into 3 pieces of data to be detected, and the length of each piece of data to be detected is 20 bits (the MAC address is supplemented with 0 to obtain data with the length of 60 bits, and then the data to be detected is split into 3 pieces of 20 bits).
Then, the following operations may be performed: detecting whether the data 1 to be detected exists in a second storage medium of the basic unit 1; detecting whether the data 2 to be detected exists in a second storage medium of the basic unit 2; it is detected whether the data 3 to be detected is present in the second storage medium of the base unit 3.
If no basic unit has data 1 to be detected, data 2 to be detected or data 3 to be detected, the MAC address with 48 bits is not matched. If the basic unit 1 has the data 1 to be detected, the data 1 to be detected is located at the S1 th storage position of the second storage medium of the basic unit 1, the basic unit 2 has the data 2 to be detected, the data 2 to be detected is located at the S2 th storage position of the second storage medium of the basic unit 2, the basic unit 3 has the data 3 to be detected, and the data 3 to be detected is located at the S3 th storage position of the second storage medium of the basic unit 3, when the S1, the S2 and the S3 are completely the same, the MAC address with 48 bits is matched; when S1, S2, and S3 are not identical, a 48-bit MAC address is not matched.
In order to know whether the MAC address is matched, the following method can be adopted: reading 4 pieces of decoded data (i.e., M pieces of decoded data) corresponding to the data to be detected 1 from the basic unit 1, specifically, in the above embodiment, reading 4 pieces of decoded data corresponding to the data to be detected 2 from the basic unit 2, and reading 4 pieces of decoded data corresponding to the data to be detected 3 from the basic unit 3, so that a total of 12 pieces of decoded data are obtained. And then performing bitwise AND operation on all 12 decoded data to obtain output data. If a certain bit S of the output data is the first identifier, the MAC address is matched, and the data of the S-th storage location of the second storage medium of the base unit 1, the data of the S-th bit storage location of the second storage medium of the base unit 2, and the data of the S-th bit storage location of the second storage medium of the base unit 3 constitute the MAC address. And if all the bits are not the first identifier, the MAC address is not matched.
Illustratively, if a plurality of bits of the output data are all the first identifiers, the final search result is output by a low-order high-priority strategy. For example, if the 5 th bit and the 10 th bit of the output data are both the first flag, and 5 is less than 10, the data of the 5 th bit storage location of the second storage medium of the base unit 1, the data of the 5 th bit storage location of the second storage medium of the base unit 2, and the data of the 5 th bit storage location of the second storage medium of the base unit 3 constitute the MAC address.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. A typical implementation device is a computer, which may take the form of a personal computer, laptop computer, cellular telephone, camera phone, smart phone, personal digital assistant, media player, navigation device, email messaging device, game console, tablet computer, wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Furthermore, these computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (which may include, but is not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A data detection method is applied to a network device, the network device comprises a first storage medium and a second storage medium, the first storage medium comprises M sub-storage media, and the method comprises the following steps:
storing data to be written into a designated storage position of the second storage medium, and acquiring unique hot code data corresponding to the data to be written according to the designated storage position;
dividing the data to be written into M sub-write-in data, wherein different sub-write-in data correspond to different sub-storage media; for each sub-write data, determining a storage address of the sub-write data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-write data; generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address;
dividing data to be detected into M pieces of sub-detection data, wherein different sub-detection data correspond to different sub-storage media; for each piece of sub-detection data, determining a storage address of the sub-detection data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-detection data;
determining whether the network equipment stores the data to be detected or not according to the read M decoded data;
wherein, the length of the M decoded data is N bits, and determining whether the network device stores the data to be detected according to the read M decoded data includes:
if the S bit of each of the M decoded data is a first identifier, determining that the network equipment stores the data to be detected; otherwise, determining that the network equipment does not store the data to be detected.
2. The method of claim 1,
acquiring the one-hot code data corresponding to the data to be written according to the specified storage position, wherein the acquiring comprises the following steps:
setting a bit corresponding to the designated storage position in the one-hot code data as a first identifier;
setting a bit which is not corresponding to the appointed storage position in the one-hot code data as a second identifier;
the second storage medium comprises N storage positions, the one-hot code data comprises N bits, and different storage positions correspond to different bits.
3. The method of claim 1,
after determining that the network device stores the data to be detected, the method further includes:
and the storage position for outputting the data to be detected is the S-th storage position of the second storage medium.
4. The method according to claim 1 or 2, wherein before storing the data to be written in the designated storage location of the second storage medium, the method further comprises:
deleting stored data from the designated storage location;
acquiring reverse code data corresponding to the stored data according to the appointed storage position; the reverse code data comprises N bits, the bit corresponding to the appointed storage position in the reverse code data is a second identifier, and the bit not corresponding to the appointed storage position in the reverse code data is a first identifier;
dividing the stored data into M sub-storage data, wherein different sub-storage data correspond to different sub-storage media; for each piece of sub-storage data, determining a storage address of the sub-storage data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-storage data; and generating new decoding data according to the reverse code data and the decoding data, and storing the new decoding data to the storage address.
5. The method according to claim 1 or 2,
the depth of the second storage medium is N, and the bit width of the second storage medium is P;
the length of the data to be written is P, and the length of each sub-written data is P/M;
for each sub-storage medium in the first storage medium, the depth of the sub-storage medium is set based on the length of sub-write data, and the bit width of the sub-storage medium is N.
6. A logic chip comprising a first storage medium and a second storage medium, the first storage medium comprising M sub-storage media, the logic chip comprising:
the data writing module is used for storing the data to be written into a specified storage position of a second storage medium;
the decoding module is used for acquiring the one-hot code data corresponding to the data to be written according to the specified storage position and outputting the one-hot code data to the matching module;
the selector module is used for acquiring data to be written and outputting the data to be written to the matching module;
the matching module is used for dividing the data to be written into M sub-write-in data, and different sub-write-in data correspond to different sub-storage media; for each sub-write data, determining a storage address of the sub-write data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-write data; generating new decoding data according to the one-hot code data and the decoding data, and storing the new decoding data to the storage address;
the selector module is also used for outputting the data to be detected to the matching module;
the matching module is further used for dividing the data to be detected into M pieces of sub-detection data, and different sub-detection data correspond to different sub-storage media; for each piece of sub-detection data, determining a storage address of the sub-detection data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-detection data; determining whether the network equipment stores the data to be detected or not according to the read M decoded data;
the length of the M decoded data is N bits, and the matching module is specifically configured to, when determining whether the network device stores the data to be detected according to the read M decoded data:
if the S bit of each of the M decoded data is a first identifier, determining that the network equipment stores the data to be detected; otherwise, determining that the network equipment does not store the data to be detected.
7. The logic chip of claim 6,
the coding module is specifically configured to: setting a bit corresponding to the designated storage position in the one-hot code data as a first identifier; setting a bit which is not corresponding to the appointed storage position in the one-hot code data as a second identifier; the second storage medium comprises N storage positions, the one-hot code data comprises N bits, and different storage positions correspond to different bits.
8. The logic chip of claim 6,
the matching module is further configured to: and when the network equipment stores the data to be detected, the storage position for outputting the data to be detected is the S-th storage position of the second storage medium.
9. The logic chip of claim 6 or 7,
the data writing module is further used for deleting the stored data from the specified storage position before the data to be written is stored in the specified storage position of the second storage medium;
the decoding module is further used for acquiring reverse code data corresponding to the stored data according to the specified storage position and outputting the reverse code data to the matching module; the reverse code data comprises N bits, the bit corresponding to the appointed storage position in the reverse code data is a second identifier, and the bit not corresponding to the appointed storage position in the reverse code data is a first identifier;
the selector module is also used for acquiring the stored data and outputting the stored data to the matching module;
the matching module is further used for dividing the stored data into M sub-storage data, and different sub-storage data correspond to different sub-storage media; for each piece of sub-storage data, determining a storage address of the sub-storage data, and reading decoded data from the storage address of a sub-storage medium corresponding to the sub-storage data; and generating new decoding data according to the reverse code data and the decoding data, and storing the new decoding data to the storage address.
10. A network device comprising a CPU and a logic chip according to any one of claims 6 to 9.
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