CN110704335A - Data reading and writing method and device based on asynchronous ring buffer - Google Patents

Data reading and writing method and device based on asynchronous ring buffer Download PDF

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Publication number
CN110704335A
CN110704335A CN201910829304.1A CN201910829304A CN110704335A CN 110704335 A CN110704335 A CN 110704335A CN 201910829304 A CN201910829304 A CN 201910829304A CN 110704335 A CN110704335 A CN 110704335A
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data
ring buffer
size
read
asynchronous ring
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张羽
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Suzhou Wave Intelligent Technology Co Ltd
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Suzhou Wave Intelligent Technology Co Ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols

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Abstract

The application discloses a data reading and writing method and device based on an asynchronous ring buffer area, comprising the following steps: determining the size of the residual storage space when writing data; and if the size of the data to be written is not smaller than the data size of the data to be written, writing the data to be written into the residual storage space of the ring buffer area according to the write pointer, and updating the write pointer. When data is read, determining the size of cache data; comparing the size of the cache data with the size of the target read data, and determining the smaller value of the cache data and the target read data; and reading the cache data in the ring cache region according to the read pointer and the size of the target data, and updating the read pointer of the asynchronous ring cache region. Therefore, if the method is applied to a product upgrading scene, the condition that the hardware bus sends the data packet cannot be overtime can be ensured; moreover, this is less time consuming and more efficient than an implementation where all data is written to the memory first, then all data is read from the memory and written to the hardware storage.

Description

Data reading and writing method and device based on asynchronous ring buffer
Technical Field
The present application relates to the field of data processing technologies, and in particular, to a method and an apparatus for reading and writing data based on an asynchronous ring buffer.
Background
Product upgrades are commonplace and important to computer system products. For example, when a known bug exists in an old version of a product, it is usually necessary to complete the repair of the bug in the new version, and update the old version of the product with the new version of the product, so as to upgrade the product. For another example, when a new function needs to be added to an old version product, a user generally downloads a new version product (update file/upgrade file) having the new function to the local using the upgrade function to update the old version product with the new version product.
At present, for general computer system products, firmware programs are stored in flash hardware chips, and when the products are upgraded, a new version of firmware binary files are downloaded and stored in the flash hardware chips in the products through an upgrading tool. The general process is: the upgrading tool divides the binary file into a plurality of data packets and sends the data packets to the product system through the hardware bus, the product system caches the data packets in the memory, and after the binary file is received, the binary file is written into the flash hardware chip to complete upgrading.
However, in practical applications, the memory of some system products is relatively small, and the upgrade file may be relatively large. Such as: for a small computer system such as the Expander, the memory may be only 2M (megabyte), and the upgrade file is 1.5M, and after removing 1M of memory required for the Expander operation, the remaining 1M of memory is not enough to cache the upgrade file. For this reason, if the product receives a packet of data packets and then directly writes the packet into the flash, the memory is not used for buffering, although the problem of the size of the memory can be solved, the speed of a hardware bus in practical application is high, so that the transmission interval time of the two data packets is short, and the time required for writing the packet into the flash fluctuates when the packet is directly written into the flash. That is, the writing of the data packet may be completed in a short time, or it may take a long time to complete the writing of the data packet, so that when the writing process of the data packet into the flash takes a long time, the hardware bus may have a transmission timeout error, which may result in a product upgrade failure.
Disclosure of Invention
The embodiment of the application provides a data reading and writing method and device based on an asynchronous ring buffer area, so that successful upgrading of a product can be completed by using a small buffer area.
In a first aspect, an embodiment of the present application provides a data writing method based on an asynchronous ring buffer, where the method includes:
determining the size of the residual storage space of the asynchronous ring buffer according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
if the size of the residual storage space is not smaller than the data size of the data to be written, writing the data to be written into the residual storage space of the asynchronous ring buffer area according to the write pointer;
when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area;
and updating the write pointer of the asynchronous ring buffer area according to the write pointer of the asynchronous ring buffer area and the data size of the data to be written.
In some possible embodiments, the method further comprises:
and applying for a mutual exclusion lock to lock data writing operation before writing the data to be written into the asynchronous ring buffer.
In some possible embodiments, the method further comprises:
releasing the mutex lock after completing writing the data to be written into the asynchronous ring buffer.
Updating the write pointer of the asynchronous ring buffer area according to the write pointer of the asynchronous ring buffer area and the data size of the data to be written
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
In a second aspect, an embodiment of the present application further provides a data reading method based on an asynchronous ring buffer, where the method includes:
determining the cache data size of the asynchronous ring buffer area according to the maximum cache space size of the asynchronous ring buffer area and the read pointer and the write pointer of the asynchronous ring buffer area;
comparing the size of the cache data with the size of target read data to determine the size of the target data, wherein the size of the target data is the smaller value of the size of the cache data and the size of the target read data;
reading the cache data in the asynchronous ring buffer according to the read pointer and the size of the target data;
when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, continuing to read the data to be read at the head address of the readable data in the asynchronous ring buffer;
and updating the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
In some possible embodiments, the method further comprises:
and applying for a mutual exclusion lock to lock data write operation before reading the cache data in the asynchronous ring buffer.
In some possible embodiments, the method further comprises:
and releasing the mutual exclusion lock after finishing reading the cached data in the asynchronous ring buffer.
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
In a third aspect, an embodiment of the present application further provides an apparatus for writing data based on an asynchronous ring buffer, where the apparatus includes:
the determining module is used for determining the size of the residual storage space of the asynchronous ring buffer according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
the writing module is used for writing the data to be written into the residual storage space of the asynchronous ring buffer area according to the writing pointer if the size of the residual storage space is not smaller than the data size of the data to be written;
when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area;
and the updating module is used for updating the write pointer of the asynchronous ring buffer area according to the write pointer of the asynchronous ring buffer area and the data size of the data to be written.
In some possible embodiments, the apparatus further comprises:
and the application module is used for applying a mutual exclusion lock locking data writing operation before the data to be written is written into the asynchronous ring buffer.
In some possible embodiments, the apparatus further comprises:
and the releasing module is used for releasing the mutual exclusion lock after the data to be written is written into the asynchronous ring buffer.
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
In a fourth aspect, an embodiment of the present application further provides an asynchronous ring buffer based data reading apparatus, where the apparatus includes:
the determining module is used for determining the cache data size of the asynchronous ring buffer according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
the comparison module is used for comparing the cache data size with a target read data size and determining the target data size, wherein the target data size is the smaller value of the cache data size and the target read data size;
the reading module is used for reading the cache data in the annular cache region according to the reading pointer and the size of the target data;
when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, continuing to read the data to be read at the head address of the readable data in the asynchronous ring buffer;
and the updating module is used for updating the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
In some possible embodiments, the apparatus further comprises:
and the application module is used for applying a mutual exclusion lock to lock data write operation before reading the cache data in the asynchronous ring buffer area.
In some possible embodiments, the apparatus further comprises:
and the releasing module is used for releasing the mutual exclusion lock after the cache data in the asynchronous ring buffer area is read.
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
In the foregoing implementation manner of the embodiment of the present application, when data is written based on an asynchronous ring buffer, the size of the remaining storage space of the ring buffer may be determined according to the maximum buffer space size of the ring buffer and the read pointer and the write pointer of the ring buffer; if the size of the residual storage space is not smaller than the data size of the data to be written, the data to be written can be written into the residual storage space of the ring buffer area according to the write pointer; when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area; and then, updating the write pointer of the asynchronous ring buffer according to the write pointer of the ring buffer and the data size of the data to be written. Correspondingly, when data reading is carried out based on the asynchronous ring buffer, the cache data size of the asynchronous ring buffer can be determined according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer; then, comparing the size of the cache data with the size of target read data, and determining the size of the target data, wherein the size of the target data is the smaller value of the size of the cache data and the size of the target read data; then, according to the read pointer and the size of the target data, the cache data in the annular cache region can be read; when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer area and the data to be read is not completely read, the data to be read is continuously read at the head address of the readable data in the asynchronous ring buffer area; finally, the read pointer of the asynchronous ring buffer may be updated based on the read pointer and the target data size.
Therefore, when the system product is upgraded, data can be continuously written into the asynchronous ring buffer area, so that when the data is written into the asynchronous ring buffer area based on the hardware bus, the condition that the hardware bus sends a data packet without overtime can be ensured; and moreover, the written data packets can be read from the asynchronous ring buffer and written into the flash at the same time, and even if delay jitter occurs in the process of writing a certain data packet into the flash, the data packet overtime of the hardware bus cannot occur. The asynchronous ring buffer area is adopted, so that continuity can be achieved during writing or reading, namely data can be continuously stored from the first address of the buffer area after the data are written into the tail address of the buffer area, correspondingly, the data can be continuously read from the first address of the buffer area after the data stored by the tail address of the buffer area are read, the data writing and the data reading can adopt asynchronous operation, the data processing process of writing while reading can reduce the memory consumed by finally writing the data into a hardware memory such as a flash and the like, and compared with the implementation mode that all the data are written into the memory first and then all the data are read from the memory and written into the hardware memory, the time consumption is shorter, and the efficiency is higher.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a schematic diagram of an exemplary application scenario in an embodiment of the present application;
FIG. 2 is a flow chart illustrating a data reading and writing method based on an asynchronous ring buffer according to an embodiment of the present disclosure;
FIG. 3 is a diagram illustrating a read pointer being smaller than a write pointer in an embodiment of the present application;
FIG. 4 is a diagram illustrating a read pointer being larger than a write pointer in an embodiment of the present application;
FIG. 5 is a diagram illustrating a read pointer being equal to a write pointer in an embodiment of the present application;
FIG. 6 is a schematic structural diagram of an asynchronous ring buffer based data reading apparatus according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of an asynchronous ring buffer based data writing apparatus according to an embodiment of the present application.
Detailed Description
In practical applications, for some small computer systems, the internal memory is usually small, and when a system product is upgraded and updated, the size of the upgrade file may exceed the size of the remaining memory space of the internal memory, so that the upgrade file cannot be cached in the computer system. If the upgrade file is directly stored in the flash, and the memory is not used as a cache, although there is no requirement for the memory of the computer, because the upgrade file is transmitted to the flash through the hardware bus in the actual application scene, and the transmission speed of the hardware bus is usually fast, the transmission interval time of two adjacent data packets in the upgrade file is very short, if the previous data packet can be successfully written into the flash within the transmission interval, the next data packet can be successfully transmitted, and if the previous data packet is not successfully written into the flash within the transmission interval, the hardware bus may have transmission timeout errors, which affects the transmission failure of the subsequent data packet, thereby resulting in the product upgrade failure.
Based on this, the embodiment of the application provides a data reading and writing method based on an asynchronous ring buffer, and by writing and reading data in the ring buffer, successful upgrading of a product is completed by a small buffer. Specifically, when data is written based on the asynchronous ring buffer, the size of the remaining storage space of the ring buffer may be determined according to the maximum buffer space size of the ring buffer and the read pointer and the write pointer of the ring buffer; if the size of the residual storage space is not smaller than the data size of the data to be written, the data to be written can be written into the residual storage space of the ring buffer area according to the write pointer; when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area; and then, updating the write pointer of the asynchronous ring buffer according to the write pointer of the ring buffer and the data size of the data to be written. Correspondingly, when data reading is carried out based on the asynchronous ring buffer, the cache data size of the asynchronous ring buffer can be determined according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer; then, comparing the size of the cache data with the size of target read data, and determining the size of the target data, wherein the size of the target data is the smaller value of the size of the cache data and the size of the target read data; then, according to the read pointer and the size of the target data, the cache data in the annular cache region can be read; when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer area and the data to be read is not completely read, the data to be read is continuously read at the head address of the readable data in the asynchronous ring buffer area; finally, the read pointer of the asynchronous ring buffer may be updated based on the read pointer and the target data size.
Therefore, when the system product is upgraded, data can be continuously written into the asynchronous ring buffer area, so that when the data is written into the asynchronous ring buffer area based on the hardware bus, the condition that the hardware bus sends a data packet without overtime can be ensured; and moreover, the written data packets can be read from the asynchronous ring buffer and written into the flash at the same time, and even if delay jitter occurs in the process of writing a certain data packet into the flash, the data packet overtime of the hardware bus cannot occur. The asynchronous ring buffer area is adopted, so that continuity can be achieved during writing or reading, namely data can be continuously stored from the first address of the buffer area after the data are written into the tail address of the buffer area, correspondingly, the data can be continuously read from the first address of the buffer area after the data stored by the tail address of the buffer area are read, the data writing and the data reading can adopt asynchronous operation, the data processing process of writing while reading can reduce the memory consumed by finally writing the data into a hardware memory such as a flash and the like, and compared with the implementation mode that all the data are written into the memory first and then all the data are read from the memory and written into the hardware memory, the time consumption is shorter, and the efficiency is higher.
As an example, the embodiment of the present application may be applied to an exemplary application scenario as shown in fig. 1. In this scenario, the terminal 101 has a product upgrade file for updating the Expander system 102 thereon, and data interaction between the terminal 101 and the Expander system 102 can be performed through a USB bus. When a product of the Expander system 102 needs to be upgraded, the terminal 101 may send an upgrade file to the Expander system 102 through the USB bus; in the process of receiving the upgrade file (including a plurality of data packets), the Expander system 102 may determine the size of the remaining storage space of the asynchronous ring buffer according to the maximum size of the cache space of the asynchronous ring buffer of the Expander system 102, and the read pointer and the write pointer of the asynchronous ring buffer, and if it is determined that the size of the remaining storage space is not smaller than the size of the data packets, the write pointer may write the data packets into the remaining storage space of the asynchronous ring buffer. When the data packet is written into the tail address of the writable data in the asynchronous ring buffer area and the data packet is not completely written, the data packet is continuously written into the head address of the writable data in the asynchronous ring buffer area, and the write pointer is updated according to the write pointer and the size of the data packet. When the data written into the asynchronous ring buffer is written into the flash memory of the Expander system 102, the Expander system 102 can determine the cache data size of the current asynchronous ring buffer according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer; the Expander system 102 may then compare the size of the cache data with the size of the data to be read this time, determine the smaller value of the size, and read the cache data starting at the read pointer of the asynchronous ring buffer with the smaller value. When the tail address of the readable data in the asynchronous ring buffer area is read and the data is not completely read, the cache data can be continuously read at the head address of the readable data in the asynchronous ring buffer area; when the data is completely read, the read pointer can be updated according to the read pointer and the size (i.e. the smaller value) of the data read this time. According to the process, while data is written into the asynchronous ring buffer of the Expander system 102, the data written into the buffer is read and written into the flash memory of the Expander system 102, so that successful writing of a larger upgrade file into the flash memory can be realized with a smaller buffer, and the product upgrade of the Expander system 102 is completed.
It is to be understood that the above scenario is only one example of a scenario provided in the embodiment of the present application, and the embodiment of the present application is not limited to this scenario. For example, in other possible implementations, the technical solution of the embodiment of the present application may also be applied to other small computer systems, and is not limited to the Expander system 102 described above. For another example, the embodiment of the present application is not limited to be applied to a scenario of product upgrade, and all application scenarios with insufficient memory and high data read-write frequency may be applied to the technical solution of the embodiment of the present application. In summary, the embodiments of the present application can be applied to any applicable application scenario, and are not limited to the scenario examples described above.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, various non-limiting embodiments accompanying the present application examples are described below with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 2, fig. 2 is a schematic flow chart illustrating a data writing and reading method based on an asynchronous ring buffer in an embodiment of the present application, where the method specifically includes:
s201: and determining the size of the residual storage space of the asynchronous ring buffer according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer.
In this embodiment, before writing data into the asynchronous ring buffer once, it may be predetermined whether the asynchronous ring buffer has enough storage space to buffer the data. If the storage space is enough, the data can be written into the asynchronous ring buffer, and if the storage space is not enough, the data cannot be written into the asynchronous ring buffer at one time, and at this time, an alarm can be triggered or a cache error-reporting prompt can be performed.
It should be noted that, in this embodiment, a read pointer and a write pointer may be set to identify a start address when data is read and written. Taking a write pointer as an example, the write pointer may identify a starting cache address of data when the data is written into an asynchronous ring buffer, for example, when the write pointer points to the storage address 0082, if there is data to be cached into the asynchronous ring buffer, a first data may be cached at the storage address 0082 pointed by the write pointer, and a second data and a third data may be cached in the storage address 0083 and the storage address 0084 sequentially according to an address order. Accordingly, when reading the cached data in the asynchronous ring buffer, the data can be read starting from the memory address pointed by the read pointer. Therefore, according to the address sequence in this embodiment, the address space between the read pointer and the write pointer is usually cached with data, and the address space between the write pointer and the read pointer is usually not cached with data, which is the remaining storage space. As shown in FIG. 3, the blank area between the read pointer and the write pointer is the area where data is buffered, and the shaded area between the write pointer and the read pointer is the area where data is not buffered.
In an exemplary embodiment, in the process of determining the size of the remaining storage space of the asynchronous ring buffer, the determination may be specifically made according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer. As shown in fig. 3, the Size of the maximum buffer space in the asynchronous ring buffer is Size, the memory address pointed by the read pointer is RP, the memory address pointed by the write pointer is WP (WP > RP), and the Size of the remaining memory space in the asynchronous ring buffer is | Size- (WP-RP) |.
It is noted that in the example shown in fig. 3, WP > RP, but in other possible scenario examples, the memory address WP pointed by the write pointer may be smaller than the memory address RP pointed by the read pointer, as shown in fig. 4, the remaining memory space of the asynchronous ring buffer is WP-to-RP, and the remaining memory space size is (RP-WP).
In addition, when the memory address WP pointed by the write pointer is equal to the memory address RP pointed by the read pointer, as shown in fig. 5, the remaining memory space Size of the asynchronous ring buffer is equal to the maximum buffer space Size.
As an example, the address of the maximum buffer space of the asynchronous ring buffer may be characterized by a one-dimensional array, and accordingly, the length of the one-dimensional array may be the address length of the maximum buffer space.
S202: if the size of the residual storage space is determined to be not smaller than the data size of the data to be written, writing the data to be written into the residual storage space of the asynchronous ring buffer area according to the write pointer; when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area.
It is understood that when the size of the remaining storage space is not smaller than the data size of the data to be written, it indicates that the current asynchronous ring buffer has enough storage space to buffer the data to be written, and therefore, the data to be written can be written into the remaining storage space of the asynchronous ring buffer. In a specific implementation, the data to be written may be cached beginning at the memory address pointed by the write pointer in the address order. That is, the first data in the data to be written may be written to the memory address a pointed to by the write pointer, the second data in the data to be written may be written to the memory address B next to the memory address a, and so on.
It should be noted that, in the process of writing the data to be written into the asynchronous ring buffer area, if the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written continues to be written into the head address of the writable data in the asynchronous ring buffer area. For example, assuming that the storage addresses of the asynchronous ring buffer are 0000 (first address) to 2048 (last address), after the data to be written is written into the last address 2048, if there is still some data in the data to be written that is not written into the asynchronous ring buffer, the data that is not written into the data to be written may continue to be cached at the first address 0000 of the asynchronous ring buffer. In this embodiment, the "ring" in the asynchronous ring buffer means that data is continuous when being stored in the buffer, that is, after the data is cached to the storage address 2048, the data is continuously cached from the storage address 0000. Accordingly, the data read from the buffer is also continuous, and after the buffered data is read from memory address 2048, the buffered data continues to be read from memory address 0000.
S203: and updating the write pointer of the asynchronous ring buffer according to the write pointer of the asynchronous ring buffer and the data size of the data to be written.
In this embodiment, after the data to be written is written into the asynchronous ring buffer, the write pointer in the asynchronous ring buffer may be updated. In concrete implementation, when the size of a storage space between a storage address pointed by the write pointer and a tail address of writable data in the asynchronous ring buffer is larger than the size of data to be written, the updated storage address pointed by the write pointer is (WP + W). Where "WP" is the memory address pointed by the write pointer before update, and "W" is the size of the data to be written. And when the size of the storage space between the storage address pointed by the write pointer and the tail address of the writable data in the asynchronous ring buffer area is equal to the size of the data to be written, the updated storage address pointed by the write pointer is the head address of the writable data in the asynchronous ring buffer area. When the size of the storage space between the storage address pointed by the write pointer and the tail address of the writable data in the asynchronous ring buffer is smaller than the size of the data to be written, the storage space between the storage address pointed by the write pointer and the tail address of the writable data in the asynchronous ring buffer is not enough to store the whole data to be written, the rest data in the data to be written can be stored from the first address of the writable data in the asynchronous ring buffer, and correspondingly, the storage address pointed by the updated write pointer is (W- (LP-WP)), wherein 'WP' is the storage address pointed by the write pointer before updating, 'W' is the size of the data to be written, and 'LP' is the tail address of the writable data in the asynchronous ring buffer.
In practical applications, in order to ensure that the process of writing data into the asynchronous ring buffer is not affected by data reading operation, in some possible embodiments, a mutex lock may be applied to lock data writing operation before writing data (packet) to be written into the asynchronous ring buffer, so that, at the same time, only the writing operation of the packet may be performed in the asynchronous ring buffer, but the reading operation of the data may not be performed.
Accordingly, after the data (data packet) to be written is written into the asynchronous ring buffer, a data reading operation may be performed, for example, the following steps S204 to S207 are performed to read the cache data, and at this time, in order to avoid an influence on the data reading operation, the applied mutex lock for the writing operation may be released.
S204: and determining the cache data size of the asynchronous ring buffer according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer.
In this embodiment, after the data is cached in the asynchronous ring buffer, the cached data may be read out, so as to write the cached data into corresponding hardware, such as a flash memory.
When the data in the asynchronous ring buffer needs to be read each time, the size of the data cached in the asynchronous ring buffer can be determined first, so that how much data can be read from the asynchronous ring buffer can be determined later. In a specific implementation, the cache data size of the asynchronous ring buffer may be determined according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer. For example, as shown in fig. 3, when the memory address RP pointed by the read pointer is smaller than the memory address WP pointed by the write pointer, the memory space in the asynchronous ring buffer with the cache data is RP to WP, and the cache data size is ((WP-RP) × the amount of data that can be stored per memory address). When the memory address RP pointed by the read pointer is larger than the memory address WP pointed by the pointer, as shown in fig. 4, the memory space in the asynchronous ring buffer with the cache data is from the first address to WP (WP-1) and from the RP to the last address, and the cache data size is the product of the memory space and the amount of data that can be stored by each memory address; the first address refers to a first address at which data can be cached (written) in the asynchronous ring buffer, and similarly, the last address refers to a last address at which data can be cached (written) in the asynchronous ring buffer. When the memory address RP pointed to by the read pointer is equal to the memory address WP pointed to by the pointer, as shown in fig. 5, no data is cached in the asynchronous ring buffer.
S205: and comparing the determined cache data size with the target read data size to determine the target data size, wherein the target data size is the smaller value of the cache data size and the target read data size.
In practical applications, when reading data from the asynchronous ring buffer, the amount of data to be read is determined by the size of the data to be read (i.e. the target read data size) and the size of the cache data in the asynchronous ring buffer, specifically, the smaller value of the target read data size and the cache data size. For example, assuming that the size of the data to be read is 100 bytes, and the buffer data in the asynchronous ring buffer is only 90 bytes, only 90 bytes of data can be read from the asynchronous ring buffer at most, that is, the length of the finally read data is the smaller of 100 bytes and 90 bytes; for another example, if the size of the data to be read is 50 bytes, and the cache data in the asynchronous ring buffer is still 90 bytes, only 50 bytes of cache data need to be read from the asynchronous ring buffer, that is, the length of the finally read data is the smaller of 50 bytes and 90 bytes.
S206: reading the cache data in the asynchronous ring buffer according to the read pointer and the size of the target data; when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, the data to be read is continuously read at the head address of the readable data in the asynchronous ring buffer.
In a specific implementation, the cache data (i.e., the data to be read) may be read beginning at the memory address pointed by the read pointer in the address order. That is, the first data is read from the memory address A pointed to by the read pointer, then the second data is read from the memory address B next to the memory address A, and so on.
It should be noted that, in the process of reading data in the asynchronous ring buffer, if the data is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, the data to be read is continuously read at the head address of the readable data in the asynchronous ring buffer. For example, assuming that the storage addresses of the asynchronous ring buffer are 0000 (head address) to 2048 (tail address), after the cached data in the tail address 2048 is read, if the data reading process is not completed (i.e. the read operation is not completed), the data cached in the asynchronous ring buffer can be continuously read at the head address 0000. In this embodiment, the "ring" in the asynchronous ring buffer means that the reading of data from the asynchronous ring buffer is continuous, i.e. after reading to the memory address 2048, the data is continuously read from the memory address 0000.
S207: and updating the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
In this embodiment, after the reading of the cache data is completed, the read pointer of the asynchronous ring buffer may be updated. In concrete implementation, according to the address sequence, when the memory address pointed by the read pointer is smaller than the memory address pointed by the write pointer, the memory address pointed by the updated read pointer is (RP + R), where "RP" is the memory address pointed by the read pointer before updating, and "R" is the size of the data read this time. And when the memory address pointed by the read pointer is equal to the memory address pointed by the write pointer, the cache data is not read from the asynchronous ring buffer at this time, and the memory address pointed by the read pointer is kept unchanged. When the memory address pointed by the read pointer is smaller than the memory address pointed by the write pointer, after the memory address pointed by the read pointer is read to the tail address of the readable data in the asynchronous ring buffer, the data is continuously read from the head address of the readable data in the asynchronous ring buffer, and the memory address pointed by the updated read pointer is (R- (LP-RP)), where "RP" is the memory address pointed by the read pointer before updating, "R" is the size of the data to be read, and "LP" is the tail address of the readable data in the asynchronous ring buffer (usually the same as the tail address of the writable data).
In practical applications, in order to ensure that the process of reading data in the asynchronous ring buffer is not affected by the data writing operation, in some possible embodiments, a mutex lock may be applied to lock the data reading operation before the data to be read is read from the asynchronous ring buffer, so that the data reading operation can be performed only in the asynchronous ring buffer at the same time, and the data writing operation cannot be performed.
Accordingly, after the reading of the cache data in the asynchronous ring buffer is completed, the data writing operation may be performed, for example, the next data packet may continue to be cached (it may be understood that, in a product upgrade scenario, the upgrade file includes a plurality of data packets). At this time, in order to avoid the influence of the write operation on the next packet, the already applied exclusive lock for the read operation may be released.
In this embodiment, if the method is applied to a product upgrade scenario, when a system product is upgraded, data may be continuously written into the asynchronous ring buffer, so that when data is written into the asynchronous ring buffer based on a hardware bus, it may be ensured that a hardware bus does not send a data packet overtime; and moreover, the written data packets can be read from the asynchronous ring buffer and written into the flash at the same time, and even if delay jitter occurs in the process of writing a certain data packet into the flash, the data packet overtime of the hardware bus cannot occur. The asynchronous ring buffer area is adopted, so that continuity can be achieved during writing or reading, namely data can be continuously stored from the first address of the buffer area after the data are written into the tail address of the buffer area, correspondingly, the data can be continuously read from the first address of the buffer area after the data stored by the tail address of the buffer area are read, the data writing and the data reading can adopt asynchronous operation, the data processing process of writing while reading can reduce the memory consumed by finally writing the data into a hardware memory such as a flash and the like, and compared with the implementation mode that all the data are written into the memory first and then all the data are read from the memory and written into the hardware memory, the time consumption is shorter, and the efficiency is higher. Of course, the embodiment of the application can also be applied to other application scenarios, and is not limited to a product upgrading scenario.
In addition, the embodiment of the application also provides a data writing device based on the asynchronous ring buffer. Referring to fig. 6, fig. 6 is a schematic structural diagram illustrating an asynchronous ring buffer based data writing apparatus in an embodiment of the present application, where the apparatus 600 includes:
a determining module 601, configured to determine a size of a remaining storage space of an asynchronous ring buffer according to a maximum buffer space size of the asynchronous ring buffer and a read pointer and a write pointer of the asynchronous ring buffer;
a writing module 602, configured to write the data to be written into the remaining storage space of the asynchronous ring buffer according to the write pointer if the size of the remaining storage space is not smaller than the data size of the data to be written;
when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area;
an updating module 603, configured to update the write pointer of the asynchronous ring buffer according to the write pointer of the asynchronous ring buffer and the data size of the data to be written.
In some possible embodiments, the apparatus 600 further includes:
and the application module is used for applying a mutual exclusion lock locking data writing operation before the data to be written is written into the asynchronous ring buffer.
In some possible embodiments, the apparatus 600 further includes:
and the releasing module is used for releasing the mutual exclusion lock after the data to be written is written into the asynchronous ring buffer.
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
It should be noted that, the writing apparatus described in this embodiment corresponds to the writing method described in the foregoing method embodiment, and specific implementation thereof can refer to the description of relevant parts in the method embodiment, which is not described herein again.
In addition, the embodiment of the application also provides a data reading device based on the asynchronous ring buffer. Referring to fig. 7, fig. 7 is a schematic structural diagram illustrating an asynchronous ring buffer based data reading apparatus 700 according to an embodiment of the present application, where the apparatus includes:
a determining module 701, configured to determine a size of cache data of an asynchronous ring buffer according to a maximum cache space size of the asynchronous ring buffer and a read pointer and a write pointer of the asynchronous ring buffer;
a comparing module 702, configured to compare the size of the cache data with a size of target read data, and determine a size of the target data, where the size of the target data is a smaller value of the size of the cache data and the size of the target read data;
a reading module 703, configured to read the cache data in the annular cache region according to the size of the read pointer and the size of the target data;
when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, continuing to read the data to be read at the head address of the readable data in the asynchronous ring buffer;
an updating module 704, configured to update the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
In some possible embodiments, the apparatus 700 further comprises:
and the application module is used for applying a mutual exclusion lock to lock data write operation before reading the cache data in the asynchronous ring buffer area.
In some possible embodiments, the apparatus 700 further comprises:
and the releasing module is used for releasing the mutual exclusion lock after the cache data in the asynchronous ring buffer area is read.
In some possible embodiments, the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
It should be noted that, the reading apparatus described in this embodiment corresponds to the reading method described in the foregoing method embodiment, and specific implementation thereof can refer to the description of relevant parts in the method embodiment, which is not described herein again.
As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the above embodiment methods can be implemented by software plus a general hardware platform. Based on such understanding, the technical solution of the present application may be embodied in the form of a software product, which may be stored in a storage medium, such as a read-only memory (ROM)/RAM, a magnetic disk, an optical disk, or the like, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network communication device such as a router) to execute the method according to the embodiments or some parts of the embodiments of the present application.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the apparatus embodiment, since it is substantially similar to the method embodiment, it is relatively simple to describe, and reference may be made to some descriptions of the method embodiment for relevant points. The above-described embodiments of the apparatus are merely illustrative, and the modules described as separate parts may or may not be physically separate, and the parts displayed as modules may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
The above description is only an exemplary embodiment of the present application, and is not intended to limit the scope of the present application.

Claims (10)

1. A data writing method based on an asynchronous ring buffer area is characterized by comprising the following steps:
determining the size of the residual storage space of the asynchronous ring buffer according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
if the size of the residual storage space is not smaller than the data size of the data to be written, writing the data to be written into the residual storage space of the asynchronous ring buffer area according to the write pointer;
when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area;
and updating the write pointer of the asynchronous ring buffer area according to the write pointer of the asynchronous ring buffer area and the data size of the data to be written.
2. The method of claim 1, further comprising:
and applying for a mutual exclusion lock to lock data writing operation before writing the data to be written into the asynchronous ring buffer.
3. The method of claim 2, further comprising:
releasing the mutex lock after completing writing the data to be written into the asynchronous ring buffer.
4. The method of claim 1, wherein the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and wherein the length of the one-dimensional array is the address length of the maximum buffer space.
5. A data reading method based on an asynchronous ring buffer is characterized by comprising the following steps:
determining the cache data size of the asynchronous ring buffer area according to the maximum cache space size of the asynchronous ring buffer area and the read pointer and the write pointer of the asynchronous ring buffer area;
comparing the size of the cache data with the size of target read data to determine the size of the target data, wherein the size of the target data is the smaller value of the size of the cache data and the size of the target read data;
reading the cache data in the asynchronous ring buffer according to the read pointer and the size of the target data;
when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, continuing to read the data to be read at the head address of the readable data in the asynchronous ring buffer;
and updating the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
6. The method of claim 5, further comprising:
and applying for a mutual exclusion lock to lock data write operation before reading the cache data in the asynchronous ring buffer.
7. The method of claim 6, further comprising:
and releasing the mutual exclusion lock after finishing reading the cached data in the asynchronous ring buffer.
8. The method of claim 5, wherein the address of the maximum buffer space of the asynchronous ring buffer is characterized by a one-dimensional array, and the length of the one-dimensional array is the address length of the maximum buffer space.
9. An apparatus for writing data based on an asynchronous ring buffer, the apparatus comprising:
the determining module is used for determining the size of the residual storage space of the asynchronous ring buffer according to the maximum buffer space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
the writing module is used for writing the data to be written into the residual storage space of the asynchronous ring buffer area according to the writing pointer if the size of the residual storage space is not smaller than the data size of the data to be written;
when the data to be written is written into the tail address of the writable data in the asynchronous ring buffer area and the data to be written is not completely written, the data to be written is continuously written into the head address of the writable data in the asynchronous ring buffer area;
and the updating module is used for updating the write pointer of the asynchronous ring buffer area according to the write pointer of the asynchronous ring buffer area and the data size of the data to be written.
10. An asynchronous ring buffer based data reading apparatus, the apparatus comprising:
the determining module is used for determining the cache data size of the asynchronous ring buffer according to the maximum cache space size of the asynchronous ring buffer and the read pointer and the write pointer of the asynchronous ring buffer;
the comparison module is used for comparing the cache data size with a target read data size and determining the target data size, wherein the target data size is the smaller value of the cache data size and the target read data size;
the reading module is used for reading the cache data in the annular cache region according to the reading pointer and the size of the target data;
when the data to be read is read to the tail address of the readable data in the asynchronous ring buffer and the data to be read is not completely read, continuing to read the data to be read at the head address of the readable data in the asynchronous ring buffer;
and the updating module is used for updating the read pointer of the asynchronous ring buffer according to the read pointer and the size of the target data.
CN201910829304.1A 2019-09-03 2019-09-03 Data reading and writing method and device based on asynchronous ring buffer Pending CN110704335A (en)

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111865824A (en) * 2020-06-19 2020-10-30 重庆川仪自动化股份有限公司 Method and system for designing double-pointer annular buffer area in serial port communication
CN111913659A (en) * 2020-07-14 2020-11-10 长沙景嘉微电子股份有限公司 Block data processing method, device and system and storage medium
CN111966498A (en) * 2020-08-27 2020-11-20 南京电研电力自动化股份有限公司 Power distribution room Internet of things gateway data rapid processing method and system and storage medium
CN112130765A (en) * 2020-09-17 2020-12-25 智新控制系统有限公司 EEPROM data reading and writing method and device
CN112199898A (en) * 2020-11-11 2021-01-08 北京三维天地科技股份有限公司 Instrument and equipment fault prediction and health management algorithm based on big data
CN112732448A (en) * 2021-01-18 2021-04-30 国汽智控(北京)科技有限公司 Memory space allocation method and device and computer equipment
CN113848454A (en) * 2021-09-09 2021-12-28 海光信息技术股份有限公司 Chip testing method and chip testing machine
CN113961212A (en) * 2021-10-29 2022-01-21 重庆长安汽车股份有限公司 OTA installation package deployment method and system based on Ethernet and method for upgrading vehicle controller
CN115934023A (en) * 2021-08-31 2023-04-07 华为技术有限公司 Data processing method, data processing device and related equipment
CN117196929A (en) * 2023-09-25 2023-12-08 沐曦集成电路(上海)有限公司 Software and hardware interaction system based on fixed-length data packet
CN117312200A (en) * 2023-11-27 2023-12-29 沐曦集成电路(南京)有限公司 Multi-channel data DMA system based on ring buffer
CN117407148A (en) * 2022-07-08 2024-01-16 华为技术有限公司 Data writing method, data reading device, electronic equipment and storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104038806A (en) * 2014-06-11 2014-09-10 深圳市九洲电器有限公司 Application interface display method and set top box
CN106559703A (en) * 2015-09-28 2017-04-05 青岛海信电器股份有限公司 A kind for the treatment of method and apparatus of voice data
US20180137043A1 (en) * 2013-12-30 2018-05-17 Microsoft Technology Licensing, Llc Re-Use of Invalidated Data in Buffers
CN108491333A (en) * 2018-03-21 2018-09-04 广州多益网络股份有限公司 Method for writing data, device, equipment and the medium of buffer circle

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180137043A1 (en) * 2013-12-30 2018-05-17 Microsoft Technology Licensing, Llc Re-Use of Invalidated Data in Buffers
CN104038806A (en) * 2014-06-11 2014-09-10 深圳市九洲电器有限公司 Application interface display method and set top box
CN106559703A (en) * 2015-09-28 2017-04-05 青岛海信电器股份有限公司 A kind for the treatment of method and apparatus of voice data
CN108491333A (en) * 2018-03-21 2018-09-04 广州多益网络股份有限公司 Method for writing data, device, equipment and the medium of buffer circle

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
周霞: "针对数字电视码流的硬加速与同步控制策略研究", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111865824A (en) * 2020-06-19 2020-10-30 重庆川仪自动化股份有限公司 Method and system for designing double-pointer annular buffer area in serial port communication
CN111913659A (en) * 2020-07-14 2020-11-10 长沙景嘉微电子股份有限公司 Block data processing method, device and system and storage medium
CN111913659B (en) * 2020-07-14 2022-11-04 长沙景嘉微电子股份有限公司 Block data processing method, device and system and storage medium
CN111966498B (en) * 2020-08-27 2023-08-25 南京电研电力自动化股份有限公司 Rapid processing method, system and storage medium for gateway data of Internet of things in power distribution room
CN111966498A (en) * 2020-08-27 2020-11-20 南京电研电力自动化股份有限公司 Power distribution room Internet of things gateway data rapid processing method and system and storage medium
CN112130765A (en) * 2020-09-17 2020-12-25 智新控制系统有限公司 EEPROM data reading and writing method and device
CN112199898A (en) * 2020-11-11 2021-01-08 北京三维天地科技股份有限公司 Instrument and equipment fault prediction and health management algorithm based on big data
CN112199898B (en) * 2020-11-11 2021-06-15 北京三维天地科技股份有限公司 Instrument and equipment fault prediction and health management method based on big data
CN112732448A (en) * 2021-01-18 2021-04-30 国汽智控(北京)科技有限公司 Memory space allocation method and device and computer equipment
CN115934023A (en) * 2021-08-31 2023-04-07 华为技术有限公司 Data processing method, data processing device and related equipment
CN113848454A (en) * 2021-09-09 2021-12-28 海光信息技术股份有限公司 Chip testing method and chip testing machine
CN113961212A (en) * 2021-10-29 2022-01-21 重庆长安汽车股份有限公司 OTA installation package deployment method and system based on Ethernet and method for upgrading vehicle controller
CN113961212B (en) * 2021-10-29 2024-05-10 重庆长安汽车股份有限公司 OTA installation package deployment method and system based on Ethernet and method for upgrading vehicle controller
CN117407148A (en) * 2022-07-08 2024-01-16 华为技术有限公司 Data writing method, data reading device, electronic equipment and storage medium
CN117196929A (en) * 2023-09-25 2023-12-08 沐曦集成电路(上海)有限公司 Software and hardware interaction system based on fixed-length data packet
CN117196929B (en) * 2023-09-25 2024-03-08 沐曦集成电路(上海)有限公司 Software and hardware interaction system based on fixed-length data packet
CN117312200A (en) * 2023-11-27 2023-12-29 沐曦集成电路(南京)有限公司 Multi-channel data DMA system based on ring buffer
CN117312200B (en) * 2023-11-27 2024-02-02 沐曦集成电路(南京)有限公司 Multi-channel data DMA system based on ring buffer

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