CN110601721A - Dynamic management device for power consumption of digital subscriber line and application method - Google Patents

Dynamic management device for power consumption of digital subscriber line and application method Download PDF

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Publication number
CN110601721A
CN110601721A CN201911009533.5A CN201911009533A CN110601721A CN 110601721 A CN110601721 A CN 110601721A CN 201911009533 A CN201911009533 A CN 201911009533A CN 110601721 A CN110601721 A CN 110601721A
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China
Prior art keywords
power
saving
power consumption
subscriber line
fpga
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CN201911009533.5A
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Chinese (zh)
Inventor
肖东海
沈秋旭
颜兴茂
阮圣宽
魏涛
刘燕兵
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Sichuan Lingtong Telecommunications Co Ltd
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Sichuan Lingtong Telecommunications Co Ltd
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Priority to CN201911009533.5A priority Critical patent/CN110601721A/en
Publication of CN110601721A publication Critical patent/CN110601721A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/04Control of transmission; Equalising
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/50Systems for transmission between fixed stations via two-conductor transmission lines

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Interface Circuits In Exchanges (AREA)

Abstract

The invention discloses a dynamic management device for power consumption of a digital subscriber line and an application method thereof, wherein the dynamic management device comprises a local side device and a user side device which are connected through a twisted copper pair and used in pairs; the local-side device and the subscriber-side device are respectively configured to include: the DSL transceiver is provided with a general FPGA/DSP and a CPU comprising an SOC (system on chip), is connected with an analog front end AFE (analog front end) through a data bus, and is provided with a power-saving control interface for transmitting a digital-to-analog converter and receiving the digital-to-analog converter; the PHY interface chip is arranged at the front end of the DSL transceiver and has two energy-saving modes of saving and powering down; and the power supply module is used for supplying power to the DSL transceiver and the PHY interface chip. The invention provides a dynamic management device for power consumption of a digital subscriber line, which can provide a power-saving mode through the performance of devices and the cooperation among the devices through the structural design, thereby managing the functions of the devices under different working conditions.

Description

Dynamic management device for power consumption of digital subscriber line and application method
Technical Field
The present invention relates to an apparatus for use in data communication. More particularly, the present invention relates to a dynamic management device for power consumption in the case of digital subscriber line communication and an application method thereof.
Background
Digital Subscriber Line (DSL) technology is a High-speed transmission technology for data transmission through twisted pair lines, and includes Asymmetric Digital Subscriber Line (ADSL), Very-High-rate Digital Subscriber Line (VDSL), single-wire-pair Digital Subscriber Line (SDSL), single-wire-pair High-rate Digital Subscriber Line (SHDSL), and the like. When a digital subscriber line is used, when a plurality of communication devices are integrated into a narrow case, on one hand, the consumption demand of a power supply is large, and great challenges are provided for a power supply system, and on the other hand, the heat dissipation conditions in the case are limited, a large amount of heat cannot be dissipated, and great influences are caused on the performance, reliability, service life and the like of the devices. The total energy consumption of China is the second worldwide and the population is the first worldwide. In order to save material resources and energy resources, a series of policy measures for promoting energy conservation and emission reduction are made in all industries in China. The broadband access network field is more sensitive to equipment power consumption due to the huge equipment deployment quantity. Therefore, controlling the power consumption of a single device in a range as small as possible is one of the key problems to be solved in single device development.
In the actual use process, when the whole device is powered on, the digital subscriber line is always in the full power consumption working state, and the power consumption cannot be dynamically managed according to the connection condition of the twisted pair side opposite end and the connection condition of the local end ethernet service data, so that the waste of the power consumption is caused. Although the digital subscriber line has low single-path power consumption, the local side equipment is often configured with multiple paths of board cards due to wide application and large quantity, so that the reasonable energy-saving design is adopted, and the overall energy-saving effect is very considerable.
Disclosure of Invention
An object of the present invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
It is still another object of the present invention to provide a dynamic management apparatus for power consumption of a digital subscriber line, which can provide a power saving mode through the performance of the devices themselves and the cooperation between the devices through the structural design, so as to manage the functions of the devices under different working conditions.
It is still another object of the present invention to provide an application method of a dynamic management device for power consumption of a digital subscriber line, which designs low power consumption of a power supply system, low power consumption of an ethernet interface, and low power consumption of a DSL transceiver.
To achieve these objects and other advantages in accordance with the present invention, there is provided a dynamic management apparatus for power consumption of a digital subscriber line, including a central office device and a subscriber premises device connected by a twisted pair copper wire and used in pair;
wherein the office device and the subscriber device are respectively configured to include:
the DSL transceiver is provided with a general FPGA/DSP and a CPU comprising an SOC (system on chip), is connected with an analog front end AFE (analog front end) through a data bus, and is provided with a power-saving control interface for transmitting a digital-to-analog converter and receiving the digital-to-analog converter;
the PHY interface chip is arranged at the front end of the DSL transceiver, completes the data processing of the Ethernet 64b/65b or the data processing of the HDLC frame, and has two energy-saving modes of saving and powering down;
and the power supply module is used for supplying power to the DSL transceiver and the PHY interface chip.
Preferably, the FPGA/DSP is further connected with a memory FLASH, and the FPGA/DSP is provided with a power saving management interface;
the AFE is directly connected with a hybrid circuit to form a sending data link, and the hybrid circuit is connected with the AFE through a filter to form a receiving data link;
the hybrid circuit is connected with the twisted copper pair through the coupling unit.
Preferably, the power module completes the conversion from the input voltage to the board-level voltage, and further outputs four groups of voltages of 3.3V, 2.5V, 1.5V and 5V;
and the power supply module is provided with a power-saving control interface.
A method for dynamic management of power consumption for a digital subscriber line using a management device, providing a dynamic power consumption management model with a power saving mode configured to include:
the SOC detects the working state of the PHY interface in real time, and when the PHY is in a down state, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in a power-saving state.
Preferably, when the PHY is in the up state, detecting whether the AFE receives the carrier, if the carrier is received, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in the working state, the SOC completes the handshake link establishment, and the device enters the data transmission mode;
if the carrier is not received, the opposite terminal is not accessed into the equipment, the SOC controls a transmitting module for processing the FPGA/DSP digital signal and a transmitting circuit of the AFE to be in a power-saving state, and the transmitting direction enters a silent state.
Preferably, when the SOC controls the transmitting module for processing the FPGA/DSP digital signal and the transmitting circuit of the AFE to be in the power saving state, the SOC simultaneously controls the FPGA/DSP digital signal processing module to randomly transmit the carrier signal for a period of time at intervals, so as to avoid that the opposite end is in the same mute state, which results in that the system cannot establish a link.
Preferably, there is further provided a management interface power saving model, wherein the power saving model is configured to include:
when the FPGA/DSP of the digital user line device receives the power-saving control command through the management interface, the SOC controls the FPGA/DSP digital signal processing functional module to be in a reset state, and controls the PHY and the AFE to be in a power-saving state.
Preferably, there is further provided a control interface power saving model, wherein the power saving model is configured to include:
when the digital user line device receives the level of the power-saving control of the control interface, the power supply module is controlled to be in a power-saving state, so that the PHY, the DSL transceiver and the FLASH are in a power-down state.
The invention at least comprises the following beneficial effects:
the invention also discloses a power consumption dynamic management device, which can dynamically control the power saving of partial digital signal processing modules in an AFE and an FPGA/DSP of a DSL transceiver according to whether service access and line carrier exist or not, so that the DSL transceiver enters a power saving mode.
Secondly, the dynamic power consumption management device can be used for designing the power consumption of hardware such as a power module, a PHY interface chip, a DSL transceiver and the like through the structure, and providing a power saving mode through the cooperation of the devices, so as to manage the functions of the devices under different working conditions.
Thirdly, the invention designs a dynamic management device method for the power consumption of the digital subscriber line, which provides three designs of low power consumption of a power supply system, low power consumption of an Ethernet interface and low power consumption of a DSL transceiver, so that the digital subscriber line device applying the method can enter different power saving models according to the actual use condition, the device is prevented from being always in a full power consumption state working state, and the energy consumption is effectively saved.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
Fig. 1 is a block diagram of a communication system comprising digital subscriber line devices with dynamic power management in accordance with an embodiment of the present invention;
FIG. 2 is a functional block diagram of a digital subscriber line device with dynamic power management in accordance with another embodiment of the present invention;
FIG. 3 is a diagram illustrating a dynamic power management model of a digital subscriber line device according to another embodiment of the present invention;
FIG. 4 is a flow chart illustrating dynamic power management of a digital subscriber line device according to another embodiment of the present invention;
FIG. 5 is a schematic diagram of a power saving model of a receiving management interface of a digital subscriber line device according to another embodiment of the present invention;
FIG. 6 is a diagram of a power saving model of a receiving control interface of a digital subscriber line device according to another embodiment of the present invention;
fig. 7 is a schematic diagram of a filter circuit of a digital subscriber line device in another embodiment of the present invention;
FIG. 8 is an equivalent diagram of a hybrid circuit of a digital subscriber line device according to another embodiment of the present invention;
fig. 9 is a schematic diagram of a power module of a digital subscriber line device according to another embodiment of the invention.
Detailed Description
The present invention is further described in detail below with reference to the attached drawings so that those skilled in the art can implement the invention by referring to the description text.
It will be understood that terms such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.
Fig. 1-2 show an implementation form of a dynamic management device for power consumption of a digital subscriber line according to the present invention, which includes a local side device 1 and a user side device 2 connected by a twisted-pair copper wire and used in pairs, where one end of the local side device or the user side device operates in a master mode and the other end operates in a slave mode to form a data transmission channel of an ethernet service after connection is established between a master and a slave, and the local side device and the user side device, which are the same, can operate in the master mode and the slave mode and provide a service data interface, a management interface, a power saving control interface, and a twisted-pair copper wire interface to the outside;
wherein the office device and the subscriber device are respectively configured to include:
a DSL (digital subscriber line) transceiver 10, on which a general FPGA/DSP13 is disposed, which is connected to an analog front end AFE 14 through a data bus, and on which a power saving control interface for transmitting a digital-to-analog converter DAC and receiving the digital-to-analog converter DAC is disposed, the FPGA/DSP completes digital signal processing functions of the DSL transceiver, such as framing, deframing, modulation, demodulation, line equalization, digital filtering, service detection, and carrier detection modules; the service detection and carrier detection module can detect the service data of the PHY module and the carrier of the twisted pair, which is an important characteristic of the DSL transceiver of the invention different from other DSL transceivers; the SOC finishes handshaking link establishment of a master device and a slave device, and can control a relevant module to enter a power saving mode according to the service detection and carrier detection results of a DSL transceiver, and an AFE (analog front end): the power-saving control device comprises an ADC (analog to digital converter), a DAC (digital to analog converter), a line drive, a receiving amplifier, an analog echo cancellation, an analog filter and the like, completes the conversion from a digital signal to an analog signal, and provides power-saving control interfaces for the transmitting DAC and the receiving DAC;
the PHY interface chip 12 is arranged at the front end of the DSL transceiver, completes the data processing of the Ethernet 64b/65b or the data processing of the HDLC frame, and has two energy-saving modes of saving and powering down;
in the scheme, the PHY interface chip arranged in the device has two energy-saving modes of a power saving mode and a power failure mode, so that the whole device can further work in a low-power consumption state and be matched with the DSL transceiver to realize low-power consumption management under different working conditions.
In another example, the FPGA/DSP is further connected with a memory FLASH 15, which is used for storing configuration codes of the DSL transceiver, and the FPGA/DSP is provided with a power saving management interface;
the AFE is directly connected with a hybrid circuit 17 to form a transmitting data link, the hybrid circuit is connected with the AFE through a filter 16 to form a receiving data link, the filter is composed of a capacitance resistance device and used for filtering out-of-band noise of signals, and the hybrid circuit is composed of a capacitance resistance device and used for completing two-four-wire conversion and impedance matching between a line side and a chip side;
the hybrid circuit is connected with the twisted copper pair, the hybrid circuit is composed of a resistor and a transformer, two-four wire conversion and impedance matching of a chip side and a line side are completed, the filter and the hybrid circuit in the scheme belong to the prior art, and the structural connection diagram can be shown in figures 7-8, so that the hybrid circuit is matched with other devices of the device to form a complete DSL data transmission local side or user side device.
In another example, the power module completes the conversion from the input voltage to the board level voltage, and then outputs four groups of voltages of 3.3V, 2.5V, 1.5V and 5V;
the power module is provided with a power-saving control interface, and enters a power-saving state after receiving a power-saving level by providing the power-saving control interface to provide different power-saving working models, the power module adopting the scheme selects a single chip to provide a power chip with four paths of output, high integration and high conversion efficiency, the chip is provided with a power-saving control port, when a digital user line device is not used, power-saving control is carried out, and when power is saved, the current is as low as 1uA, so that the power consumption of the system is reduced, and the structural connection diagram can be as shown in figure 9, so that the power can be used for supplying power for other devices of the device.
A method for dynamic management of power consumption of digital subscriber line by using management device provides dynamic power consumption management model, DSL transceiver thereof is implemented with digital signal processing function of DSL transceiver by self-writing code on general FPGA/DSP, and power saving mode thereof is configured as comprising:
the SOC detects the working state of the PHY interface in real time, and when the PHY is in a down state, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in a power-saving state. The low power consumption design of the DSL transceiver comprises that the SOC can detect the access condition of service data and a carrier signal transmitted by an opposite terminal through a twisted pair, and part of functional modules are dynamically opened and closed, so that the modules are in a low power consumption state under the condition that a system does not communicate. The module is prevented from being in a full power consumption state for a long time under the condition of not using, and the PHY interface chip has two energy-saving modes of a power saving mode and a power failure mode, wherein the power saving mode comprises the following steps: this mode is used to reduce power consumption when the ethernet cable is not connected. When the auto-negotiation mode is enabled, the mode is active, the cable is disconnected, the PHY interface is in the down state, and the value of the register is taken to be 1. In the power saving mode, the ethernet mode turns off all transceiver modules except for the transmitter, power detection and PLL circuitry, and further, for MII mode, the RXC clock output is disabled. The RXC clock is enabled after connection; a power-down mode: the mode is used for enabling the whole chip to be powered off (when an Ethernet interface is not used), in the power-off state, the chip forbids all internal functions except an MII management interface, and the energy-saving effect of the equipment can be provided by setting the equipment.
In another example, when the PHY is in the up state, detecting whether the AFE receives the carrier, if the carrier is received, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in the working state, the SOC completes the handshake link establishment, and the device enters the data transmission mode;
if the carrier is not received, the opposite terminal is not accessed to the equipment, the SOC controls the transmitting module of the FPGA/DSP digital signal processing and the transmitting circuit of the AFE to be in a power-saving state, and the transmitting direction enters a silent state.
In another example, when the SOC controls the sending module for processing the FPGA/DSP digital signal and the sending circuit of the AFE to be in the power saving state, the SOC simultaneously controls the FPGA/DSP digital signal processing module to send the carrier signal at random intervals for a period of time to avoid that the opposite end is in the same mute state and the system cannot establish a link.
In another example, a management interface power saving model is also provided, the power saving model configured to include:
when the FPGA/DSP of the digital user line device receives the power-saving control command through the management interface, the SOC controls the FPGA/DSP digital signal processing function module to be in a reset state and controls the PHY and the AFE to be in a power-saving state.
In another example, a control interface power saving model is also provided, the power saving model configured to include:
when the digital user line device receives the level of the power-saving control of the control interface, the power supply module is controlled to be in the power-saving state, so that the PHY, the DSL transceiver and the FLASH are in the power-down state.
The above scheme is merely illustrative of a preferred example, and is not limiting. When the invention is implemented, appropriate replacement and/or modification can be carried out according to the requirements of users.
The number of apparatuses and the scale of the process described herein are intended to simplify the description of the present invention. Applications, modifications and variations of the dynamic management apparatus for power consumption of a digital subscriber line and the method of applying the same of the present invention will be apparent to those skilled in the art.
While embodiments of the invention have been disclosed above, it is not intended to be limited to the uses set forth in the specification and examples. It can be applied to all kinds of fields suitable for the present invention. Additional modifications will readily occur to those skilled in the art. It is therefore intended that the invention not be limited to the exact details and illustrations described and illustrated herein, but fall within the scope of the appended claims and equivalents thereof.

Claims (8)

1. A dynamic management device for power consumption of a digital subscriber line is characterized by comprising a local side device and a user side device which are connected through a twisted copper pair and used in pairs;
wherein the office device and the subscriber device are respectively configured to include:
the DSL transceiver is provided with a general FPGA/DSP and a CPU comprising an SOC (system on chip), is connected with an analog front end AFE (analog front end) through a data bus, and is provided with a power-saving control interface for transmitting a digital-to-analog converter and receiving the digital-to-analog converter;
the PHY interface chip is arranged at the front end of the DSL transceiver, completes the data processing of the Ethernet 64b/65b or the data processing of the HDLC frame, and has two energy-saving modes of saving and powering down;
and the power supply module is used for supplying power to the DSL transceiver and the PHY interface chip.
2. The dynamic management device for power consumption of a digital subscriber line according to claim 1, characterized in that the FPGA/DSP is further connected with a memory FLASH, and the FPGA/DSP is provided with a power saving management interface;
the AFE is directly connected with a hybrid circuit to form a sending data link, and the hybrid circuit is connected with the AFE through a filter to form a receiving data link;
the hybrid circuit is connected with the twisted copper pair through the coupling unit.
3. The dynamic management device for power consumption of digital subscriber line according to claim 1, wherein said power module completes the conversion from input voltage to board level voltage, and further outputs four groups of voltages of 3.3V, 2.5V, 1.5V, and 5V;
and the power supply module is provided with a power-saving control interface.
4. A method for applying the device for dynamic management of digital subscriber line power consumption according to any of claims 1-3, wherein a dynamic power consumption management model is provided, the power saving mode of which is configured to include:
the SOC detects the working state of the PHY interface in real time, and when the PHY is in a down state, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in a power-saving state.
5. The dynamic management device for power consumption of a digital subscriber line according to claim 4, further comprising, when the PHY is in up state, detecting whether the AFE receives the carrier, if the carrier is received, the SOC controls the FPGA/DSP digital signal processing module and the AFE to be in working state, the SOC completes handshaking link establishment, and the device enters into data transmission mode;
if the carrier is not received, the opposite terminal is not accessed into the equipment, the SOC controls a transmitting module for processing the FPGA/DSP digital signal and a transmitting circuit of the AFE to be in a power-saving state, and the transmitting direction enters a silent state.
6. The dynamic management device for power consumption of digital subscriber line according to claim 5, wherein when the SOC controls the transmitting module for processing the FPGA/DSP digital signal and the transmitting circuit of the AFE to be in the power saving state, the SOC simultaneously controls the FPGA/DSP digital signal processing module to randomly transmit the carrier signal for a period of time at intervals, so as to avoid that the opposite end is in the same mute state, which results in that the system cannot establish a link.
7. The dynamic management apparatus for power consumption of a digital subscriber line according to claim 4, further providing a management interface power saving model configured to include:
when the FPGA/DSP of the digital user line device receives the power-saving control command through the management interface, the SOC controls the FPGA/DSP digital signal processing functional module to be in a reset state, and controls the PHY and the AFE to be in a power-saving state.
8. The dynamic management apparatus for power consumption of a digital subscriber line according to claim 4, further providing a control interface power saving model, wherein the power saving model is configured to include:
when the digital user line device receives the level of the power-saving control of the control interface, the power supply module is controlled to be in a power-saving state, so that the PHY, the DSL transceiver and the FLASH are in a power-down state.
CN201911009533.5A 2019-10-23 2019-10-23 Dynamic management device for power consumption of digital subscriber line and application method Pending CN110601721A (en)

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CN112858846A (en) * 2020-12-31 2021-05-28 四川惠电智远科技有限公司 High-voltage cable intelligent protection system

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