CN110596457B - Digital frequency sweeping system and method - Google Patents
Digital frequency sweeping system and method Download PDFInfo
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- CN110596457B CN110596457B CN201910921960.4A CN201910921960A CN110596457B CN 110596457 B CN110596457 B CN 110596457B CN 201910921960 A CN201910921960 A CN 201910921960A CN 110596457 B CN110596457 B CN 110596457B
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
Abstract
The invention provides a digital frequency sweeping system and a digital frequency sweeping method. Wherein the system includes: the software control module is configured to set frequency sweep parameters of the frequency points and generate frequency control commands corresponding to the frequency sweep parameters; the signal generating circuit module is configured to generate two orthogonal analog frequency sweeping signals according to the frequency control command and output the two orthogonal analog frequency sweeping signals; the signal generation circuit module includes: the clock signal submodule, the FPGA chip and the digital-to-analog conversion chip; the clock signal submodule is configured to provide clock driving information to the FPGA chip; the FPGA chip is configured to provide two paths of orthogonal digital signals and conversion clock information to the digital-to-analog conversion chip according to the clock driving information and the frequency control command; the digital-to-analog conversion chip is configured to generate two analog frequency sweeping signals according to the two orthogonal digital signals and the conversion clock information. The invention can configure the scanning parameters through the software control module, thereby reducing the design complexity of the signal generating circuit module.
Description
Technical Field
The invention relates to the technical field of electronic equipment, in particular to a digital frequency sweeping system and a digital frequency sweeping method.
Background
The link frequency response in the communication system is an important parameter, and the acquisition of the frequency response curve of the link frequency response in the system has great research value. At present, a frequency sweep system is usually adopted to determine the frequency response of the system, however, most of the existing frequency sweep instruments are special systems, the internal structures of the existing frequency sweep instruments are complex, the volumes of the existing frequency sweep instruments are large, the existing frequency sweep instruments are expensive in manufacturing cost, and the requirements of most of professionals on the acquisition of the frequency response characteristics of the system cannot be met.
Disclosure of Invention
In order to solve the above problems, the digital frequency sweep system and the method provided by the present invention can configure the scanning parameters through the software control module, and send the frequency control command containing the content of the scanning parameters to the signal generation circuit module, thereby reducing the design complexity of the signal generation circuit module.
In a first aspect, the present invention provides a digital frequency sweep system, comprising:
the software control module is configured to set frequency sweeping parameters of the frequency points and generate frequency control commands corresponding to the frequency sweeping parameters of the frequency points; and
the signal generation circuit module is configured to generate two orthogonal analog frequency sweeping signals according to the frequency control command and output the two orthogonal analog frequency sweeping signals;
the signal generation circuit module includes: the clock signal submodule, the FPGA chip and the digital-to-analog conversion chip;
wherein the clock signal submodule is configured to provide clock driving information to the FPGA chip; the FPGA chip is configured to provide two paths of orthogonal digital signals and conversion clock information to the digital-to-analog conversion chip according to the clock driving information and the frequency control command; the digital-to-analog conversion chip is configured to generate the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and conversion clock information.
Optionally, the sweep frequency parameters include: the frequency sweep starting and stopping frequency, the frequency sweep signal output amplitude, the frequency sweep frequency change step length, the frequency sweep frequency change interval time and the frequency sweep times.
Optionally, the FPGA chip is integrated with a signal generation unit, a command analysis unit, a filtering unit and an interface control unit;
wherein the command parsing unit is configured to parse a frequency control command generated by a software control module to obtain a parsing result; the signal generating unit is configured to generate the two orthogonal digital signals according to the clock driving information and an analysis result; the filtering unit is configured to perform noise reduction processing on the two orthogonal digital signals; the interface control unit is configured to send the two orthogonal digital signals to the digital-to-analog conversion chip.
Optionally, the software control module is further configured to determine whether the frequency sweep parameter is correct, so as to obtain a determination result, and execute a frequency generation action according to the determination result;
the frequency generating action comprises: sweep start, sweep interrupt, sweep recovery, and sweep stop.
Optionally, the determining that the frequency sweep parameter is incorrect includes: the sweep frequency parameters are absent and over-bound;
wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the system frequency range, the start frequency of the sweep frequency is outside the system frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency.
Optionally, the software control module is further configured to set frequency sweep parameters of different frequency points, and generate a frequency control command corresponding to the frequency sweep parameter of each frequency point;
and under the condition of frequency sweep interruption, the digital frequency sweep system outputs two orthogonal analog frequency sweep signals corresponding to the frequency point for executing frequency sweep interruption.
Optionally, the two orthogonal analog swept frequency signals have a phase difference of 90 degrees.
In a second aspect, the present invention provides a digital frequency sweeping method, including:
setting frequency sweep parameters of frequency points, and generating frequency control commands corresponding to the frequency sweep parameters of the frequency points;
generating clock driving information adapted to the frequency control command;
generating two orthogonal digital signals and conversion clock information according to the clock driving information and the frequency control command;
and generating the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and the conversion clock information.
Optionally, the frequency sweep parameters include a frequency sweep start-stop frequency, a frequency sweep signal output amplitude, a frequency sweep frequency change step size, a frequency sweep frequency change interval time, and frequency sweep times.
Optionally, the generating two orthogonal digital signals and converting clock information according to the clock driving information and the frequency control command includes:
analyzing the frequency control command generated by the software control module to obtain an analysis result;
generating the two orthogonal digital signals according to the clock driving information and the analysis result;
and carrying out noise reduction processing on the two orthogonal digital signals.
Optionally, before the generating two orthogonal digital signals and converting clock information according to the clock driving information and the frequency control command, the method further includes:
judging whether the sweep frequency parameters are correct or not to obtain a judgment result, and executing a frequency generation action according to the judgment result, wherein the frequency generation action comprises the following steps: sweep start, sweep interrupt, sweep recovery, and sweep stop.
Optionally, the determining that the frequency sweep parameter is incorrect includes: the sweep frequency parameters are absent and over-bound;
wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the method frequency range, the start frequency of the sweep frequency is outside the method frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency.
Optionally, the setting of frequency sweep parameters of a frequency point and the generation of a frequency control command corresponding to the frequency sweep parameters of the frequency point include: setting frequency sweep parameters of different frequency points, and generating a frequency control command corresponding to the frequency sweep parameters of each frequency point;
and under the condition of the interruption of the frequency sweep, the system outputs two orthogonal analog frequency sweep signals corresponding to the frequency point before the interruption of the frequency sweep.
Optionally, the two orthogonal analog swept frequency signals have a phase difference of 90 degrees.
According to the digital frequency sweeping system and the digital frequency sweeping method, the scanning parameters can be configured through the software control module, and the frequency control instruction containing the content of the scanning parameters is sent to the signal generating circuit module, so that the signal generating circuit module only needs to be responsible for generating analog signals corresponding to frequency and amplitude, and the frequency sweeping state and duration do not need to be judged, and therefore the design complexity of the signal generating circuit module is reduced, the structure is simple, and the production cost is low; meanwhile, the signal generation circuit module can output two orthogonal analog frequency sweeping signals, and the two orthogonal analog frequency sweeping signals can be used as demodulation reference signals to assist the design of a communication system.
Drawings
Fig. 1 is a schematic structural diagram of a digital frequency sweeping system according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a digital frequency sweeping system according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of the interior of an FPGA chip according to an embodiment of the present application;
fig. 4 is a schematic flowchart of a digital frequency sweeping method according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In a first aspect, the present invention provides a digital frequency sweep system 100, and referring to fig. 1, fig. 1 shows a schematic structural diagram of the digital frequency sweep system 100 according to an embodiment of the present application; the method comprises the following steps:
a software control module 101 configured to set frequency sweep parameters of a frequency point and generate a frequency control command corresponding to the frequency sweep parameters of the frequency point; and a signal generating circuit module 102 configured to generate two orthogonal analog frequency sweep signals according to the frequency control command and output the two orthogonal analog frequency sweep signals.
In an alternative embodiment, the sweep frequency parameters include: the frequency sweep starting and stopping frequency, the frequency sweep signal output amplitude, the frequency sweep frequency change step length, the frequency sweep frequency change interval time and the frequency sweep times. The phase difference of the two orthogonal analog sweep frequency signals is 90 degrees.
The signal generation circuit module 102 includes: the clock signal submodule, the FPGA chip and the digital-to-analog conversion chip; wherein the clock signal submodule is configured to provide clock driving information to the FPGA chip; the FPGA chip is configured to provide two paths of orthogonal digital signals and conversion clock information to the digital-to-analog conversion chip according to the clock driving information and the frequency control command; the digital-to-analog conversion chip is configured to generate the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and conversion clock information.
Referring to fig. 2, fig. 2 shows a schematic block diagram of a digital frequency sweep system 100 according to an embodiment of the present application; the signal generating circuit module 102 further includes: a power supply sub-module and a storage sub-module. The power supply sub-module is configured to provide power to the configuration circuit of the signal generation circuit module 102, the clock signal sub-module, the FPGA chip, and the digital-to-analog conversion chip; the storage submodule is used for storing programs of the FPGA chip.
The digital frequency sweeping system 100 can configure scanning parameters through the software control module 101, calculate frequency sweeping frequency and amplitude, and send a frequency control command containing the content of the scanning parameters to the signal generating circuit module 102 through the communication interface, so that the signal generating circuit module 102 only needs to be responsible for generating analog signals corresponding to the frequency and the amplitude, and does not need to judge frequency sweeping state and duration, thereby reducing the design complexity of the signal generating circuit module 102, and the digital frequency sweeping system 100 has a simple structure and low production cost; meanwhile, the signal generation circuit module 102 can output two orthogonal analog frequency sweep signals, and the two orthogonal analog frequency sweep signals can be used as reference signals for demodulation to assist in designing a communication system. Wherein, the communication interface is a serial port.
In this embodiment, the frequency control command is a binary data set, follows a small-end mode, and includes frequency, amplitude, start and end information; the software control module 101 can be located in an upper computer, and the upper computer is a computer for running a windows operating system, is not limited to a desktop computer and a notebook computer, and has the functions of keyboard and mouse input; a user may input through a keyboard and/or a mouse, initialize a communication interface of the software control module 101, configure sweep frequency parameters, finally generate a frequency control command that can be recognized by the signal generation circuit module 102, and send the frequency control command to the signal generation circuit module 102 through the communication interface.
Before setting frequency sweep parameters of frequency points through the software control module 101, a user can initialize the frequency sweep function in the software control module 101 through an upper computer, specifically including initialization of variables and communication serial ports. Wherein the variables include: starting and ending marks, a successful communication serial port initialization mark and frequency sweep parameters; the start and end flags are end after the initialization process; whether the initialization of the corresponding serial port is successful or not is marked by the successful initialization mark of the communication serial port; default to the last successfully configured parameter for the sweep frequency parameter, and default to all 0 if the last successfully configured parameter is lacked; the communication serial port is initialized to configure a serial port connected with the signal generating circuit module 102 to be in a baud rate of 115200, a data length of 8 bits and a communication mode without verification.
In an optional embodiment, the FPGA chip is integrated with a signal generation unit, a command parsing unit, a filtering unit, and an interface control unit.
Wherein the command parsing unit is configured to parse a frequency control command generated by the software control module 101 to obtain a parsing result; the signal generating unit is configured to generate the two orthogonal digital signals according to the clock driving information and an analysis result; the filtering unit is configured to perform noise reduction processing on the two orthogonal digital signals; the interface control unit is configured to send the two orthogonal digital signals to the digital-to-analog conversion chip.
Referring to fig. 3, fig. 3 shows a schematic block diagram of the interior of an FPGA chip according to an embodiment of the present application; the FPGA chip adopts an EP4CE6 chip of an altera cycle IV. The signal generating unit includes: PLL (Phase Locked Loop) and Digital DDS (frequency Synthesizer). The command analysis unit is used for extracting specific frequency in the frequency control command and calculating a frequency division coefficient of the digital DDS and the phase of the current frequency according to the frequency; the clock signal generated by the clock signal submodule, namely a crystal oscillator signal, enters the FPGA chip, frequency multiplication is carried out through a PLL (phase locked loop) in the FPGA chip, and then frequency control is carried out on a frequency control command by adopting a digital DDS (direct digital synthesizer) in the FPGA chip so as to generate two paths of digital signals with a phase difference of 90 degrees; then, the two paths of digital signals pass through two digital low-pass filters with the cut-off frequency of 4MHz connected in parallel to obtain a smoothed digital sine signal and a smoothed digital cosine signal, wherein the low-pass filters are used for inhibiting out-of-band signals so as to improve the signal-to-noise ratio; the digital sine signal and the digital cosine signal are subjected to time sequence control through the digital-to-analog conversion control unit and become time sequence signals which can be used by a digital-to-analog conversion chip, and the time sequence signals enter the digital-to-analog conversion chip and become two orthogonal analog frequency sweep signals which are finally given to a user.
In an optional embodiment, the software control module 101 is further configured to determine whether the frequency sweep parameter is correct to obtain a determination result, and execute a frequency generation action according to the determination result;
the frequency generating action comprises: sweep start, sweep interrupt, sweep recovery, and sweep stop.
In an alternative embodiment, the software control module 101 is further configured to set frequency sweep parameters of different frequency points and generate a frequency control command corresponding to the frequency sweep parameters of each frequency point. Under the condition of the frequency sweep interruption, the digital frequency sweep system 100 outputs two orthogonal analog frequency sweep signals corresponding to the frequency point executing the frequency sweep interruption.
During the frequency sweeping process of the digital frequency sweeping system 100, a user can click two buttons of start/stop and interrupt/recovery to control the frequency sweeping process, and meanwhile, a display in the upper computer can display the functions of the buttons, so that the frequency sweeping process can be conveniently regulated and controlled. After clicking a start/stop button, the digital frequency sweeping system 100 sweeps frequency according to user settings; after clicking the start/stop button again, the digital frequency sweep system 100 stops sweeping the frequency. In the frequency sweeping process of the digital frequency sweeping system 100, if a user clicks an interrupt/recovery button, the frequency sweeping process of the digital frequency sweeping system 100 is stopped, the signal generating circuit module 102 outputs the analog frequency sweeping signal of the current frequency point all the time, and the interrupt/recovery button prompt word is changed into recovery; if the user then clicks the "break/resume" button again, the digital frequency sweep system 100 will continue to sweep from the current frequency point.
In an optional embodiment, the determining that the frequency sweep parameter is incorrect includes: the sweep frequency parameters are absent and the sweep frequency parameters are over bound,
wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the system frequency range, the start frequency of the sweep frequency is outside the system frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency. In this embodiment, the system frequency range is 1Hz to 2 MHz; the predetermined range of amplitude values is 0-5 v.
And under the condition that the frequency sweep parameter is incorrect as a result of the judgment, the software control module 101 reminds the user to modify the frequency sweep parameter through the upper computer, and after the user finishes modifying, the software control module 101 judges whether the frequency sweep parameter is correct again. When the frequency sweep parameter is correct as a result of the determination, the software control module 101 starts to operate a frequency sweep program to generate a frequency control command; and the user can send an instruction to the software control module 101 during the operation of the scanning program, so that the software control module 101 executes the actions of frequency sweep interruption and frequency sweep recovery.
The digital frequency sweeping system 100 is provided with the software control module 101 for configuring frequency sweeping parameters, so that the design difficulty is reduced, meanwhile, the digital frequency sweeping system 100 has a dual-channel orthogonal signal output function, can realize the output of dual-channel orthogonal signals in a frequency point mode, and is particularly suitable for communication systems needing in-phase and orthogonal demodulation.
In a second aspect, the present invention provides a digital frequency sweeping method, and referring to fig. 4, fig. 4 shows a schematic flow chart of a digital frequency sweeping method according to an embodiment of the present application; the method comprises the following steps:
step S101: setting frequency sweep parameters of the frequency points, and generating frequency control commands corresponding to the frequency sweep parameters of the frequency points.
Step S102: clock driving information adapted to the frequency control command is generated.
Step S103: and generating two paths of orthogonal digital signals and conversion clock information according to the clock driving information and the frequency control command.
Step S104: and generating the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and the conversion clock information.
The step S101 can be completed by the software control module 101 of the upper computer; step S103 can be completed by an FPGA chip, so that the digital frequency sweeping method can reduce the work task of the FPGA chip, and the digital frequency sweeping system can output two orthogonal analog frequency sweeping signals, which can be used as a reference signal for demodulation to assist in designing the communication system.
In an alternative embodiment, the sweep parameters include a sweep start-stop frequency, a sweep signal output amplitude, a sweep frequency change step size, a sweep frequency change interval time, and a sweep frequency.
In an optional embodiment, the generating two orthogonal digital signals and converting clock information according to the clock driving information and the frequency control command includes:
analyzing the frequency control command generated by the software control module 101 to obtain an analysis result; generating the two orthogonal digital signals according to the clock driving information and the analysis result; and carrying out noise reduction processing on the two orthogonal digital signals.
In an optional embodiment, before generating the two orthogonal digital signals and the conversion clock information according to the clock driving information and the frequency control command, the method further comprises:
judging whether the sweep frequency parameters are correct or not to obtain a judgment result, and executing a frequency generation action according to the judgment result, wherein the frequency generation action comprises the following steps: sweep start, sweep interrupt, sweep recovery, and sweep stop.
In an optional embodiment, the determining that the frequency sweep parameter is incorrect includes: the sweep frequency parameters are absent and over-bound; wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the method frequency range, the start frequency of the sweep frequency is outside the method frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency.
In an optional embodiment, the setting frequency sweep parameters of the frequency point and generating a frequency control command corresponding to the frequency sweep parameters of the frequency point includes: and setting frequency sweep parameters of different frequency points, and generating a frequency control command corresponding to the frequency sweep parameters of each frequency point.
And under the condition of the interruption of the frequency sweep, the system outputs two orthogonal analog frequency sweep signals corresponding to the frequency point before the interruption of the frequency sweep.
In an alternative embodiment, the two orthogonal analog swept frequency signals are 90 degrees out of phase.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (12)
1. A digital frequency sweeping system, comprising:
a software control module configured to set frequency sweep parameters of a frequency point and generate a frequency control command corresponding to the frequency sweep parameters of the frequency point, the frequency sweep parameters including: frequency sweeping times; and
the signal generation circuit module is configured to generate two orthogonal analog frequency sweeping signals according to the frequency control command and output the two orthogonal analog frequency sweeping signals;
the signal generation circuit module includes: the clock signal submodule, the FPGA chip and the digital-to-analog conversion chip;
wherein the clock signal submodule is configured to provide clock driving information to the FPGA chip; the FPGA chip is configured to provide two paths of orthogonal digital signals and conversion clock information to the digital-to-analog conversion chip according to the clock driving information and the frequency control command; the digital-to-analog conversion chip is configured to generate the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and conversion clock information;
the FPGA chip is integrated with a signal generating unit, a command analyzing unit, a filtering unit and an interface control unit;
the command analysis unit is configured to analyze the frequency control command generated by the software control module to obtain an analysis result; the signal generating unit is configured to generate the two orthogonal digital signals according to the clock driving information and an analysis result; the filtering unit is configured to perform noise reduction processing on the two orthogonal digital signals; the interface control unit is configured to send the two orthogonal digital signals to the digital-to-analog conversion chip.
2. A digital frequency sweep system as defined in claim 1 wherein the sweep parameters include: the frequency sweep starting and stopping frequency, the frequency sweep signal output amplitude, the frequency sweep frequency change step length and the frequency sweep frequency change interval time.
3. A digital frequency sweeping system according to claim 1, wherein the software control module is further configured to determine whether the frequency sweeping parameters are correct to obtain a determination result, and execute a frequency generation action according to the determination result;
the frequency generating action comprises: sweep start, sweep interrupt, sweep recovery, and sweep stop.
4. A digital frequency sweeping system according to claim 3, wherein the determination that the frequency sweeping parameters are incorrect comprises: the sweep frequency parameters are absent and over-bound;
wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the system frequency range, the start frequency of the sweep frequency is outside the system frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency.
5. A digital frequency sweeping system according to claim 3, wherein the software control module is further configured to set frequency sweeping parameters for different frequency points and generate frequency control commands corresponding to the frequency sweeping parameters for each frequency point;
and under the condition of frequency sweep interruption, the digital frequency sweep system outputs two orthogonal analog frequency sweep signals corresponding to the frequency point for executing frequency sweep interruption.
6. A digital frequency sweeping system according to claim 1, wherein the two orthogonal analog frequency sweeping signals are 90 degrees out of phase.
7. A digital frequency sweeping method, comprising:
setting frequency sweep parameters of a frequency point, and generating a frequency control command corresponding to the frequency sweep parameters of the frequency point, wherein the frequency sweep parameters comprise: frequency sweeping times;
generating clock driving information adapted to the frequency control command;
generating two orthogonal digital signals and conversion clock information according to the clock driving information and the frequency control command;
generating the two orthogonal analog frequency sweeping signals according to the two orthogonal digital signals and the conversion clock information;
generating two orthogonal digital signals and conversion clock information according to the clock driving information and the frequency control command, comprising:
analyzing the frequency control command generated by the software control module to obtain an analysis result;
generating the two orthogonal digital signals according to the clock driving information and the analysis result;
and carrying out noise reduction processing on the two orthogonal digital signals.
8. A digital frequency sweeping method according to claim 7, wherein the frequency sweeping parameters include frequency sweeping start-stop frequency, frequency sweeping signal output amplitude, frequency sweeping frequency change step size, and frequency sweeping frequency change interval time.
9. A digital frequency sweeping method according to claim 7, wherein before said generating two digital signals in quadrature and converting clock information based on said clock drive information and said frequency control commands, said method further comprises:
judging whether the sweep frequency parameters are correct or not to obtain a judgment result, and executing a frequency generation action according to the judgment result, wherein the frequency generation action comprises the following steps: sweep start, sweep interrupt, sweep recovery, and sweep stop.
10. A digital frequency sweeping method according to claim 9, wherein the determining that the frequency sweeping parameters are incorrect includes: the sweep frequency parameters are absent and over-bound;
wherein the over-bounding of the sweep frequency parameters comprises: the end frequency of the sweep frequency is less than the start frequency of the sweep frequency, the end frequency of the sweep frequency is outside the method frequency range, the start frequency of the sweep frequency is outside the method frequency range, the amplitude of the sweep frequency exceeds a preset range, or/and the frequency of the sweep frequency is stepped to exceed the difference between the end frequency and the start frequency.
11. A digital frequency sweeping method according to claim 9, wherein the setting frequency sweeping parameters of the frequency points and generating frequency control commands corresponding to the frequency sweeping parameters of the frequency points comprises: setting frequency sweep parameters of different frequency points, and generating a frequency control command corresponding to the frequency sweep parameters of each frequency point;
and under the condition of the interruption of the frequency sweep, the system outputs two orthogonal analog frequency sweep signals corresponding to the frequency point before the interruption of the frequency sweep.
12. A digital frequency sweeping method according to claim 7, wherein the two orthogonal analog frequency sweeping signals are 90 degrees out of phase.
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