CN110569126A - Data packet processing method and device of target application and electronic equipment - Google Patents
Data packet processing method and device of target application and electronic equipment Download PDFInfo
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- CN110569126A CN110569126A CN201910847154.7A CN201910847154A CN110569126A CN 110569126 A CN110569126 A CN 110569126A CN 201910847154 A CN201910847154 A CN 201910847154A CN 110569126 A CN110569126 A CN 110569126A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Abstract
The invention provides a data packet processing method and device of a target application and electronic equipment, and relates to the technical field of computers, wherein the method comprises the following steps: detecting whether a target data packet exists in a memory pool occupied by a target application or not through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application; and if so, releasing the memory occupied by the target data packet through the main process. The invention improves the data packet processing stability of the target application.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method and an apparatus for processing a data packet of a target application, and an electronic device.
Background
When the existing multi-process deployment computer software runs, a main process is deployed on a server, and other processes are secondary processes. However, when the existing multi-process deployment computer software processes the data packet sent by the network card, the sub-process is adopted to release the data packet completing the processing operation, and when the sub-process exits abnormally, the normal processing of the data packet by the software is affected. Therefore, the stability of the existing packet processing technology still needs to be improved.
Disclosure of Invention
The embodiment of the invention aims to provide a data packet processing method and device for a target application and an electronic device, which can better improve the stability of data packet processing.
In a first aspect, an embodiment of the present invention provides a method for processing a data packet of a target application, where the method includes: detecting whether a target data packet exists in a memory pool occupied by the target application through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application; and if so, releasing the memory occupied by the target data packet through the main process.
In an optional implementation manner, the step of detecting whether a target data packet exists in a memory pool occupied by the target application includes: detecting whether a data packet with a reference count of 0 exists in the memory pool; if so, determining the data packet with the reference count of 0 as a target data packet.
In an optional implementation manner, the step of releasing the memory occupied by the target data packet includes: and determining the address of the memory occupied by the target data packet as a target memory address, and sending the target memory address to a memory management queue, so that the memory pool receives a new data packet sent by a network card based on the target memory address in the memory management queue.
In an alternative embodiment, the method further comprises: obtaining unprocessed data packets from the memory pool; searching a sub-process for processing the unprocessed data packet from a plurality of sub-processes of the target application, and taking the searched sub-process as a target sub-process; and sending the memory address of the unprocessed data packet to the target secondary process through a ring queue so that the target secondary process can process the unprocessed data packet.
In an alternative embodiment, the processing operation comprises: processing the data packet according to a preset mode and subtracting 1 from the reference count of the processed data packet.
in a second aspect, an embodiment of the present invention provides a packet processing apparatus for a target application, where the apparatus includes: the detection module is used for detecting whether a target data packet exists in a memory pool occupied by the target application through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application; and the releasing module is used for releasing the memory occupied by the target data packet through the main process when the target data packet exists in the memory pool.
In an optional embodiment, the detecting module is further configured to detect whether there is a data packet with a reference count of 0 in the memory pool; and if the data packet with the reference count of 0 exists, determining the data packet with the reference count of 0 as a target data packet.
in an optional implementation manner, the release module is further configured to determine an address of a memory occupied by the target data packet as a target memory address, and send the target memory address to a memory management queue, so that the memory pool receives a new data packet s sent by the network card based on the target memory address in the memory management queue.
In a third aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor, where the memory stores a computer program operable on the processor, and the processor executes the computer program to implement the method described in any one of the foregoing embodiments.
In a fourth aspect, embodiments of the invention provide a computer-readable medium having stored thereon computer-executable instructions that, when invoked and executed by a processor, cause the processor to implement a method as in any one of the preceding embodiments.
the embodiment of the invention provides a data packet processing method, a device and electronic equipment of a target application, wherein in the method, whether a target data packet exists in a memory pool occupied by the target application is detected through a main process of the target application (the target data packet is obtained by processing the data packet through a secondary process of the target application); and if the target data packet exists in the memory pool occupied by the target application, releasing the memory occupied by the target data packet through the main process. According to the method, after the secondary process completes processing operation on the data packet, the main process releases the target data packet memory so as to substantially release the target data packet, and the problem that the target application cannot normally process the data packet when the secondary process abnormally exits in the prior art is solved, so that the data packet processing stability of the target application is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a data packet processing method according to an embodiment of the present invention;
Fig. 2 is a flowchart of a data packet processing method for a target application according to an embodiment of the present invention;
Fig. 3 is a flowchart of a method for processing a sub-process data packet according to an embodiment of the present invention;
Fig. 4 is a flowchart of a data packet processing method according to an embodiment of the present invention;
Fig. 5 is a schematic structural diagram of a packet processing apparatus for a target application according to an embodiment of the present invention;
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
Referring to a flow chart of a data packet processing method shown in fig. 1, a memory pool in fig. 1 is obtained by a main process through a pre-application, and the memory pool includes a plurality of memories and a management queue of the memory pool (the management queue is used for storing memory addresses divided into a plurality of memories in the memory pool). After the network card receives the data packet, the network card acquires a memory address capable of storing the data packet from a management queue of the memory pool, and places the received data packet in the corresponding memory address. And the secondary process acquires the data packet A from the memory pool according to the memory address of the data packet A, and releases the memory address of the data packet A back to the memory pool after the data packet A is processed. However, in the conventional packet processing technology, the sub-process is adopted to release the packet that completes the processing operation, and when the sub-process exits abnormally, the normal processing of the packet is affected. Therefore, the stability of the existing packet processing technology still needs to be improved. Based on this, the embodiment of the invention provides a data packet processing method and device for a target application and an electronic device.
To facilitate understanding of the embodiment, first, a detailed description is given to a packet processing method for a target application disclosed in the embodiment of the present invention.
Referring to the flow chart of the packet processing method of the target application shown in fig. 2, the method may be executed by a processor running the main process, and the method includes the following steps:
Step S202: detecting whether a target data packet exists in a memory pool occupied by a target application or not through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application.
The target application is computer software with multi-process deployment, the target application deploys a main process on a server during running, and other processes are sub-processes (including multiple sub-processes), for example, the target application may be a Data Plane Development Kit (DPDK), the DPDK software is multi-process deployment software, the main process is responsible for initializing a memory and applying for a memory pool, and the sub-processes are connected with the memory pool to obtain Data packets in the memory pool. The target application may also be other multi-process deployment software similar to the DPDK. The memory pool is obtained by main process application when the target application starts to run, and comprises a plurality of memory blocks, and the memory blocks are used for storing data packets. And traversing each memory block in the memory pool through the main process of the target application, detecting whether a data packet processed by the secondary process exists in each memory block, and taking the data packet processed by the secondary process as a target data packet.
Step S204: and if so, releasing the memory occupied by the target data packet through the main process.
When a target data packet exists in the memory pool of the target application, namely the data packet processed by the secondary process exists in the memory pool, the memory occupied by the target data packet is released through the main process of the target application.
According to the data packet processing method of the target application provided by the embodiment of the invention, after the secondary process completes processing operation on the data packet, the main process releases the memory of the target data packet so as to substantially release the target data packet, and the problem that the target application cannot normally process the data packet when the secondary process abnormally exits in the prior art is solved, so that the data packet processing stability of the target application is improved by the method.
In order to quickly and accurately detect whether a target data packet exists in a memory pool, the embodiment provides a specific implementation manner for detecting whether the target data packet exists in the memory pool occupied by a target application: detecting whether a data packet with a reference count of 0 exists in a memory pool or not; if so, the packet with reference count of 0 is determined as the target packet. The data packet with the reference count of 0 is the data packet processed by the secondary process, and the memory address of the target data packet and the memory occupied by the target data packet can be quickly determined by detecting whether the data packet with the reference count of 0 exists in the data packets stored in the memory pool.
In order to completely release the memory occupied by the target data packet, this embodiment provides a specific implementation manner of releasing the memory occupied by the target data packet: and determining the address of the memory occupied by the target data packet as a target memory address, and sending the target memory address to a memory management queue so that the memory pool receives a new data packet sent by the network card based on the target memory address in the memory management queue. The memory management queue is a memory management queue of the memory pool, and the memory management queue stores addresses of memory blocks in the memory pool, including memory addresses occupied by data packets which are not processed by the secondary process and memory addresses occupied by target data packets. Because the target data packet is a data packet whose processing operation is completed by the secondary process (the reference count of the target data packet is 0), the memory block occupied by the target data packet can receive a new data packet, the address of the memory occupied by the target data packet is sent to the memory management queue, the memory management queue marks the target memory address as a memory address capable of receiving the new data packet, so that the memory pool receives the new data packet sent by the network card based on the target memory address in the memory management queue, that is, after the network card receives the new data packet, the new data packet is placed in the target memory address, and the target memory address is a memory address which is recorded in the memory management queue in the memory pool and can receive the new data packet. And after the new data packet is placed at the target memory address in the memory pool, the memory management queue updates the target memory address to the memory address occupied by the data packet which is not processed by the secondary process.
in a specific implementation manner, the packet processing of the target application provided in this embodiment further includes a step of processing an unprocessed packet, which may be specifically executed with reference to the following steps (1) to (3):
Step (1): and acquiring unprocessed data packets from the memory pool. And acquiring the unprocessed data packet from the memory address occupied by the data packet which is not processed by the secondary process in the memory pool according to the memory address occupied by the data packet which is not processed by the secondary process and recorded in the memory management queue of the memory pool.
step (2): and searching a sub-process for processing the unprocessed data packet from the plurality of sub-processes of the target application, and taking the searched sub-process as the target sub-process. Because the target application comprises a plurality of sub-processes, the data packet received by the network card may need to be processed by the plurality of sub-processes, and the sub-process used for processing the unprocessed data packet in the target application is determined as the target sub-process according to the information of the unprocessed data packet.
and (3) sending the memory address of the unprocessed data packet to the target secondary process through the ring queue so that the target secondary process can process the unprocessed data packet. The number of the ring queues is matched with the number of the secondary processes, namely the ring queues and the secondary processes are in one-to-one correspondence, and the primary process sends the memory addresses of the unprocessed data packets to the target secondary processes through the ring queues of the target secondary processes respectively, so that the target secondary processes obtain the unprocessed data packets from the memory addresses of the unprocessed data packets in the memory pool to process the unprocessed data packets.
in one embodiment, the processing operation includes: the data packets are processed in a preset manner and the reference count of the processed data packets is decremented by 1. The target sub-process processes the data packet according to a preset mode (which may be a common data packet processing mode), and subtracts 1 from the reference count of the processed data packet. For example, for an unprocessed data packet B, the initial reference count of the data packet B is n, after the main process sends the memory address of the data packet B to the target sub-processes, the target sub-processes acquire the data packet B from the memory pool and process the data packet B according to a preset mode, after each target sub-process processes, the reference count of the data packet B is decremented by 1, and after the n target sub-processes all perform processing operations on the data packet B, that is, the sub-processes of the target application complete the processing operations, the reference count of the data packet B becomes 0, and the data packet B becomes a target data packet.
In one embodiment, this embodiment provides a specific implementation manner of the sub-process performing processing operation on the data packet, referring to a flowchart of a sub-process data packet processing method shown in fig. 3, where the method is performed by a processor on the sub-process, and may be specifically performed with reference to the following steps S302 to S308:
step S302: initializing the large-page memory. By initializing the large-page memory, the memory pool address created by the main process of the target application for receiving the data packet is obtained, and the memory space produced by initializing the large-page memory is used for ensuring that the address spaces of the network card for receiving the data packet are the same.
step S304: and searching the ring queue and reading the data packet address in the ring queue.
Step S306: and processing the data packet according to the read data packet address and a preset mode.
step S308: after the packet is processed, the reference count of the processed packet is decremented by 1.
when all the target subprocesses complete the steps S302 to S308, the subprocess of the target application completes the processing operation on the data packet.
In practical applications, referring to the flowchart of the packet processing method shown in fig. 4, the packet processing may be implemented by a processor on the host process of the target application, and specifically, the following steps S402 to S410 may be referred to:
Step S402: initializing a large-page memory, and creating a memory pool in the large-page memory. The memory pool comprises a plurality of memory blocks and a memory management queue. Before acquiring a data packet (the data packet is a data packet received by a plurality of network cards), the host process needs to initialize a large-page memory so as to provide a storage address space for the created memory pool.
Step S404: and starting the network card and setting a network card queue. And setting the number of the network card queues and the length of the network card queues, and starting the network card to receive the data packet after starting the network card.
Step S406: and creating a ring queue matched with the secondary process. The ring queues are used for sending the data packets from the main process to the secondary processes, and the number of the ring queues is the same as that of the secondary processes and is in one-to-one correspondence.
step S408: and repeatedly acquiring the data packet received by the network card from the memory pool, and sending the data packet to the process through the ring queue so that the secondary process processes the data packet.
Step S410: and circularly traversing the data packets in the memory pool, and putting the memory address of the data packet with the reference count of 0 into the memory management queue. So that the memory pool receives a new data packet according to the memory management queue, that is, the new data packet is placed at the memory address of the data packet with the count of 0.
According to the data packet processing method for the target application, provided by the embodiment of the invention, the main process can quickly determine the target data packet and the memory address of the memory occupied by the target data packet, the main process completes the operation of putting the memory address of the target data packet back to the memory management queue, and the secondary process only performs one-down operation on the reference count of the data packet after processing the data packet, so that the reliability of data packet processing is improved.
In the existing data packet processing technology, a secondary process is adopted to release a data packet, when the secondary process puts the memory address of the processed data packet into a memory management queue, the secondary process needs to modify the head and the tail of a producer of the memory management queue, and when the secondary process adjusts the head of the producer, the secondary process exits abnormally. At this time, the secondary process does not adjust the tail of the producer yet, so that the memory management queue cannot normally run and is in a blocking state, when the memory management queue is full, the network card cannot acquire the memory address for storing the data packet from the memory management queue, and finally the network card cannot receive the data packet. Based on the above problems, embodiments of the present invention provide a data packet processing method for a target application, where a main process completes an operation of returning a memory address of a data packet processed by a secondary process to a memory management queue, and the secondary process only performs a subtraction operation on a reference count of the data packet after processing the data packet, so that a problem of management queue blocking due to inconsistent heads and tails of producers of the memory management queue does not occur, thereby avoiding the problem of memory management queue blocking due to abnormal exit of the secondary process, and improving reliability of data packet processing.
Corresponding to the foregoing method for processing a packet of a target application, an embodiment of the present invention provides a packet processing apparatus of a target application, referring to a schematic structural diagram of the packet processing apparatus of the target application as shown in fig. 5, where the apparatus includes:
A detection module 51, configured to detect whether a target data packet exists in a memory pool occupied by a target application through a host process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application.
The releasing module 52 is configured to release, by the host process, the memory occupied by the target data packet when the target data packet exists in the memory pool.
According to the data packet processing device of the target application, provided by the embodiment of the invention, after the secondary process completes processing operation on the data packet, the main process releases the memory of the target data packet so as to substantially release the target data packet, and the problem that the target application cannot normally process the data packet when the secondary process abnormally exits in the prior art is solved, so that the device improves the data packet processing stability of the target application.
In an embodiment, the detecting module 51 is further configured to detect whether there is a data packet with a reference count of 0 in the memory pool; if there is a packet with reference count of 0, the packet with reference count of 0 is determined as the destination packet.
in an embodiment, the releasing module 52 is further configured to determine an address of a memory occupied by the target data packet as a target memory address, and send the target memory address to the memory management queue, so that the memory pool receives a new data packet sent by the network card based on the target memory address in the memory management queue.
in one embodiment, the above apparatus further comprises:
The data packet processing module is used for acquiring unprocessed data packets from the memory pool; searching a sub-process for processing the unprocessed data packet from a plurality of sub-processes of the target application, and taking the searched sub-process as a target sub-process; and sending the memory address of the unprocessed data packet to the target secondary process through the ring queue so that the target secondary process processes the unprocessed data packet.
In one embodiment, the processing operation includes: the data packets are processed in a preset manner and the reference count of the processed data packets is decremented by 1.
According to the data packet processing device for the target application, provided by the embodiment of the invention, the main process can quickly determine the target data packet and the memory address of the memory occupied by the target data packet, the main process completes the operation of putting the memory address of the target data packet back to the memory management queue, and the secondary process only performs one-down operation on the reference count of the data packet after processing the data packet, so that the reliability of data packet processing is improved.
the device provided by the embodiment has the same implementation principle and technical effect as the foregoing embodiment, and for the sake of brief description, reference may be made to the corresponding contents in the foregoing method embodiment for the portion of the embodiment of the device that is not mentioned.
An embodiment of the present invention provides an electronic device, as shown in a schematic structural diagram of the electronic device shown in fig. 6, where the electronic device includes a processor 61 and a memory 62, where a computer program operable on the processor is stored in the memory, and when the processor executes the computer program, the steps of the method for processing a data packet of a target application provided in the foregoing embodiment are implemented.
referring to fig. 6, the electronic device further includes: a bus 64 and a communication interface 63, and the processor 61, the communication interface 63 and the memory 62 are connected by the bus 64. The processor 61 is for executing executable modules, such as computer programs, stored in the memory 62.
The Memory 62 may include a high-speed Random Access Memory (RAM) and may also include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The communication connection between the network element of the system and at least one other network element is realized through at least one communication interface 63 (which may be wired or wireless), and the internet, a wide area network, a local network, a metropolitan area network, and the like can be used.
The bus 64 may be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, an EISA (extended Industry Standard Architecture) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one double-headed arrow is shown in FIG. 6, but that does not indicate only one bus or one type of bus.
The memory 62 is configured to store a program, and the processor 61 executes the program after receiving an execution instruction, and the method executed by the apparatus defined by the flow process disclosed in any of the foregoing embodiments of the present invention may be applied to the processor 61, or implemented by the processor 61.
the processor 61 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 61. The Processor 61 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like. The device can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 62, and the processor 61 reads the information in the memory 62, and completes the steps of the method in combination with the hardware thereof.
The embodiment of the present invention provides a computer-readable medium, wherein the computer-readable medium stores computer-executable instructions, and when the computer-executable instructions are called and executed by a processor, the computer-executable instructions cause the processor to implement the data packet processing method of the target application described in the above embodiment.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for processing a packet of a target application, the method comprising:
Detecting whether a target data packet exists in a memory pool occupied by the target application through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application;
and if so, releasing the memory occupied by the target data packet through the main process.
2. The method according to claim 1, wherein the step of detecting whether the target packet exists in the memory pool occupied by the target application comprises:
detecting whether a data packet with a reference count of 0 exists in the memory pool;
If so, determining the data packet with the reference count of 0 as a target data packet.
3. The method according to claim 1, wherein the step of releasing the memory occupied by the target packet comprises:
And determining the address of the memory occupied by the target data packet as a target memory address, and sending the target memory address to a memory management queue, so that the memory pool receives a new data packet sent by a network card based on the target memory address in the memory management queue.
4. The method according to any one of claims 1-3, further comprising:
Obtaining unprocessed data packets from the memory pool;
Searching a sub-process for processing the unprocessed data packet from a plurality of sub-processes of the target application, and taking the searched sub-process as a target sub-process;
and sending the memory address of the unprocessed data packet to the target secondary process through a ring queue so that the target secondary process can process the unprocessed data packet.
5. the method of claim 4, wherein the processing operation comprises: processing the data packet according to a preset mode and subtracting 1 from the reference count of the processed data packet.
6. A packet processing apparatus for a target application, the apparatus comprising:
The detection module is used for detecting whether a target data packet exists in a memory pool occupied by the target application through a main process of the target application; the target data packet is obtained by processing the data packet by the secondary process of the target application;
And the releasing module is used for releasing the memory occupied by the target data packet through the main process when the target data packet exists in the memory pool.
7. The apparatus according to claim 6, wherein the detecting module is further configured to detect whether there is a packet with a reference count of 0 in the memory pool; and if the data packet with the reference count of 0 exists, determining the data packet with the reference count of 0 as a target data packet.
8. The apparatus according to claim 7, wherein the release module is further configured to determine an address of a memory occupied by the target data packet as a target memory address, and send the target memory address to a memory management queue, so that the memory pool receives a new data packet sent by the network card based on the target memory address in the memory management queue.
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program operable on the processor, and wherein the processor implements the method of any of claims 1-5 when executing the computer program.
10. A computer-readable medium having stored thereon computer-executable instructions that, when invoked and executed by a processor, cause the processor to implement the method of any of claims 1-5.
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