CN110510572B - Capacitive pressure sensor and manufacturing method thereof - Google Patents

Capacitive pressure sensor and manufacturing method thereof Download PDF

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CN110510572B
CN110510572B CN201910817636.8A CN201910817636A CN110510572B CN 110510572 B CN110510572 B CN 110510572B CN 201910817636 A CN201910817636 A CN 201910817636A CN 110510572 B CN110510572 B CN 110510572B
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silicon substrate
monocrystalline silicon
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CN110510572A (en
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杨翠
史芝纲
毛维
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Xidian University
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349—Creating layers of material on a substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523—Etching material
    • B81C1/00531—Dry etching
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
    • G01L1/148—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors using semiconductive material, e.g. silicon
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/12—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in capacitance, i.e. electric circuits therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0264—Pressure sensors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0128—Processes for removing material
    • B81C2201/013—Etching
    • B81C2201/0132—Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

The invention discloses a capacitance type pressure sensor and a manufacturing method thereof, which mainly solve the problem of small linear range of the existing pressure sensor and comprise a monocrystalline silicon substrate (1), an insulating layer (2), an isolating layer (3) and a polycrystalline silicon film (4) from bottom to top, wherein the insulating layer (2) consists of N laminated circular steps with the radiuses gradually reduced from top to bottom, N is more than or equal to 2, the thickness of each layer of circular step is the same, the radiuses of the circular steps are different, a through hole (5) for corroding the isolating layer (3) is etched on the polycrystalline silicon film (4), a cavity (6) is formed by corroding the isolating layer (3), metal electrodes (8) are deposited on the polycrystalline silicon film (4) and the monocrystalline silicon substrate (1), and passivation layers (7) cover other surfaces of the isolating layer, the through hole and the polycrystalline silicon film except for the metal electrodes (8). The invention has large linear range, simple process and high yield, and can be used for measuring large-range pressure in automobile systems and industrial fields.

Description

Capacitive pressure sensor and manufacturing method thereof
Technical Field
The invention belongs to the technical field of electronic devices, and particularly relates to a capacitive pressure sensor which can be used for measuring large-range pressure in automobile systems and the industrial field.
Technical Field
The MEMS pressure sensor is a core element of a pressure monitoring system, and has the function of converting external pressure into a capacitance signal to be recognized and processed by the system. The MEMS pressure sensor has the characteristics of high sensitivity, low power consumption, small volume and easy integration, and has important and wide application in the fields of intelligent electronics, biomedical treatment, aerospace, automobile systems and the like. Consequently, a great deal of capital and manpower is invested by many scientific research institutions and colleges to research MEMS pressure sensors.
The working modes of the MEMS pressure sensor mainly comprise a piezoresistive type, a capacitive type and a resonant type, the capacitive type pressure sensor is most widely applied by virtue of good linearity and temperature characteristics, the contact type capacitive type pressure sensor TMCPS is the capacitive type pressure sensor which is most researched at present, an insulating layer is arranged between an upper polar plate and a lower polar plate of a capacitor in the sensor, and the upper polar plate and the lower polar plate of the capacitor can be contacted when the sensor works, so that the sensor has the advantage of overload protection. In recent years, capacitive pressure sensors have exhibited a trend toward smaller and smaller sizes, more and more application fields, and a continuous emergence of new materials and new structures. Along with the market demand of the capacitive pressure sensor is increased, the performance requirement of the capacitive pressure sensor is also increased, the performance of the pressure sensor is improved by improving the material quality and the current application requirement cannot be met, so that the improvement of the performance of the pressure sensor by adopting the optimized design of the device structure becomes a research hotspot at home and abroad.
Currently, numerous researchers have been devoted to the development of high-performance contact pressure sensors. In 2001, Johnson et al proposed a capacitive pressure sensor with a double-membrane structure, which expanded the linear range of the sensor but reduced the sensitivity, see the analysis and design of the contact capacitive pressure sensor, Johnson, university of mansion, 2001. In 2016, royal shangjing et al proposed a capacitive pressure sensor with comb-teeth electrode structure, which effectively expands the linear range and improves the sensitivity, see patent CN 106153241A. However, the invention improves the performance of the sensor by introducing the comb electrode structure, and the process preparation difficulty is large. In 2017, Myong-Chol Kang et al proposed to improve the shape of the bottom electrode in a capacitive pressure sensor, extending the linear range of the sensor, but resulting in reduced sensitivity. See A simple analysis to advanced research of touch mode capacitive expression sensor by modifying shape of fixed electrode [ J ]. Sensors and Actuators A: Physical,263: 300-. Therefore, it has been reported that the pressure linearity range and the sensitivity of the contact capacitive pressure sensor are difficult to be improved simultaneously, and the pressure linearity range is usually small, so that the requirement of monitoring the pressure in a large range in a plurality of fields such as automobile systems and aerospace cannot be met.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned shortcomings of the prior art, and provides a capacitive pressure sensor with a simple manufacturing process and a large linear range and a manufacturing method thereof, so as to significantly increase the linear range of pressure without losing sensitivity and improve the overall performance of the capacitive pressure sensor.
In order to achieve the purpose, the capacitive pressure sensor comprises a monocrystalline silicon substrate (1), an insulating layer (2), an isolating layer (3) and a polycrystalline silicon film (4) from bottom to top, wherein a through hole (5) for corroding the isolating layer (3) is etched in the polycrystalline silicon film (4), a cavity (6) is formed in the isolating layer (3) through corrosion, a metal electrode (8) is deposited on the polycrystalline silicon film (4) and the monocrystalline silicon substrate (1), and a passivation layer (7) covers the surfaces of the isolating layer (3), the through hole (5) and the polycrystalline silicon film (4) except for the metal electrode (8), and is characterized in that:
the insulating layer (2) is composed of N laminated circular steps with the radiuses gradually reduced from top to bottom, the total thickness T of the insulating layer is 250-800 nm, the thickness of each layer of circular step is T/N, N is an integer and is more than or equal to 2, and the radius r of each layer of circular step isiDetermined by solving the following equation:
15T/R6×(R-ri)5×ri＝(i-1)T/N，
wherein i is an integer, i is more than or equal to 1 and less than or equal to N, and R is the radius of the cavity (6).
Further, the thickness h of the polysilicon film (4) is 2 to 10 μm, and the radius r issThe thickness of the polysilicon film is 150-600 mu m, and the overlapping length of the polysilicon film (4) and the cavity (6) in the horizontal direction is more than 5 mu m.
Further, the height g of the cavity (6) is 4-10 μm, and the radius R is 100-500 μm.
Further, it is characterized in that the height of the isolating layer (3) is the same as the height of the cavity (6).
Further, it is characterized in that the insulating layer (2) is made of SiO2(ii) a The isolation layer (3) is made of SiN; the passivation layer (7) adopts SiO2、SiN、Al2O3、HfO2、Sc2O3Any one of them.
In order to achieve the above object, the present invention provides a method for manufacturing a capacitive pressure sensor, comprising the steps of:
A) and etching the monocrystalline silicon in the region of the N insulating layer on the monocrystalline silicon substrate by adopting an ion etching process:
A1) making a primary mask on a monocrystalline silicon substrate, and etching the monocrystalline silicon substrate with the primary mask to obtain a substrate with a radius r1A1 st insulating layer region with the thickness t;
A2) manufacturing a secondary mask on the monocrystalline silicon substrate, and etching the monocrystalline silicon substrate with the secondary mask to obtain the final product with radius r2A2 nd insulating layer region with the thickness t;
and so on until the radius is r NThe Nth insulating layer area with the thickness of t is determined according to the actual use requirement of the device, and the value of N is an integer which is more than or equal to 2;
B) depositing an insulating layer medium in an N insulating layer region etched on a monocrystalline silicon substrate by adopting a plasma enhanced chemical vapor deposition process, and flattening to obtain an insulating layer with the total thickness T of 250-800 nm, wherein the insulating layer consists of N laminated circular steps with the radius gradually reduced from top to bottom, the thickness of each circular step is T ═ T/N, N is an integer, and N is more than or equal to 2;
C) depositing an isolation layer with the thickness g of 4-10 mu m on the monocrystalline silicon substrate and the insulating layer;
D) manufacturing a mask on the isolation layer for the first time, and removing the isolation layer medium in the metal electrode area on the monocrystalline silicon substrate by etching by using the mask;
E) depositing a polycrystalline silicon film with the thickness h of 2-10 mu m on the isolation layer;
F) manufacturing a mask on the polycrystalline silicon film for the second time, and etching to form a through hole by using the mask;
G) through the through hole on the polycrystalline silicon film, the isolating layer is etched by adopting a wet etching process to form a cavity with the radius R of 100-500 mu m and the height g of 4-10 mu m, and the cavity meets the requirement of 15T/R6×(R-ri)5×ri(i-1) T/N, wherein riThe radius of the i-th insulating layer region is shown, i is an integer, and i is more than or equal to 1 and less than or equal to N;
H) Making a mask on the polysilicon film for the third time, and etching by using the mask to obtain the radius rsA polysilicon thin film of 150 to 600 μm;
I) covering a passivation layer on the polycrystalline silicon thin film, the through hole, the isolation layer and the monocrystalline silicon substrate;
J) manufacturing a mask on the passivation layer for the fourth time, and etching and removing the passivation layer medium in the metal electrode area on the passivation layer by using the mask;
K) and manufacturing a mask on the passivation layer for the fifth time, and depositing the metal electrodes on the monocrystalline silicon substrate and the polycrystalline silicon film by using the mask through an electron beam evaporation process to finish the manufacture of the whole device.
Compared with the traditional contact capacitance type pressure sensor, the invention has the following advantages:
1. the linear range is large.
The invention adopts N layers of insulating layers, and can compensate the nonlinear deformation generated by the stress of the elastic film by setting the thickness of the insulating layer to be nonlinear along with the radius direction, thereby ensuring the linear change of the output capacitance, improving the linearity and expanding the linear range of the sensor.
2. Simple process and high yield.
The invention improves the linear range of the sensor by manufacturing the N insulating layers through corrosion and deposition processes, has simple process, avoids the problem of complicated process caused by adopting a comb tooth structure, a cantilever beam structure and the like, reduces the manufacturing difficulty of the sensor and improves the yield of devices.
Simulation results show that the linear range of the capacitive pressure sensor is obviously superior to that of the traditional contact type capacitive pressure sensor.
Drawings
FIG. 1 is a schematic top view of a capacitive pressure sensor according to the present invention;
FIG. 2 is a schematic cross-sectional view in the transverse direction AB of FIG. 1;
FIG. 3 is a process flow diagram of a capacitive pressure sensor of the present invention;
FIG. 4 is a simulated comparison of output capacitance versus pressure for a conventional contact pressure sensor in accordance with the present invention;
FIG. 5 is a simulated comparison of the sensitivity of the present invention versus a conventional pressure sensor as a function of pressure.
Detailed Description
Embodiments and effects of the present invention will be described in further detail below with reference to the accompanying drawings.
Referring to fig. 1 and 2, the capacitive pressure sensor of the present invention is a multilayer structure based on a monocrystalline silicon substrate, the structure comprising, from bottom to top: monocrystalline silicon substrate 1, insulating layer 2, isolating layer 3 and polycrystalline silicon thin film 4.
The isolation layer 3 has a height g of 4-10 μm, can adopt SiN, and has a cavity 6 in the middle; the height of the cavity 6 is the same as that of the isolating layer 3, the radius R is 100-500 mu m, and the overlapping length of the cavity and the polycrystalline silicon film 4 in the horizontal direction is more than 5 mu m;
The thickness h of the polysilicon film 4 is 2-10 μm, and the radius rs150-600 μm with a through hole 5 in the middle, and a metal electrode 8 deposited on the polysilicon film 4 and the monocrystalline silicon substrate 1,
the other surfaces of the isolating layer 3, the through hole 5 and the polycrystalline silicon film 4 except the area of the metal electrode 8 are covered with a passivation layer 7, the thickness of the passivation layer 7 is 0.06-0.12 mu m, and SiO can be adopted2、SiN、Al2O3、HfO2、Sc2O3One of (1);
the insulating layer 2 is composed of N laminated circular steps with the radiuses gradually reduced from top to bottom, the total thickness T of the insulating layer is 250-800 nm, the thickness of each layer of circular step is T/N, N is an integer and is more than or equal to 2, and the radius r of each layer of circular step isiDetermined by solving the following equation:
15T/R6×(R-ri)5×ri＝(i-1)T/N，
wherein i is an integer and is not less than 1 and not more than N, R is the radius of the cavity 6, and the insulating layer 2 is made of SiO2。
Referring to fig. 3, the method of fabricating a capacitive pressure sensor of the present invention provides three embodiments as follows:
the first embodiment is as follows: making the insulating layer of SiO2The isolation layer is SiN, the passivation layer is SiN, and the number of the insulation layer layers is 2.
Step 1, etching monocrystalline silicon in the region of 2 insulating layer regions on the monocrystalline silicon substrate, as shown in fig. 3 a.
1a) Making a primary mask on a single crystal silicon substrate using reactive ion etching techniques, i.e. in CF 4Under the process conditions of 15sccm flow, 10mT pressure and 80W power, the etching thickness t is 125nm and the radius r1A layer 1 insulating layer region of 100 μm;
1b) making a secondary mask on the monocrystalline silicon substrate, using the same reactive ion etching process conditions as 1a), with an etching thickness t of 125nm and a radius r2A layer 2 insulating layer region of 39 μm.
Step 2, depositing an insulating layer medium SiO in the region of the N insulating layer etched on the monocrystalline silicon substrate2And planarized to obtain an insulating layer, as shown in fig. 3 b.
By plasma-enhanced chemical vapor deposition, i.e. in N2O flow rate of 800sccm, SiH4Depositing an insulating layer medium SiO in the region of an insulating layer etched on the monocrystalline silicon substrate under the process conditions of the flow of 200sccm, the temperature of 250 ℃, the RF power of 25W and the pressure of 1100mT2And planarizing to obtain the insulating layer.
And 3, depositing SiN isolation layers on the monocrystalline silicon substrate and the insulating layer, as shown in the figure 3 c.
By plasma-enhanced chemical vapor deposition, i.e. at NH3The flow rate was 2.5sccm, N2Flow rate 950sccm, SiH4An isolation layer with a thickness g of 4 μm was deposited on a single-crystal silicon substrate under process conditions of a flow of 250sccm, a temperature of 300 ℃, an RF power of 25W, and a pressure of 950 mTorr.
And 4, removing the isolating layer medium of the metal electrode area on the monocrystalline silicon substrate, as shown in fig. 3 d.
Making a mask on the isolation layer for the first time by using a reactive ion etching technique, i.e. in CF4Flow rate of 55sccm, O2And etching and removing the isolating layer medium in the metal electrode area on the monocrystalline silicon substrate under the process conditions of the flow of 8sccm, the pressure of 18mT and the power of 280W.
And step 5, depositing a polycrystalline silicon film on the monocrystalline silicon substrate and the isolation layer, as shown in figure 3 e.
By chemical vapor deposition, i.e. SiCl at a reaction chamber temperature of 1200 deg.C4Flow rate at H2The mol percentage of the silicon nitride film is 5 percent, and a polycrystalline silicon film with the thickness h of 2 mu m is deposited on the monocrystalline silicon substrate and the isolating layer under the condition that the film growth rate is 2.2 mu m/min;
and 6, etching a through hole on the polycrystalline silicon film as shown in the figure 3 f.
Making a mask on the polysilicon film for the second time, in CF4And etching a through hole on the polycrystalline silicon film by a reactive ion etching process with the flow of 15sccm, the pressure of 10mT and the power of 100W.
And 7, etching the isolating layer through the through hole on the polycrystalline silicon film to form a cavity, as shown in fig. 3 g.
At H3PO4The solution concentration is 90%, and the isolation layer is etched under the wet etching condition of 180 ℃ to form a cavity with the radius R of 100 mu m in the middle of the isolation layer.
Step 8, etching the polysilicon film medium to obtain the radius rsIs a 150 μm polysilicon film, as shown in FIG. 3 h.
Making mask on the polysilicon film for the third time by reactive ion etching (CF)4The radius r is obtained under the process conditions of 15sccm flow, 10mT pressure and 100W powersIs a polysilicon film of 150 μm.
And 9, depositing a SiN passivation layer on the polycrystalline silicon thin film, the isolation layer and the monocrystalline silicon substrate, as shown in FIG. 3 i.
By plasma-enhanced chemical vapor deposition, i.e. at NH3The flow rate was 2.5sccm, N2Flow rate 950sccm, SiH4And a SiN passivation layer with the thickness of 0.06 mu m is deposited on the monocrystalline silicon substrate, the isolation layer and the polycrystalline silicon thin film under the process conditions that the flow is 250sccm, the temperature is 350 ℃, the RF power is 30W and the pressure is 1000 mT.
And 10, removing the passivation layer medium in the metal electrode area on the monocrystalline silicon substrate and the polycrystalline silicon thin film, as shown in fig. 3 j.
Making mask on the polysilicon film and the monocrystalline silicon substrate for the fourth time by using the reverse methodBy ion etching techniques, i.e. in CF4Flow rate of 20sccm, O2And etching and removing the passivation layer of the monocrystalline silicon substrate and the metal electrode area on the polycrystalline silicon thin film under the process conditions of the flow rate of 2sccm, the pressure of 20mT and the bias voltage of 100V.
Step 11, depositing a metal electrode on the monocrystalline silicon substrate and the polycrystalline silicon film, as shown in fig. 3 k.
Making mask on the polysilicon film and the monocrystalline silicon substrate for the fifth time by electron beam evaporation technique, i.e. under vacuum degree of less than 1.8 × 10-3Pa, power of 220W, evaporation rate of less than
Figure BDA0002186757040000061
Under the process conditions of (1), Al and Au metals are sequentially deposited on a monocrystalline silicon substrate and a polycrystalline silicon film to manufacture a metal electrode with the thickness of 0.08 mu m/1.2 mu m, and then gas is N2And rapidly annealing at 700 ℃ for 30s to complete the manufacture of the whole device.
The second embodiment: making the insulating layer of SiO2The isolation layer is SiN and the passivation layer is Al2O3And the insulating layer number N is 4.
Step one, etching the monocrystalline silicon in the region of 4 insulation layer regions on the monocrystalline silicon substrate, as shown in figure 3 a.
1.1) making a primary mask on a monocrystalline silicon substrate, and etching the 1 st insulating layer region by using a reactive ion etching technology, wherein the thickness t of the 1 st insulating layer region is 0.1 mu m, and the radius r1Is 250 μm;
1.2) manufacturing a secondary mask on the monocrystalline silicon substrate, and etching the 2 nd insulating layer region by using a reactive ion etching technology, wherein the thickness t of the 2 nd insulating layer region is 0.1 mu m, and the radius r 2Is 123 μm;
1.3) making a three-time mask on a monocrystalline silicon substrate, and etching the 3 rd insulating layer region by using a reactive ion etching technology, wherein the thickness t of the 3 rd insulating layer region is 0.1 mu m, and the radius r3Is 97 μm;
1.4) making four times of mask on the monocrystalline silicon substrate, etching the 4 th layer of insulation by using reactive ion etching technologyLayer region, the thickness t of the 4 th insulating layer region is 0.1 μm, and the radius r476 μm;
the process conditions of the reactive ion etching are as follows: CF (compact flash)4The flow rate is 20sccm, the pressure is 20mT, and the power is 100W.
Step two, obtain the insulating layer, as in fig. 3 b.
Depositing an insulating layer medium SiO in an insulating layer area etched on a monocrystalline silicon substrate by adopting a plasma enhanced chemical vapor deposition technology2And planarizing to obtain the insulating layer.
The process conditions of the plasma enhanced chemical vapor deposition technology for depositing the medium are as follows: n is a radical of2O flow rate of 850sccm, SiH4The flow rate was 250sccm, the temperature was 250 ℃, the RF power was 35W, and the pressure was 1200 mT.
And thirdly, depositing a SiN isolation layer as shown in FIG. 3 c.
Depositing an isolation layer with the thickness g of 5.5 mu m on the monocrystalline silicon substrate by adopting a plasma enhanced chemical vapor deposition technology, wherein the process conditions of the plasma enhanced chemical vapor deposition technology are as follows: the gas being NH 3、N2And SiH4The gas flow rates were 2.5sccm, 950sccm, and 250sccm, respectively, and the temperature, RF power, and pressure were 300 deg.C, 25W, and 950mTorr, respectively.
And step four, removing the isolating layer medium of the metal electrode area on the monocrystalline silicon substrate, as shown in fig. 3 d.
Manufacturing a mask on the isolation layer for the first time, and etching and removing the isolation layer medium in the metal electrode area on the monocrystalline silicon substrate by adopting a reactive ion etching technology, wherein the process conditions of the reactive ion etching are as follows: CF4Flow rate of 55sccm, O2The flow rate was 8sccm, the pressure was 18mT, and the power was 280W.
And step five, depositing a polycrystalline silicon film on the monocrystalline silicon substrate and the isolation layer, as shown in figure 3 e.
Depositing a polycrystalline silicon film with the thickness h of 5 mu m on the monocrystalline silicon substrate and the isolating layer by adopting a chemical vapor deposition technology, wherein the process conditions for depositing the polycrystalline silicon film are as follows: the temperature of the reaction chamber is 1200 ℃, SiCl4Flow rate at H2The mol percent of the components is 5 percentThe film growth rate was 2.5 μm/min.
And step six, etching a through hole on the polycrystalline silicon film, as shown in figure 3 f.
Manufacturing a mask on the polycrystalline silicon film for the second time, and etching a through hole on the polycrystalline silicon film by adopting a reactive ion etching technology, wherein the process conditions of the reactive ion etching are as follows: CF (compact flash) 4The flow rate was 15sccm, the pressure was 10mT, and the power was 100W.
Step seven, forming a cavity in the middle of the isolation layer, as shown in fig. 3 g.
And etching the isolation layer by adopting a wet etching technology to form a cavity with the radius R of 250 mu m in the middle of the isolation layer, wherein the process conditions of the wet etching technology are as follows: h3PO4Concentration of the solution was 91.5%, temperature: 190 ℃.
And step eight, obtaining the polycrystalline silicon thin film as shown in figure 3 h.
Making a mask on the polysilicon film for the third time, and obtaining the radius r by adopting a reactive ion etching technologysThe polysilicon film is 300 mu m, wherein the process conditions of the reactive ion etching are as follows: CF (compact flash)4The flow rate was 15sccm, the pressure was 10mT, and the power was 100W.
And step nine, depositing a passivation layer on the polycrystalline silicon thin film, the isolation layer and the monocrystalline silicon substrate, as shown in figure 3 i.
Depositing a passivation layer Al with the thickness of 0.1 mu m on the monocrystalline silicon substrate, the isolation layer and the polycrystalline silicon film by adopting a plasma enhanced chemical vapor deposition technology2O3Wherein the process conditions of the plasma enhanced chemical vapor deposition are as follows: with TMA and H2O is a reaction source, and the carrier gas is N2The flow rate of the carrier gas was 200sccm, the substrate temperature was 300 ℃ and the gas pressure was 700 Pa.
Step ten, removing the passivation layer of the metal electrode area on the monocrystalline silicon substrate and the polycrystalline silicon thin film, as shown in fig. 3 j.
Making masks on the polycrystalline silicon film and the monocrystalline silicon substrate for the fourth time, and etching and removing the monocrystalline silicon substrate and the passivation layer of the metal electrode area on the polycrystalline silicon film by adopting a reactive ion etching technology, wherein the process conditions of the reactive ion etching are as follows: CF4Flow rate of 20sccm, O2The flow rate was 2sccm, the pressure was 20mT, and the bias voltage was 100V.
Step eleven, depositing a metal electrode on the monocrystalline silicon substrate and the polycrystalline silicon film, as shown in FIG. 3 k.
Making mask on the polysilicon film and the monocrystalline silicon substrate fifth time, depositing Al and Au metals on the monocrystalline silicon substrate and the polysilicon film in sequence by electron beam evaporation technology, making metal electrode with thickness of 0.08 μm/1.2 μm, and then making N2Carrying out rapid annealing in the atmosphere, wherein the process conditions adopted for depositing the metal are as follows: vacuum degree less than 1.8X 10-3Pa, power 230W, evaporation rate less than
Figure BDA0002186757040000081
The process conditions adopted by the rapid annealing are as follows: the gas being N2The temperature is 700 ℃ and the time is 30s, and the manufacturing of the whole device is finished.
Example three: making the insulating layer of SiO2The isolation layer is SiN and the passivation layer is HfO2And the insulating layer number N is 5.
Step A, etching the monocrystalline silicon in the region of the 5 insulating layer regions on the monocrystalline silicon substrate, as shown in FIG. 3 a.
Firstly, a primary mask is made on a monocrystalline silicon substrate, a 1 st insulating layer region is etched by using a reactive ion etching technology, the thickness t of the 1 st insulating layer region is 0.16 mu m, and the radius r1Is 500 μm; then, a secondary mask is made on the monocrystalline silicon substrate, and the reactive ion etching technology is used, wherein the etching thickness t is 0.16 mu m, and the radius r2Forming a 2 nd insulating layer region of 260 μm, making a third mask on the monocrystalline silicon substrate, and etching by reactive ion etching to a thickness t of 0.16 μm and radius r3A layer 3 insulating layer region of 213 μm; making four masks on the monocrystalline silicon substrate, and etching to a thickness t of 0.16 μm and radius r by reactive ion etching4A 4 th insulating layer region of 177 μm, making five masks on the single crystal silicon substrate, and etching by reactive ion etching to a thickness t of 0.16 μm and radius r5A layer 5 insulating layer region of 142 μm,
wherein, the first and the second end of the pipe are connected with each other,the process conditions of the reactive ion etching are as follows: CF (compact flash)4The flow rate was 25sccm, the pressure was 30mT, and the power was 120W.
And step B, depositing an insulating layer medium in the insulating layer area etched on the monocrystalline silicon substrate, and flattening to obtain an insulating layer, as shown in figure 3B.
In N2O flow rate of 900sccm, SiH 4And depositing an insulating layer medium in the region of the insulating layer etched on the monocrystalline silicon substrate under the process conditions of the flow of 300sccm, the temperature of 250 ℃, the RF power of 40W and the pressure of 1300mT to obtain the insulating layer.
Step C, depositing an isolation layer on the monocrystalline silicon substrate and the insulating layer, as shown in FIG. 3C.
Adopting plasma enhanced chemical vapor deposition technology to obtain NH gas3、N2And SiH4The isolating layer SiN with the thickness g of 10 mu m is deposited on the monocrystalline silicon substrate under the process conditions that the gas flow is respectively 2.5sccm, 950sccm and 250sccm, and the temperature, the RF power and the pressure are respectively 300 ℃, 25W and 950 mTorr.
And D, removing the isolation layer of the metal electrode area on the monocrystalline silicon substrate, as shown in figure 3D.
Making a mask on the isolation layer for the first time, adopting reactive ion etching technique, and etching the CF4The flow rate was 55sccm, O2And etching and removing the isolation layer of the metal electrode area on the monocrystalline silicon substrate under the process conditions of the flow of 8sccm, the pressure of 18mT and the power of 280W.
And step E, depositing a polycrystalline silicon film on the monocrystalline silicon substrate and the isolation layer, as shown in figure 3E.
By adopting a plasma enhanced chemical vapor deposition technology, the temperature in a reaction chamber and the film growth rate are 1200 ℃ and 3 mu m/min respectively, and SiCl is adopted4Flow rate at H 2In the process, a polysilicon film with a thickness h of 10 μm is deposited on the monocrystalline silicon substrate and the isolation layer under the process condition of 5 mol%.
And F, etching a through hole on the polycrystalline silicon film as shown in figure 3F.
Making mask on the polysilicon film layer for the second time, and adopting reactive ion etching technique to make CF4Flow rate of 15sccm, pressureAnd etching a through hole on the polycrystalline silicon film under the process conditions of the strength of 10mT and the power of 100W.
And G, etching the isolation layer to form a cavity with the radius R of 500 mu m, as shown in figure 3G.
By wet etching technique in H3PO4The solution concentration is 92%, and the cavity is formed in the middle of the isolation layer by etching under the process condition that the temperature is 200 ℃.
Step H, obtaining the radius rsIs a 600 μm polysilicon film as shown in FIG. 3 h.
Making mask on the polysilicon film layer for the third time, and adopting reactive ion etching technique to make CF4Etching the medium around the polysilicon film under the process conditions of 15sccm flow, 10mT pressure and 100W power to obtain the radius rsIs a polysilicon film of 600 μm.
Step I, depositing a passivation layer on the polycrystalline silicon thin film, the isolation layer and the monocrystalline silicon substrate, as shown in figure 3I.
Adopting radio frequency magnetron reactive sputtering technology, and adopting gas O2And Ar, the gas flow is respectively 1sccm and 8sccm, the temperature, the Hf target radio frequency power and the sputtering gas pressure of the reaction chamber are respectively 200 ℃, 150W and 0.1Pa, and HfO with the thickness of 0.12 mu m is deposited on the monocrystalline silicon substrate, the isolation layer and the polycrystalline silicon film 2And a passivation layer.
And step J, removing the passivation layer of the metal electrode area on the monocrystalline silicon substrate and the polycrystalline silicon film, as shown in figure 3J.
Making mask on the polysilicon film and the monocrystalline silicon substrate for the fourth time, and performing reactive ion etching on CF4Flow rate of 20sccm, O2And etching to remove the passivation layer of the monocrystalline silicon substrate and the metal electrode area on the polycrystalline silicon thin film under the process conditions of the flow rate of 2sccm, the pressure of 20mT and the bias voltage of 100V.
And step K, depositing a metal electrode on the monocrystalline silicon substrate and the polycrystalline silicon film, as shown in figure 3K.
Making mask on the polysilicon film and the monocrystalline silicon substrate for the fifth time, and adopting electron beam evaporation technology to make vacuum degree less than 1.8 × 10-3Pa, power of 240W, evaporation rate of less than
Figure BDA0002186757040000101
Under the process conditions of (1), Al/Au metal is deposited on a monocrystalline silicon substrate and a polycrystalline silicon film in sequence to manufacture a metal electrode with the thickness of 0.08 mu m/1.2 mu m, and then a rapid annealing technology is adopted to carry out N gas2And carrying out rapid annealing at the temperature of 700 ℃ for 30s to finish the manufacture of the whole device.
The effects of the present invention can be further illustrated by the following simulations.
First, simulation parameter
The traditional contact type capacitance pressure sensor and the sensor of the invention adopt the same size except an insulating layer, the thickness h of the polysilicon film is 5 mu m, the height g of the cavity is 5.5 mu m, and the radius R is 250 mu m;
The thickness of an insulating layer of the traditional pressure sensor is 0.36 mu m, and the radius is 250 mu m;
the sensor of the invention comprises ten insulating layers, the total thickness T is 0.36 mu m, the thickness T of each layer is 36nm, and the radiuses of the ten insulating layers are r respectively1＝250μm，r2＝148μm，r3＝130μm，r4＝117μm，r5＝106μm，r6＝97μm，r7＝88μm，r8＝80μm，r9＝71μm，r10＝61μm。
Second, simulation content
Simulation 1: the variation of the output capacitance of the invention and the traditional contact capacitance type pressure sensor in the pressure range of 0 to 3000KPa is simulated, and the variation of the output capacitance along with the pressure is shown in figure 4. As can be seen from fig. 4, the linearity of the output capacitance of the sensor of the present invention with pressure is superior to that of the conventional sensor.
Simulation 2: the variation of the sensitivity of the present invention and the conventional capacitive pressure sensor in the pressure range of 0 to 3000KPa was simulated, and the variation of the sensitivity with the pressure was as shown in fig. 5.
It can be seen from fig. 5 that the linear pressure ranges of both the conventional sensor and the sensor of the present invention begin at 260KPa, and the sensitivity of the conventional sensor begins to drop significantly when the pressure is greater than 320KPa, whereas the sensitivity of the sensor of the present invention remains stable over a pressure range of 3000KPa, so the sensor of the present invention has a greater linear pressure range.
The foregoing description is of three specific examples of the invention, and it will be apparent to those skilled in the art that various modifications and variations in form and detail can be made in the method according to the invention without departing from the spirit and scope of the invention, e.g., the passivation layer may be formed of SiO in addition to the material used in the three specific examples 2、Sc2O3But such modifications and variations are within the scope of the invention as defined by the appended claims.

Claims (5)

1. A method of making a capacitive pressure sensor, comprising:
A) and etching the monocrystalline silicon in the region of the N-layer insulating layer on the monocrystalline silicon substrate by adopting an ion etching process:
A1) making a mask on a monocrystalline silicon substrate, and etching the monocrystalline silicon substrate with the mask to obtain a substrate with a radius r1A1 st insulating layer region with the thickness t;
A2) manufacturing a secondary mask on the monocrystalline silicon substrate, and etching the monocrystalline silicon substrate with the radius r by using the secondary mask2A2 nd insulating layer region with the depth of t;
and so on until the radius is rNThe Nth insulating layer area with the thickness of t is determined according to the actual use requirement of the device, and the value of N is an integer which is more than or equal to 2;
B) depositing an insulating layer medium in an N insulating layer region etched on a monocrystalline silicon substrate by adopting a plasma enhanced chemical vapor deposition process, and flattening to obtain an insulating layer with the total thickness T of 250-800 nm, wherein the insulating layer consists of N laminated circular steps with the radius gradually reduced from top to bottom, the thickness of each circular step is T ═ T/N, N is an integer, and N is more than or equal to 2;
C) Depositing an isolation layer with the thickness g of 4-10 mu m on the monocrystalline silicon substrate and the insulating layer;
D) manufacturing a mask on the isolation layer for the first time, and removing the isolation layer medium in the metal electrode area on the monocrystalline silicon substrate by etching by using the mask;
E) depositing a polycrystalline silicon film with the thickness h of 2-10 mu m on the isolation layer;
F) manufacturing a mask on the polycrystalline silicon film for the second time, and etching to form a through hole by using the mask;
G) through the through hole on the polycrystalline silicon film, the isolating layer is etched by adopting a wet etching process to form a cavity with the radius R of 100-500 mu m and the height g of 4-10 mu m, and the cavity meets the requirement of 15T/R6×(R-ri)5×ri(i-1) T/N, wherein i is an integer, and 1 ≦ i ≦ N;
H) making a mask on the polysilicon film for the third time, and obtaining the radius r by using the masksA polysilicon thin film of 150 to 600 μm;
I) covering a passivation layer on the polycrystalline silicon thin film, the through hole, the isolation layer and the monocrystalline silicon substrate;
J) manufacturing a mask on the passivation layer for the fourth time, and etching and removing the passivation layer medium in the metal electrode area on the passivation layer by using the mask;
K) and manufacturing a mask on the passivation layer for the fifth time, and depositing the metal electrodes on the monocrystalline silicon substrate and the polycrystalline silicon film by using the mask through an electron beam evaporation process to finish the manufacture of the whole device.
2. The method of claim 1, wherein: the ion etching process conditions in the step A are as follows: CF (compact flash)4The flow rate ranges from 15 sccm to 25sccm, the pressure ranges from 10 mT to 30mT, and the power ranges from 80W to 120W.
3. The method of claim 1, wherein: the plasma enhanced chemical vapor deposition process conditions in the step B are as follows: n is a radical of2The flow rate of O is 800-900 sccm and SiH4The flow rate is 200-300 sccm, the temperature is 250 ℃, the RF power is 25-40W, and the pressure is 1100-1300 mT.
4. The method of claim 1, wherein: the wet etching process conditions in the step G are as follows: h3PO4The concentration range of the solution is 90-92%, and the temperature range is 180-200 ℃.
5. The method of claim 1, wherein: the electron beam evaporation process condition in the step K is that the vacuum degree is less than 1.8 multiplied by 10-3Pa, power range of 220-240W, evaporation rate less than
Figure FDA0003623569070000021
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