CN110488228B - Linear frequency modulation signal generation method and device and storage medium - Google Patents

Linear frequency modulation signal generation method and device and storage medium Download PDF

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CN110488228B
CN110488228B CN201910624134.3A CN201910624134A CN110488228B CN 110488228 B CN110488228 B CN 110488228B CN 201910624134 A CN201910624134 A CN 201910624134A CN 110488228 B CN110488228 B CN 110488228B
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quantization parameter
chirp
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frequency modulation
time
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CN110488228A (en
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马瑜杰
曲春辉
肖灯军
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Institute of Electronics of CAS
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Abstract

The application discloses a linear frequency modulation signal generation method, a device and a storage medium, wherein the method comprises the following steps: receiving an externally input frequency modulation slope quantization parameter and a time width quantization parameter; determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter; and determining real part data and imaginary part data corresponding to the linear frequency modulation signal to be generated based on the waveform phase parameter and a stored sine and cosine lookup table. As only the FM slope quantization parameter and the time width quantization parameter need to be received, external input can be reduced, the number of control signal connecting lines is reduced on hardware, the complexity of system design is favorably reduced, and the method is particularly suitable for being applied to satellite-borne radars.

Description

Linear frequency modulation signal generation method and device and storage medium
Technical Field
The present application relates to the field of signal processing technologies, and in particular, to a linear frequency modulation signal generation method, device, and storage medium.
Background
Chirp signals have been widely used in the field of high resolution radar as a commonly used pulse compression signal in radar systems. In recent years, with the continuous development of radar technology, the performance index of the system is improved, and the number of working modes is increased, so that the demand for radar emission signals is also increased. The traditional satellite-borne radar can only generate a few or more than ten linear frequency modulation signals and can not meet the requirements of a system which is continuously developed.
Disclosure of Invention
In view of the above, embodiments of the present application provide a method, an apparatus, and a storage medium for generating a chirp signal, which at least solve the problem that the generated chirp signal cannot meet the system requirements.
The technical scheme of the embodiment of the application is realized as follows:
in a first aspect, an embodiment of the present application provides a method for generating a chirp signal, where the method includes:
receiving an externally input frequency modulation slope quantization parameter and a time width quantization parameter;
determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter;
and determining real part data and imaginary part data corresponding to the linear frequency modulation signal to be generated based on the waveform phase parameter and a stored sine and cosine lookup table.
In a second aspect, an embodiment of the present application provides a chirp signal generation apparatus, including:
the receiving module is used for receiving an externally input frequency modulation slope quantization parameter and a time width quantization parameter;
the first determining module is used for determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter;
and the second determining module is used for determining real part data and imaginary part data corresponding to the to-be-generated linear frequency modulation signal based on the waveform phase parameter and a stored sine and cosine lookup table.
In a third aspect, an embodiment of the present application provides a chirp signal generation apparatus, including:
a memory for storing a computer program;
and a processor, configured to implement the chirp signal generation method according to the embodiment of the present application when executing the computer program stored in the memory.
In a fourth aspect, an embodiment of the present application provides a computer storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the chirp signal generation method according to the embodiment of the present application.
In the technical scheme provided by the embodiment of the application, the frequency modulation slope quantization parameter and the time width quantization parameter which are input from the outside are received; determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter; determining real part data and imaginary part data corresponding to the to-be-generated linear frequency modulation signal based on the waveform phase parameter and a stored sine and cosine lookup table, and further determining a corresponding linear frequency modulation signal, so that the corresponding linear frequency modulation signal can be generated according to an externally input frequency modulation slope quantization parameter and a time width quantization parameter, and the system requirement is met; meanwhile, as only the externally input frequency modulation slope rate quantization parameter and the time width quantization parameter need to be received, the external input can be reduced, the number of control signal lines corresponding to the externally input parameter is reduced on hardware, the system design complexity is favorably reduced, and the method is particularly suitable for being applied to the satellite-borne radar.
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Fig. 1 is a schematic view showing a structure of a chirp signal generation apparatus in the related art;
fig. 2 is a schematic structural diagram of a chirp signal generation apparatus according to an embodiment of the present application;
fig. 3 is a schematic flowchart illustrating a method for generating a chirp signal according to an embodiment of the present disclosure;
FIG. 4 is a timing diagram of a serial transmission control line according to an embodiment of the present application;
fig. 5 is a schematic flow chart illustrating a chirp signal generation method according to another embodiment of the present application;
fig. 6 is a block diagram of a chirp signal generation apparatus according to an embodiment of the present application.
Detailed Description
The technical solution of the present application is further described in detail with reference to the drawings and specific embodiments of the specification. It should be understood that the examples provided herein are merely illustrative of the present application and are not intended to limit the present application. In addition, the following examples are provided as partial examples for implementing the present application, not all examples for implementing the present application, and the technical solutions described in the examples of the present application may be implemented in any combination without conflict.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
The embodiment of the application relates to a method for generating chirp signals by a satellite-borne radar, in the related art, as shown in fig. 1, a chirp signal generation device receives externally input time width and bandwidth control signals through N time width and bandwidth control lines, a chirp signal generation unit converts the externally input time width and bandwidth control signals into different time width and bandwidth values, then calculates the phase of a chirp signal, calculates sine and cosine to obtain an I-path signal corresponding to a real part of the chirp signal and a Q-path signal corresponding to an imaginary part of the chirp signal, I, Q paths of signals generated by the chirp signal generation unit are input into a digital-to-analog conversion (DAC) chip and output I, Q paths of analog signals after being processed by the DAC chip.
Because the system of the satellite-borne radar is huge, the structure is complex, and the resource allocation of the hardware connecting lines is limited, the method shown in fig. 1 is limited by the time width and the number of the bandwidth control signal hardware connecting lines, only a few fixed or more than ten linear frequency modulation signals can be generated, the operation process is complex, and more operation resources need to be occupied by calculation.
In order to simplify the operation process of generating the chirp signal, save operation resources, and enable the generated chirp signal to meet the requirements of the system, the embodiments of the present application provide a chirp signal generation method, which can generate a chirp signal of a time width and a bandwidth meeting a set requirement only according to an externally input chirp slope quantization parameter and a time width quantization parameter.
Before introducing the chirp signal generation method, the chirp signal generation device according to the embodiment of the present application is described as follows:
fig. 2 shows a schematic structural diagram of a chirp signal generation apparatus according to an embodiment of the present application, please refer to fig. 2, where the chirp signal generation apparatus includes a processor 201 and a digital-to-analog converter 202, the processor 201 includes a first communication interface and a second communication interface, the processor 201 receives an externally input chirp rate quantization parameter and a time width quantization parameter through the first communication interface, and the processor 201 is connected to the digital-to-analog converter 202 through the second communication interface. The processor 201 is internally provided with a chirp signal generation unit, the chirp signal generation unit receives an externally input frequency slope quantization parameter and a time width quantization parameter through a first communication interface, I, Q paths of signals are output to the digital-to-analog converter 202 through a second communication interface, and the digital-to-analog converter 202 performs digital-to-analog conversion on I, Q paths of received signals and outputs I, Q paths of analog signals. In one embodiment, the processor 201 may employ a field programmable gate array FPGA. It will be appreciated that in other embodiments, the Processor 201 may also employ a general purpose Processor, a Digital Signal Processor (DSP), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. The processor 201 may also be connected to peripheral chips such as a clock configuration chip, a sensor detection chip, etc. In a specific embodiment, the first communication interface adopts a serial communication interface, that is, the serial communication interface receives an externally input chirp rate quantization parameter and a time width quantization parameter, so that the number of control signal hardware connection lines can be reduced, hardware connection line resources are saved, and the system design complexity is reduced, which is particularly important in a satellite-borne radar system.
Referring to fig. 3, an embodiment of the present application provides a method for generating a chirp signal, including:
step 301, receiving an externally input chirp rate quantization parameter and a time width quantization parameter;
here, the processor 201 receives an externally input chirp rate quantization parameter and time width quantization parameter through the first communication interface. The chirp rate quantization parameter is generated based on a chirp rate range and a chirp rate parameter, that is, the received chirp rate quantization parameter varies with the chirp rate range and the chirp rate parameter. The time-width quantization parameter is generated based on the pulse time-width range, that is, the received time-width quantization parameter is changed along with the change of the pulse time-width range. For example, the chirp rate quantization parameter and the time width quantization parameter may be generated by an arithmetic device, and the arithmetic device outputs the generated chirp rate quantization parameter and the generated time width quantization parameter to the processor 201 through the first communication interface.
In one embodiment, the chirp rate quantization parameter is defined as:
Figure BDA0002126487620000051
wherein kchirp is a chirp rate quantization parameter, round () is a rounding integer function, Bw is a bandwidth of a to-be-generated chirp signal, Tw is a time width of the to-be-generated chirp signal, Fs is a sampling rate of the to-be-generated chirp signal, and M is a variable parameter.
Here, M may be determined according to a chirp rate parameter (i.e., chirp rate accuracy) corresponding to the chirp signal to be generated. Specifically, since kchirp is an integer, when kchirp is assumed to be 1, the chirp rate accuracy can be determined
Figure BDA0002126487620000052
Namely, it is
Figure BDA0002126487620000053
Therefore, chirp rate accuracy can be exploited according to equation (2) above
Figure BDA0002126487620000054
And determining the value of M. Such as forThe precision of the frequency modulation slope is 0.017MHz/s, and the value of M is 25.
In one embodiment, the time-width quantization parameter is defined as:
Figure BDA0002126487620000055
wherein, the time is a time width quantization parameter.
In a specific embodiment, the first communication interface of the processor 201 may adopt a serial communication interface, where the serial communication interface includes 3 hardware connection lines, which are a clock line CLK, a DATA valid FLAG line FLAG, and a DATA line DATA, please refer to fig. 4, where the FLAG indicates that DATA is valid when it is low, 1bit of DATA is transmitted in each clock cycle, and the DATA respectively transmits a chirp rate quantization parameter kchirp, a time width quantization parameter timeout, and other control signals in a front-back order, so as to save hardware connection resources and reduce system design complexity. Assume kchirp is W widekWhen the bit width of the timer is Wt, W is occupied for transmitting kcirpkOne clock cycle, the transmission time takes Wt clock cycles.
In particular, the bit width W of KchirpkThe determination process of (2) is as follows:
in the formula (1), kchirp is 2WkAt-1, corresponding to the maximum value of chirp rate
Figure BDA0002126487620000056
Namely, it is
Figure BDA0002126487620000057
Based on the maximum value of the chirp rate, according to equation (4), with the proviso that M is defined
Figure BDA0002126487620000058
Determining bit width WkThe value of (c). For example, when M is 25 and the bit width Wk is 12, the represented chirp rate is 0 to 69.4 MHz/s.
Specifically, the process of determining the bit width Wt of timer is as follows:
the bit width Wt of the timer is determined according to the maximum value of the above equation (3).
Thus, the processor 201 may receive the chirp rate quantization parameter kcirp and the time width quantization parameter time inputted from the outside through the first communication interface, and then, perform step 302.
Step 302, determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter;
in a specific embodiment, the determining, based on the chirp rate quantization parameter and the time width quantization parameter, a waveform phase parameter corresponding to a linear chirp signal to be generated includes:
generating a time variable based on the time width quantization parameter;
determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter.
In one example, assuming that the time variable is n, then n ranges from [ -time](ii) a Multiplying the quantization parameter kchirp of the frequency modulation slope by n to obtain kchirp n2Then, the multiplication result is reduced by 2M0Multiplying, wherein M0 is M-M1, and M1 is a bit width corresponding to an address range of the sine and cosine lookup table; obtaining the product of ph0 ═ kcirp · n2/2M0Wherein, ph0 is a waveform phase parameter.
Step 303, determining real part data and imaginary part data corresponding to the chirp signal to be generated based on the waveform phase parameter and a stored sine and cosine lookup table.
Here, the sine and cosine lookup table is generated based on a bit width of real part data or imaginary part data corresponding to the chirp signal to be generated, the bit width being determined according to a bit width of an input signal of the digital-to-analog converter 202. According to the waveform phase parameter ph0 obtained in step 302, the sine and cosine lookup table is searched based on the waveform phase parameter ph0
Figure BDA0002126487620000061
And
Figure BDA0002126487620000062
corresponding values respectively, an ideal linear frequency modulation signal cos (pi kt) can be obtained2) And sin (π kt)2)。
It should be noted that, because the expression of the real part i (t) and imaginary part q (t) of the ideal chirp signal is:
I(t)＝cos(πkt2)
Q(t)＝sin(πkt2) (5)
wherein k is the frequency modulation slope,
Figure BDA0002126487620000071
t is a variable of the continuous time,
Figure BDA0002126487620000072
here, when t is expressed by a discrete time variable, there are:
Figure BDA0002126487620000073
wherein, the time is determined by the above formula (3), and k and t are substituted into the above formula (5) to obtain:
Figure BDA0002126487620000074
Figure BDA0002126487620000075
wherein I (n) is real data, Q (n) is imaginary data,
Figure BDA0002126487620000076
is a constant corresponding to the chirp rate quantization parameter, specifically, the chirp rate quantization parameter and
Figure BDA0002126487620000077
the corresponding relation is determined by the formula (1). Substituting the chirp rate quantization parameter kcirp into the above formula (7) according to the formula (1) to obtain:
Figure BDA0002126487620000078
Figure BDA0002126487620000079
for equation (8) above, decomposing M into M1 and M-M1, and letting M0 become M-M1, yields:
Figure BDA00021264876200000710
Figure BDA00021264876200000711
wherein, M1 is the bit width corresponding to the address range of the sine and cosine lookup table.
Thus, according to the waveform phase parameter ph0 obtained in step 302, ph0 is kchirp · n2/2M0Based on the waveform phase parameter ph0, the sine and cosine lookup table can be searched
Figure BDA00021264876200000712
And
Figure BDA00021264876200000713
respectively obtaining corresponding values to obtain real part data I (n) and imaginary part data Q (n) corresponding to the linear frequency modulation signal to be generated.
In this embodiment of the application, the sine and cosine lookup table is generated based on the bit width L of the real part data i (n) or the imaginary part data q (n) corresponding to the chirp signal to be generated.
Since the real part data and the imaginary part data corresponding to the linear frequency modulation signal to be generated need to be subjected to digital-to-analog conversion by the digital-to-analog converter 202, a line is obtainedChirp signals, i.e., real and imaginary analog signals that determine the chirp signal. The bit width of the real part data and the bit width of the imaginary part data need to be consistent with the bit width of the input signal of the digital-to-analog converter 202, so that the subsequent digital-to-analog conversion processing can be performed. Assuming that bit widths of real part data and imaginary part data are L, determining the address range of the sine and cosine lookup table to be 0-2M1-1M1 is the address line bit width, i.e. the bit width corresponding to the address range of the sine and cosine lookup table.
It should be noted that the value of M1 corresponds to the design accuracy of the sine and cosine lookup table, and the larger M1 is, the higher the design accuracy is, but the more the occupied storage resources are. Because the bit width L of the output data (i.e., the bit width of the real part data or the imaginary part data) corresponding to the sine and cosine lookup table is limited, that is, the precision of the output data is limited, the M1 can be selected reasonably according to the bit width of the output data without selecting too much, so that the storage resource can be saved.
In one embodiment, the value of M1 is such that the difference between two adjacent points is less than or equal to 1 at the place where the chirp signal changes most rapidly. The sine and cosine function changes most quickly at the value of 0, so a reasonable value of M1 can be selected according to the following formula:
Figure BDA0002126487620000081
in practical applications, if the bit width L of the output data is 10 bits, according to the above equation (10), M1 may be an integer greater than or equal to 12, and if M1 is 12, the storage space occupied by the sine-cosine lookup table is 21210bit, if M1 is 13, the memory space occupied by sine and cosine lookup table is 21310bit, the value of the specific M1 can be selected according to the size of the actual storage space.
Here, the table lookup function corresponding to the sine and cosine lookup table is:
Figure BDA0002126487620000082
Figure BDA0002126487620000083
wherein, i (n) is real part data, q (n) is imaginary part data, x is a variable to be input (i.e. a waveform phase parameter of a chirp signal to be generated), and if a bit width of the search function output data is required to be L bits, the real part data and the imaginary part data corresponding to the formula (11) should be converted into integers, specifically:
Figure BDA0002126487620000084
Figure BDA0002126487620000085
wherein the content of the first and second substances,
Figure BDA0002126487620000086
the number of division points of an output data in a sine and cosine period, M1 is an unsigned number and the value range is
Figure BDA0002126487620000095
Replacing the real part data and the imaginary part data with signed numbers with L bit width, and obtaining a search function as follows:
Figure BDA0002126487620000091
Figure BDA0002126487620000092
wherein dout _ I is an L-bit signed number corresponding to the real part of the chirp signal, and dout _ Q is an L-bit signed number corresponding to the imaginary part of the chirp signal.
In the embodiment of the present application, a sine and cosine lookup table is generated according to a formula (13) corresponding to the lookup function and a value of M1, and the generated sine and cosine lookup table is stored in a memory for the processor 201 to call. Illustratively, the sine and cosine lookup tables are stored into Read Only Memory (ROM) internal to the FPGA.
Fig. 5 is a flow chart illustrating a chirp signal generation method according to another embodiment of the present application. Referring to fig. 5, the method includes:
step 501, determining a frequency modulation slope quantization parameter kchirp and a time width quantization parameter timeset;
here, the chirp rate quantization parameter kcirp may be generated based on the above formula (1) and the time width quantization parameter timeset may be generated based on the above formula (3) on a processing device; and inputting the chirp rate quantization parameter kcirp and the time width quantization parameter timeset generated by the processing equipment into a chirp signal generation device.
Step 502, generating a time variable n based on the time width quantization parameter;
here, the time variable n takes on a value range of [ -time: time ].
Step 503, calculating kcirp n2；
Calculating kchirp n based on the generated time variable n and the chirp rate quantization parameter kchirp2。
Step 504, calculating a waveform phase parameter;
here, the waveform phase parameter ph0 is kcirp · n2/2M0。
Step 505, real part data and imaginary part data corresponding to the linear frequency modulation signal to be generated are determined.
Based on the waveform phase parameter ph0, searching in a pre-stored sine and cosine lookup table by using a lookup method
Figure BDA0002126487620000093
And
Figure BDA0002126487620000094
respectively corresponding to the values, and outputting L-bit I-path data (corresponding to real part data) and L-bit Q-path data (corresponding to imaginary part data) to a digital-to-analog converterThe converter converts the L-bit I-path data into an I-path analog signal, converts the L-bit Q-path data into a Q-path analog signal, and outputs the I-path analog signal and the Q-path analog signal to realize the output of the linear frequency modulation signal.
According to the chirp signal generation method, the externally input chirp rate quantization parameter and the externally input time width quantization parameter are received, the waveform phase parameter is determined based on the chirp rate quantization parameter and the time width quantization parameter, the real part data and the imaginary part data matched with the waveform phase parameter are searched through the sine-cosine lookup table, then the corresponding chirp signal can be determined, the generation of chirp signals required by a system can be met, the external input can be reduced due to the fact that only the chirp rate quantization parameter and the time width quantization parameter need to be received, the number of control signal connecting lines is reduced on hardware, the system design complexity is favorably reduced, and the method is particularly suitable for being applied to a satellite-borne radar. According to the method, the linear frequency modulation signals corresponding to the time width and the bandwidth can be generated according to the received frequency modulation slope quantization parameters and the received time width quantization parameters, and therefore the design requirements of the system are met.
In order to implement the method according to the embodiment of the present application, an embodiment of the present application further provides a chirp signal generating apparatus, please refer to fig. 6, where the apparatus includes:
a receiving module 601, configured to receive an externally input chirp rate quantization parameter and a time width quantization parameter;
a first determining module 602, configured to determine a waveform phase parameter corresponding to a linear frequency modulation signal to be generated based on the chirp rate quantization parameter and the time width quantization parameter;
a second determining module 603, configured to determine real part data and imaginary part data corresponding to the to-be-generated chirp signal based on the waveform phase parameter and a stored sine and cosine lookup table.
In some embodiments, the first determining module 602 is specifically configured to:
generating a time variable based on the time width quantization parameter;
determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter.
In some embodiments, the chirp generation apparatus further comprises a storage module for receiving and storing a sine and cosine look-up table of an external input.
In this embodiment, the sine and cosine lookup table is generated based on a bit width of real part data or imaginary part data corresponding to the to-be-generated linear frequency modulation signal, where the bit width is determined according to a bit width of an input signal of the digital-to-analog converter.
In this embodiment, the chirp rate quantization parameter is generated based on a chirp rate range and a chirp rate parameter. The time-width quantization parameter is generated based on a pulse time-width range.
In practical applications, the receiving module 601, the first determining module 602, and the second determining module 603 may be implemented by the processor 201 shown in fig. 2. Of course, the processor 201 needs to run a computer program in memory to implement its functions.
The processor 201 is further connected to the digital-to-analog converter 202, the processor 201 determines a waveform phase parameter corresponding to the chirp signal to be generated based on the chirp slope quantization parameter and the time width quantization parameter according to the received chirp slope quantization parameter and the received time width quantization parameter, determines real part data (I-path signal) and imaginary part data (Q-path signal) corresponding to the chirp signal to be generated based on the waveform phase parameter and a stored sine and cosine lookup table, and outputs the I-path signal and the Q-path signal to the digital-to-analog converter 202, and the digital-to-analog converter 202 performs digital-to-analog conversion on the I-path signal and the Q-path signal respectively and outputs an I-path analog signal and a Q-path analog signal, thereby realizing output of the chirp signal.
The memory in the embodiments of the present application is used to store various types of data to support the operation of the chirp generating device. Examples of such data include: any executable program for running on a chirp signal generation apparatus, and a program that implements the chirp signal generation method of the embodiments of the present application may be contained in the executable program.
The chirp signal generation method disclosed in the embodiment of the present application may be applied to the processor 201, or implemented by the processor 201. The processor 201 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the chirp generation method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 201. The Processor 201 may be a general purpose Processor, a Digital Signal Processor (DSP), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. The processor 201 may implement or perform the methods, steps and logic blocks disclosed in the embodiments of the present application. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium located in a memory, and the processor 201 reads information in the memory and completes the steps of the chirp generation method provided in the embodiments of the present application in combination with hardware thereof.
It should be noted that: in the chirp signal generation device provided in the above embodiment, when generating a chirp signal, only the division of the program modules is illustrated, and in practical applications, the processing distribution may be completed by different program modules according to needs, that is, the internal structure of the device may be divided into different program modules to complete all or part of the processing described above. In addition, the chirp signal generation apparatus and the chirp signal generation method provided by the above embodiments belong to the same concept, and specific implementation processes thereof are described in the method embodiments and are not described herein again.
An embodiment of the present application further provides a computer storage medium, which is specifically a computer-readable storage medium, where the computer-readable storage medium may include: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code. The readable storage medium stores a computer program; the computer program is configured to, when executed by a processor, implement a chirp generation method as described in any of the embodiments of the present application.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (7)

1. A method of generating a chirp signal, comprising:
receiving an externally input frequency modulation slope quantization parameter and a time width quantization parameter; the chirp rate quantization parameter is defined as:
Figure FDA0003261255690000011
wherein kchirp is a frequency modulation slope quantization parameter, round () is a rounding integer function, Bw is a bandwidth of a to-be-generated chirp signal, Tw is a time width of the to-be-generated chirp signal, Fs is a sampling rate of the to-be-generated chirp signal, and M is a variable parameter;
wherein, the variable parameter M may be determined according to a chirp rate parameter corresponding to the generated linear chirp signal and a chirp rate maximum value, and includes: assuming kcirp equal to 1, the determined chirp rate parameter is used
Figure FDA0003261255690000012
And
Figure FDA0003261255690000013
determining M; and assume kchirp 2Wk1, maximum value of chirp rate determined by chirp rate range
Figure FDA0003261255690000014
And
Figure FDA0003261255690000015
determining M; wherein WkIs the bit width of kchirp;
the time-width quantization parameter is defined as:
Figure FDA0003261255690000016
wherein, the time is a time width quantization parameter;
determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter, including: generating a time variable based on the time width quantization parameter; determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter;
wherein determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter comprises: taking a time variable n, and multiplying a frequency modulation slope quantization parameter kchirp by n to obtain kchirp n2Then, the multiplication result is reduced by 2M0Multiplying to obtain a waveform phase parameter; wherein, the value range of n is [ -time [ ]]M0 ═ M-M1, M1 is the bit width corresponding to the address range of the sine and cosine lookup table;
and determining real part data and imaginary part data corresponding to the linear frequency modulation signal to be generated based on the waveform phase parameter and a stored sine and cosine lookup table.
2. A method of chirp signal generation as claimed in claim 1, further comprising:
and receiving and storing a sine and cosine lookup table of external input.
3. A method of chirp signal generation as claimed in claim 2,
the sine and cosine lookup table is generated based on bit width of real part data or imaginary part data corresponding to the linear frequency modulation signal to be generated, and the bit width is determined according to the bit width of an input signal of the digital-to-analog converter.
4. A method of chirp signal generation as claimed in claim 1, further comprising:
and D/A conversion is carried out on the real part data and the imaginary part data to obtain a linear frequency modulation signal.
5. A chirp signal generation apparatus, comprising:
the receiving module is used for receiving an externally input frequency modulation slope quantization parameter and a time width quantization parameter; the chirp rate quantization parameter is defined as:
Figure FDA0003261255690000021
wherein kchirp is a frequency modulation slope quantization parameter, round () is a rounding integer function, Bw is a bandwidth of a to-be-generated chirp signal, Tw is a time width of the to-be-generated chirp signal, Fs is a sampling rate of the to-be-generated chirp signal, and M is a variable parameter;
wherein, the variable parameter M may be determined according to a chirp rate parameter corresponding to the generated linear chirp signal and a chirp rate maximum value, and includes: assuming kcirp equal to 1, the determined chirp rate parameter is used
Figure FDA0003261255690000022
And
Figure FDA0003261255690000023
determining M; and assume kchirp 2Wk1, maximum value of chirp rate determined by chirp rate range
Figure FDA0003261255690000024
And
Figure FDA0003261255690000025
determining M; wherein WkIs the bit width of kchirp;
the time-width quantization parameter is defined as:
Figure FDA0003261255690000026
wherein, the time is a time width quantization parameter;
the first determining module is used for determining a waveform phase parameter corresponding to the linear frequency modulation signal to be generated based on the frequency modulation slope quantization parameter and the time width quantization parameter; the method comprises the following steps: generating a time variable based on the time width quantization parameter; determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter; wherein determining the waveform phase parameter based on the time variable and the chirp rate quantization parameter comprises: taking a time variable n, and multiplying a frequency modulation slope quantization parameter kchirp by n to obtain kchirp n2Then, the multiplication result is reduced by 2M0Multiplying to obtain a waveform phase parameter; wherein, the value range of n is [ -time [ ]]M0 ═ M-M1, M1 is the bit width corresponding to the address range of the sine and cosine lookup table;
and the second determining module is used for determining real part data and imaginary part data corresponding to the to-be-generated linear frequency modulation signal based on the waveform phase parameter and a stored sine and cosine lookup table.
6. A chirp signal generation apparatus, comprising:
a memory for storing a computer program;
a processor for implementing a chirp generation method as claimed in any one of claims 1 to 4 when executing a computer program stored in the memory.
7. A computer storage medium, in which a computer program is stored which, when executed by a processor, implements the chirp signal generation method of any one of claims 1 to 4.
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