CN110321302A - A kind of embedded system data memory area management method - Google Patents

A kind of embedded system data memory area management method Download PDF

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Publication number
CN110321302A
CN110321302A CN201910583951.9A CN201910583951A CN110321302A CN 110321302 A CN110321302 A CN 110321302A CN 201910583951 A CN201910583951 A CN 201910583951A CN 110321302 A CN110321302 A CN 110321302A
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access
data
embedded system
memory block
processing
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CN110321302B (en
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李立
范振伟
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ZHAOXUN HENGDA MICROELECTRONICS TECHNOLOGY (BEIJING) Co Ltd
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ZHAOXUN HENGDA MICROELECTRONICS TECHNOLOGY (BEIJING) Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1408Protection against unauthorised use of memory or access to memory by using cryptography
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

The present embodiments relate to a kind of embedded system data memory area management methods, which is characterized in that the described method includes: obtaining the first access address and the first access mode, query logic address file obtains memory block type;The first data access processing is carried out when memory block type is scrambling code memory block;The second data access processing is carried out when memory block type is non-scrambled memory block;The processing of third data access is carried out when memory block type is electric parameter memory block;The processing of the 4th data access is carried out when memory block type is calculator memory block;The processing of the 5th data access is carried out when memory block type is system parameter area;The processing of the 6th data access is carried out when memory block type is to remain development area;The processing of the 7th data access is carried out when memory block type is hidden area.According to the present invention can data memory area do multi-region and divide and distribute memory block type, access mode is customized according to memory block type, to realize the function of safety protection of data memory area.

Description

A kind of embedded system data memory area management method
Technical field
The present invention relates to embedded system technology field more particularly to a kind of embedded system data storage area management sides Method.
Background technique
With extensive use of the embedded device in industry control, Internet of Things, there are many unattended application scenarios: Such as shared device, such as internet of things endpoint equipment etc..Management of the current conventional embedded device to its data, commonly Mode is exactly to be realized by setting equipment user's permission to data field access control in operating system level.Such way pair Memory block storage data itself load bottom read-write safeguard function, to pass through physical route direct access to storage devices The data of (device or chip) are stolen or rewrite method is not protect effectiveness.For unattended equipment, Data bottom access preventive means is urgently promoted.
Summary of the invention
The object of the present invention is in view of the above technical defects, a kind of embedded system data memory area management method is provided, According to the method for the present invention can data storage area to embedded system according to different purposes carry out the division of storage class class: it is readable Scrambling memory block, read-write unscrambled memory block, the read-write electric parameter memory block, read-write calculator storage write Area, read-only system parameter area, it is read-only remain development area, read-only hidden area, provided not for different memory block types Same access control scheme.Thus, it is possible to which sensitive data is stored in scrambling memory block, nonsensitive data is stored in and is deposited in plain text The unscrambled memory block of storage area, electric parameter memory block, calculator memory block etc., non-rewritable system parameter is stored in The data of more high security level can also be placed in read-only hidden area, and hide mark by setting by read-only system parameter area Knowledge be read the region can not.
To achieve the above object, the present invention provides a kind of embedded system data memory area management methods, comprising:
Embedded system obtains the first access address and the first access mode, according to the first access address query logic Address file obtains memory block type;
When the memory block type is scrambling code memory block, the embedded system is right according to first access mode First access address carries out the first data access processing;
When the memory block type is non-scrambled memory block, the embedded system according to first access mode, Second data access processing is carried out to first access address;
When the memory block type is electric parameter memory block, the embedded system is according to first access side Formula carries out the processing of third data access to first access address;
When the memory block type is calculator memory block, the embedded system according to first access mode, The processing of 4th data access is carried out to first access address;
When the memory block type is system parameter area, the embedded system is right according to first access mode First access address carries out the processing of the 5th data access;
When the memory block type is to remain development area, the embedded system is right according to first access mode First access address carries out the processing of the 6th data access;
When the memory block type is hidden area, the embedded system is according to first access mode, to described First access address carries out the processing of the 7th data access.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of one data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address Reading processing is descrambled according to carry out first, is generated first and is read data;
When the value of first access mode is WriteMode, the embedded system obtains the first write-in data, according to The first write-in data carry out the first scrambling to first access address and write processing.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of two data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to the first plaintext reading processing is carried out, generates second and read data;
When the value of first access mode is WriteMode, the embedded system obtains the second write-in data, according to The second write-in data carry out the first plaintext to first access address and write processing.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of three data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to second plaintext reading processing is carried out, generates third and read data;
When the value of first access mode is WriteMode, the embedded system obtains third and data is written, according to The third write-in data carry out second plaintext to first access address and write processing.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of four data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to third plaintext reading processing is carried out, generates the 4th and read data;
When the value of first access mode is WriteMode, the embedded system obtains the 4th write-in data, according to The 4th write-in data carry out third to first access address and write processing in plain text.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of five data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to the 4th plaintext reading processing is carried out, generates the 5th and read data.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of six data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to the 5th plaintext reading processing is carried out, generates the 6th and read data.
Further, the embedded system is according to first access mode, carries out the to first access address The processing of seven data access, specifically includes:
When the value of first access mode is read mode, number of the embedded system to first access address According to the 6th plaintext reading processing is carried out, generates the 7th and read data.
Preferably, the embedded system carries out the 6th plaintext reading processing to the data of first access address, generates 7th reads data, specifically includes:
The embedded system obtains the first hidden identification;
When the value of first hidden identification is non-concealed data field, the embedded system is to first access The data of location carry out the 6th plaintext reading processing, generate the described 7th and read data;
When the value of first hidden identification is hidden data area, the embedded system exits the described 6th and reads in plain text Processing, and return to error message " operational attribute is not present ".
Further, the method also includes:
It is described when the value that the value of the memory block type is system parameter area and first access mode is WriteMode Embedded system exits data access processing, and returns to error message " operational attribute mistake ";
It is described when the value of the memory block type is that remain the value of development area and first access mode be WriteMode Embedded system exits data access processing, and returns to error message " operational attribute mistake ";
When the value that the value of the memory block type is hidden area and first access mode is WriteMode, the insertion Formula system exits data access processing, and returns to error message " operational attribute mistake ".
A kind of embedded system data memory area management method provided in an embodiment of the present invention, passes through logical address file root Data storage area is divided into scrambling code memory block, non-scrambled memory block, electric parameter memory block, calculator storage according to address section Area, system parameter area remain development area, hidden area.To scrambling code memory block, system provides scrambling read-write mechanism, guarantees that data exist The memory block is the ciphertext after scrambled algorithm process when storing, and needs to carry out scramble process to the direct data that read at the time of reading Original text could be obtained;To non-scrambled memory block, electric parameter memory block, calculator memory block, system provides read-write mechanism in plain text, Data are also stored in this three memory blocks with clear-text way;To system parameter area, development area is remained, system is regarded as only Reading area, provides clear data read access mode, and data are stored in this two memory blocks with clear-text way;To hidden area, system Hidden area is regarded as, system forbids any access to its inside when function is activated when hidden area, when hidden area function When being deactivated, system provides clear data read access mode, and data are stored in the memory block with clear-text way.
Detailed description of the invention
Fig. 1 is embedded system memory block provided in an embodiment of the present invention schematic diagram;
Fig. 2 is logical address file schematic diagram provided in an embodiment of the present invention;
Fig. 3 is a kind of work signal for embedded system data memory area management method that the embodiment of the present invention one provides Figure.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into It is described in detail to one step, it is clear that the described embodiments are only some of the embodiments of the present invention, rather than whole implementation Example.Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts All other embodiment, shall fall within the protection scope of the present invention.
Fig. 1 is embedded system memory block provided in an embodiment of the present invention schematic diagram, as shown in Figure 1, the embodiment of the present invention Embedded system data memory block is divided into 7 seed types, type is respectively with purposes: scrambling code memory block, it is non-for storing Shared data or sensitive data need to handle by the data Reinforced turf of special algorithm, data to the reading and writing data of the memory block Storage is also ciphertext after scrambling;Non-scrambled memory block, for storing shareable data or nonsensitive data, to the number of the memory block According to read-write by reading and writing in plain text, data storage is also clear-text way;Electric parameter memory block, for storing embedded device Specific electric parameter passes through read-write in plain text to the reading and writing data of the memory block;Calculator memory block, for storing insertion Formula equipment various counting device parameter value passes through read-write in plain text to the reading and writing data of the memory block.System parameter area, for depositing Key parameter inside embedded system is stored up, the data access to the memory block is read-only mode, and data are stored with clear-text way;It stays To development area, for using in case storing after embedded system expands parameter, the data access to the memory block is read-only mode, Data are stored with clear-text way;Hidden area, when the value of hidden identification in system is to hide, system is inaccessible to the data field, When the value of hidden identification in system is non-concealed, system is read-only mode to Data Area data access, and data are deposited with clear-text way Storage.
It include 7 records in logical address file.A kind of memory block type described in every record corresponding diagram 1.Every note Record is made of 4 groups of parameters: address section parameter, memory block type parameter, read operation parameter, write operation parameter, in which: address area Between parameter include initial address and end address, this nominal records the range of physical addresses of corresponding access section;Memory block class The value of shape parameter includes 7 class shown in FIG. 1 memory block;Read operation parameter includes that three kinds of state values (read, read, forbid in plain text by descrambling It reads);Write operation parameter includes three kinds of state values (scrambling is write, writes in plain text, forbidding writing).
Fig. 2 is logical address file schematic diagram provided in an embodiment of the present invention, from the foregoing, it will be observed that Fig. 2 logical address file Record 1, the first initial address are deposited to the memory block for (including starting and end address itself) between the first end address for scrambling code Storage area, the read-write mode of the memory block are that scrambling is write, and descrambling is read;Record 2, the second initial address is between the second end address The memory block of (including starting and end address itself) is non-scrambled memory block, and the read-write mode of the memory block is to write in plain text, bright Text is read;Record 3, third initial address to the memory block for (including starting and end address itself) between third end address is electricity Gas parameter memory block, the read-write mode of the memory block are to write in plain text, are read in plain text;Record 4, fourth beginning address terminate ground to the 4th The memory block for (including starting and end address itself) between location is calculator memory block, and the read-write mode of the memory block is in plain text It writes, reads in plain text.Record 5, the 5th initial address to the storage for (including starting and end address itself) between the 5th end address Area is system parameter area, and the read-write mode of the memory block is read-only mode;Record 6, the 6th initial address to the 6th end address Between (comprising starting with end address itself) memory block be remain development area, the read-write mode of the memory block is read-only side Formula;Record 7, the 7th initial address to the memory block for (including starting and end address itself) between the 7th end address is hiding Area, when the value of the hidden identification of the memory block is to hide, the memory block is inaccessible, when the value of the hidden identification of the memory block The read-write mode of the memory block is read-only mode when being non-concealed.
The embodiment of the present invention one, if Fig. 3 is a kind of embedded system data memory block pipe that the embodiment of the present invention one provides Shown in the operation schematic diagram of reason method, method the following steps are included:
Step 11, embedded system obtains the first access address and the first access mode, is inquired according to the first access address Logical address file obtains memory block type,
Specifically include: the value of step A1, initialization the first blotter index are 0, initialize the first scratchpad area (SPA) class The value of type is sky, and the value of initialization the first blotter sum is 7;
Step A2 extracts the first blotter index record byte according to logical address file, generates first and temporarily remembers Record;
Step A3 extracts the first interim initial address byte and generates the first interim initial address according to the first blotter, It extracts the first interim end address byte and generates the first interim end address;
Step A4, judges whether the first access address is greater than or equal to the first interim initial address, if the first access Location is greater than or equal to the first interim initial address, goes to step A5;If the first access address less than the first interim initial address, Then illustrate that the access address is not belonging to the memory block of this record identification, goes to step A7;
Step A5, judges whether the first access address is less than or equal to the first interim end address, if the first access Location is less than or equal to the first interim end address, then illustrates that the access address belongs to the memory block of this record identification, go to step Rapid A6;If the first access address is greater than the first interim end address, illustrate that the access address is not belonging to this record identification Memory block, go to step A7;
Step A6 extracts the first scratchpad area (SPA) type-byte and generates the first scratchpad area (SPA) according to the first blotter Type goes to step A9;
The value that first blotter indexes is added 1 by step A7;
Step A8, judges whether the value of the first blotter index is less than or equal to the first blotter sum, if the The value of one blotter index is less than or equal to the first blotter sum, goes to step A2;If the first blotter indexes Value be greater than the first blotter sum, go to step A9;
Step A9 extracts first all bytes of scratchpad area (SPA) type according to the first scratchpad area (SPA) type, generates storage Area's type;
Step A10, when memory block type be scrambling code memory block, go to step 121;If memory block type is non-scrambled deposits Storage area goes to step 122;If memory block type is electric parameter memory block, step 123 is gone to;If memory block type is Calculator memory block, goes to step 124;If memory block type is system parameter area, step 125 is gone to;If memory block class Type is to remain development area, goes to step 126;If memory block type is hidden area, step 127 is gone to;If memory block type Be not it is any in above-mentioned 7 seed type, go to step 410.
Step 121, according to the first access mode, the first data access processing is carried out to the first access address,
It specifically includes: step B1, when the first access mode is read mode, data of the embedded system to the first access address The first descrambling reading processing is carried out, first is generated and reads data, Descrambling Algorithms at this are general to be had: is byte exclusive or algorithm, symmetrical Algorithm, asymmetric signature algorithm etc., go to step 130;
Step B2, if the value of the first access mode is WriteMode, embedded system obtains the first write-in data, according to the One write-in data carry out the first scrambling to the first access address and write processing, and the scrambling algorithms at this are general to be had: byte exclusive or is calculated Method, symmetry algorithm, asymmetric signature algorithm etc..Go to step 130;
Step B3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 122, according to the first access mode, the second data access processing is carried out to the first access address,
Specifically include: step C1, when the first access mode is read mode, embedded system carries out the to the first access address One plaintext reading processing generates second and reads data, goes to step 130;
Step C2, when the value of the first access mode is WriteMode, embedded system obtains the second write-in data, according to second Write-in data carry out the first plaintext to the first access address and write processing, go to step 130;
Step C3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 123, according to the first access mode, the processing of third data access is carried out to the first access address,
Specifically include: step D1, when the first access mode is read mode, embedded system carries out the to the first access address Two plaintext readings processing generates third and reads data, goes to step 130;
Step D2, when the value of the first access mode is WriteMode, embedded system obtains third and data is written, according to third Write-in data carry out second plaintext to the first access address and write processing, go to step 130;
Step D3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 124, according to the first access mode, the processing of the 4th data access is carried out to the first access address,
Specifically include: step E1, when the first access mode is read mode, embedded system carries out the to the first access address Three plaintext readings processing generates the 4th and reads data, goes to step 130;
Step E2, when the value of the first access mode is WriteMode, embedded system obtains the 4th write-in data, according to the 4th Write-in data carry out third to the first access address and write processing in plain text, go to step 130;
Step E3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 125, according to the first access mode, the processing of the 5th data access is carried out to the first access address,
Specifically include: step F1, when the first access mode is read mode, embedded system carries out the to the first access address Four plaintext readings processing generates the 5th and reads data, goes to step 130;
Step F2, when the first access mode value be WriteMode, go to step 420;
Step F3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 126, according to the first access mode, the processing of the 6th data access is carried out to the first access address,
Specifically include: step G1, when the first access mode is read mode, embedded system carries out the to the first access address Five plaintext readings processing generates the 6th and reads data, goes to step 130;
Step G2, when the first access mode value be WriteMode, go to step 420;
Step G3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 127, according to the first access mode, the processing of the 7th data access is carried out to the first access address,
It specifically includes: step H1, when the value of the first access mode is read mode, according to the first access mode, to the first visit Ask that address carries out the processing of the 7th data access,
It specifically include: step J11, embedded system obtains the first hidden identification;
Step J12 judges whether the value of the first hidden identification is hidden data area, if the value of the first hidden identification is hidden Data field is hidden, step 420 is gone to;If the value of the first hidden identification is not hidden data area, step J13 is gone to;
Step carries out the 6th plaintext reading processing to the first access address with regard to J13, embedded system, generates the 7th and reads number According to going to step 130;
Step H2, when the first access mode value be WriteMode, go to step 420;
Step H3 goes to step 410 when the first access mode is neither read mode is also not WriteMode.
Step 130, implementing result of the embedded system to host computer returned data access process.
Step 410, embedded system exits data access processing, and returns to error message " operational attribute is not present ".
Step 420, embedded system exits data access processing, and returns to error message " operational attribute mistake ".
The embodiment of the present invention two, when storage section belongs to scrambling code memory block where access address, method includes following step It is rapid:
Step 91, embedded system obtains the first access address and the first access mode.
Step 92, according to the first access address, embedded system query logic address file obtains the value of memory block type For scrambling code memory block.
Step 93, judge whether the first access mode is read mode, if the value of the first access mode is read mode, go to Step 94;If the value of the first access mode is not read mode, step 95 is gone to.
Step 94, embedded system carries out the first descrambling reading processing to the data of the first access address, generates first and reads Data simultaneously go to step 100,
Specifically include: step L1, embedded system extracts first from the first access address and temporarily reads data, and obtains and add Algorithm mark is disturbed, scrambling algorithms mark herein is system parameter of the system to identify scrambling code memory block scrambling code generating algorithm;
Step L2 obtains the first interim scrambling code, temporarily disturbs according to first when scrambling algorithms are identified as byte exclusive or algorithm Code is carried out with or is calculated to the first interim data that read, and is generated first and is read data, goes to step 100;
Step L3 obtains the first decruption key, according to the first decruption key pair when scrambling algorithms are identified as symmetry algorithm Calculating is decrypted in the first interim data that read, and generates first and reads data, goes to step 100;
Step L4 obtains the first sign test public key, according to the first sign test when scrambling algorithms are identified as asymmetric signature algorithm Public key carries out sign test calculating to the first interim data that read, and generates first and reads data, goes to step 100.
Step 95, judge whether the first access mode is WriteMode, if the value of the first access mode is WriteMode, go to Step 96;If the value of the first access mode is not WriteMode, step 210 is gone to.
Step 96, embedded system obtains the first write-in data, is carried out according to the first write-in data to the first access address First scrambling, which is write, handles and goes to step 100,
Specifically include: step K1 obtains scrambling algorithms mark, and scrambling algorithms mark herein is system to identify scrambling code The system parameter of memory block scrambling code generating algorithm;
Step K2 obtains the first interim scrambling code, temporarily disturbs according to first when scrambling algorithms are identified as byte exclusive or algorithm Code, which is carried out with or calculated to the first write-in data, generates the first scrambling write-in data, writes in the first scrambling of the first access address write-in Enter data, goes to step 100;
Step K3 obtains the first decruption key, according to the first decruption key pair when scrambling algorithms are identified as symmetry algorithm First write-in data carry out computations and generate the first encryption write-in data, in the first access address write-in the first encryption write-in number According to going to step 100;
Step K4 obtains the first signature private key when scrambling algorithms are identified as asymmetric signature algorithm, according to the first signature Private key carries out signature calculation to the first write-in data and generates the first signature write-in data, in the first signature of the first access address write-in Data are written, go to step 100.
Step 100, implementing result of the embedded system to host computer returned data access process.
Step 210, embedded system exits data access processing, and returns to error message " operational attribute is not present ".
A kind of embedded system data memory area management method provided in an embodiment of the present invention, passes through logical address file root Data storage area is divided into scrambling code memory block, non-scrambled memory block, electric parameter memory block, calculator storage according to address section Area, system parameter area remain development area, hidden area.To scrambling code memory block, system provides scrambling read-write mechanism, guarantees that data exist The memory block is the ciphertext after scrambled algorithm process when storing, and needs to carry out scramble process to the direct data that read at the time of reading Original text could be obtained;To non-scrambled memory block, electric parameter memory block, calculator memory block, system provides read-write mechanism in plain text, Data are also stored in this three memory blocks with clear-text way;To system parameter area, development area is remained, system is regarded as only Reading area, provides clear data read access mode, and data are stored in this two memory blocks with clear-text way;To hidden area, system Hidden area is regarded as, system forbids any access to its inside when function is activated when hidden area, when hidden area function When being deactivated, system provides clear data read access mode, and data are stored in the memory block with clear-text way.According to the present invention Method can do majority to the data storage area of embedded system and divide according to application area, provide for different application areas different Access control scheme.Thus, it is possible to which sensitive data is stored in scrambling memory block, nonsensitive data is stored in stored in clear Non-rewritable system parameter is stored in readable storage area by area, number can also be arranged by the way that the hidden identification of memory block is arranged According to hidden area.
Professional should further appreciate that, described in conjunction with the examples disclosed in the embodiments of the present disclosure Unit and algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, hard in order to clearly demonstrate The interchangeability of part and software generally describes each exemplary composition and step according to function in the above description. These functions are implemented in hardware or software actually, the specific application and design constraint depending on technical solution. Professional technician can use different methods to achieve the described function each specific application, but this realization It should not be considered as beyond the scope of the present invention.
The step of method described in conjunction with the examples disclosed in this document or algorithm, can be executed with hardware, processor The combination of software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field In any other form of storage medium well known to interior.
Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include Within protection scope of the present invention.

Claims (10)

1. a kind of embedded system data memory area management method, which is characterized in that the method, comprising:
Embedded system obtains the first access address and the first access mode, according to the first access address query logic address File obtains memory block type;
When the memory block type is scrambling code memory block, the embedded system is according to first access mode, to described First access address carries out the first data access processing;
When the memory block type is non-scrambled memory block, the embedded system is according to first access mode, to institute It states the first access address and carries out the second data access processing;
When the memory block type is electric parameter memory block, the embedded system is right according to first access mode First access address carries out the processing of third data access;
When the memory block type is calculator memory block, the embedded system is according to first access mode, to institute It states the first access address and carries out the processing of the 4th data access;
When the memory block type is system parameter area, the embedded system is according to first access mode, to described First access address carries out the processing of the 5th data access;
When the memory block type is to remain development area, the embedded system is according to first access mode, to described First access address carries out the processing of the 6th data access;
When the memory block type is hidden area, the embedded system is according to first access mode, to described first Access address carries out the processing of the 7th data access.
2. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the first data access processing, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into Row first descrambles reading processing, generates first and reads data;
When the value of first access mode is WriteMode, the embedded system obtains the first write-in data, according to described First write-in data carry out the first scrambling to first access address and write processing.
3. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the second data access processing, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into Reading is handled row first in plain text, is generated second and is read data;
When the value of first access mode is WriteMode, the embedded system obtains the second write-in data, according to described Second write-in data carry out the first plaintext to first access address and write processing.
4. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the processing of third data access, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into Row second plaintext reading processing generates third and reads data;
When the value of first access mode is WriteMode, the embedded system obtains third and data is written, according to described Third is written data and writes processing to first access address progress second plaintext.
5. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the processing of the 4th data access, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into Row third plaintext reading processing generates the 4th and reads data;
When the value of first access mode is WriteMode, the embedded system obtains the 4th write-in data, according to described 4th write-in data carry out third to first access address and write processing in plain text.
6. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the processing of the 5th data access, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into The 4th plaintext reading of row processing generates the 5th and reads data.
7. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the processing of the 6th data access, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into The 5th plaintext reading of row processing generates the 6th and reads data.
8. method according to claim 1, which is characterized in that the embedded system is right according to first access mode First access address carries out the processing of the 7th data access, specifically includes:
When the value of first access mode is read mode, the embedded system to the data of first access address into The 6th plaintext reading of row processing generates the 7th and reads data.
9. method according to claim 8, which is characterized in that data of the embedded system to first access address The 6th plaintext reading processing is carried out, the 7th is generated and reads data, specifically include:
The embedded system obtains the first hidden identification;
When the value of first hidden identification is non-concealed data field, the embedded system is to first access address Data carry out the 6th plaintext reading processing, generate the described 7th and read data;
When the value of first hidden identification is hidden data area, the embedded system is exited at the 6th plaintext reading Reason, and return to error message " operational attribute is not present ".
10. method according to claim 1, which is characterized in that the method also includes:
When the value that the value of the memory block type is system parameter area and first access mode is WriteMode, the insertion Formula system exits data access processing, and returns to error message " operational attribute mistake ";
When the value of the memory block type is that remain the value of development area and first access mode be WriteMode, the insertion Formula system exits data access processing, and returns to error message " operational attribute mistake ";
When the value that the value of the memory block type is hidden area and first access mode is WriteMode, the embedded system System exits data access processing, and returns to error message " operational attribute mistake ".
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