CN110111739B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN110111739B CN110111739B CN201910374731.5A CN201910374731A CN110111739B CN 110111739 B CN110111739 B CN 110111739B CN 201910374731 A CN201910374731 A CN 201910374731A CN 110111739 B CN110111739 B CN 110111739B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The application provides a display panel and display device, display panel includes: a substrate on which a display region and a non-display region are disposed; a cathode disposed around the display region and located at the non-display region; the driving chips are uniformly arranged in the non-display area and positioned outside the cathode; each driving chip is provided with a driving signal pin area and bypass pin areas positioned at two sides of the driving signal pin area; the driving signal pin area and the bypass pin area are both provided with a plurality of cathode pins, and the cathode pins are both electrically connected with the cathode. This application is through setting up the negative pole pin in each pin area of driver chip respectively to make the input of negative pole line signal distribute around the display area uniformly, reduce the input path of negative pole line, and then reduce the resistance of negative pole line, improve and show the homogeneity.
Description
Technical Field
The present disclosure relates to display technologies, and particularly to a display panel and a display device.
Background
Since the AMOLED is a voltage-programmed current-driven type display, there is a current in a path between VDD and the T1 and 0LED, and the resistance in the path seriously affects the voltage distribution in the path, and thus the current distribution is not uniform, which causes the brightness non-uniformity to increase, and the display quality to decrease. In particular, in a top emission display, resistance values of different regions in the display are different due to a large cathode resistance value, and further, voltage values of the cathodes of the 0 LEDs are different, and a schematic circuit diagram in a pixel is as follows, where Rs is different in the different regions, and a cross voltage across the 0LED is Voled, Vs ═ I × Rs + Voled is also different, Vg ═ Vdata is different between different pixels in the display due to the same Data voltage, and I ═ K (Vdata + Vth' -I × Rs-Voled)/2 is different, so that current distribution of the display is not uniform, and luminance display is not uniform. For the resistor Rd on the VDD line, the current distribution of the display can not be influenced by increasing the voltage of VDD to a value which satisfies that the driving tube is in a saturation region.
Each driving chip comprises the following contents that a common bypass pin can supply electric signals including VDD and VSS signals, the driving pin can be contacted with an IC and is used for outputting a grid driving signal or a source driving signal, an input port of the VSS signal is only in a specific area and concentrated, a VSS input path is increased, a VSS resistance value is increased, the input ports are concentrated, current concentration is caused, and a high-temperature area is formed, so that the quality of a display is influenced.
Therefore, the prior art has defects and needs to be improved urgently.
Disclosure of Invention
The application provides a display panel and a display device, which can reduce the resistance of a cathode line and improve the display uniformity.
The application provides a display panel, including:
a substrate on which a display region and a non-display region are disposed;
a cathode disposed around the display region and located at the non-display region;
the driving chips are uniformly arranged in the non-display area and positioned outside the cathode; each driving chip is provided with a driving signal pin area and bypass pin areas positioned at two sides of the driving signal pin area;
the driving signal pin area and the bypass pin area are both provided with a plurality of cathode pins, and the cathode pins are both electrically connected with the cathode.
In the display panel of the present application, each of the bypass pin regions is further provided with a plurality of VDD power pins, and the plurality of VDD power pins and the cathode pins of the bypass pin region are alternately distributed at intervals.
In the display panel described in the present application, the bypass pin area is further provided with a GOA signal pin or a WOA signal pin.
In the display panel of the present application, the driving signal pin region is provided with a source driving pin for outputting a source signal provided by the driving chip and a gate driving pin for outputting a gate driving signal.
In the display panel of the present application, the cathode pin is electrically connected to the cathode through a fanout line.
In the display panel, the non-display area is further provided with a flexible circuit board, and the flexible circuit board is electrically connected with the cathode through a cathode line.
In the display panel, the plurality of driving chips are uniformly arranged in the non-display area on one side of the display area at intervals, and the flexible circuit board is arranged in the non-display area on the other opposite side of the display area.
In the display panel, the number of the flexible circuit boards is two, and the two flexible circuit boards are arranged in the non-display area at intervals.
In the display panel of the present application, the cathode is in a rectangular frame shape and surrounds the display region, and distances between each side of the cathode and the display region are the same.
A display device comprising the display panel of any one of the above.
This application is through setting up the negative pole pin in each pin area of driver chip respectively to make the input of negative pole line signal distribute around the display area uniformly, reduce the input path of negative pole line, and then reduce the resistance of negative pole line, improve and show the homogeneity.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a block diagram of a display panel in some embodiments of the present application.
Fig. 2 is a pin layout diagram of a driver chip in some embodiments of the present application.
FIG. 3 is another block diagram of a display panel in some embodiments of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
Referring to fig. 1 and fig. 2, fig. 1 is a structural diagram of a display panel in some embodiments of the present application. Fig. 2 is a pin layout diagram of a driver chip in some embodiments of the present application.
In some embodiments, the display panel includes: a substrate 10, a cathode 20, and a plurality of driving chips 30. Wherein, a display region 11 and a non-display region 12 are arranged on the substrate 10; the substrate 10 is an array substrate, the display region 11 is rectangular, and the non-display region 12 is rectangular and surrounds the display region 11. Wherein the cathode 20 is disposed around the display region 11 and located in the non-display region 12. Wherein, the plurality of driving chips 30 are uniformly disposed in the non-display region 12 and outside the cathode 20; each of the driving chips 30 is provided with a driving signal pin region 31 and bypass pin regions 32 located at both sides of the driving signal pin region 31. The driving signal pin area 31 and the bypass pin area 32 are both provided with a plurality of cathode pins, and the cathode pins are electrically connected with the cathode 20 through cathode lines 40.
This application is through setting up the negative pole pin in each pin area of driver chip respectively to make the input of negative pole line signal distribute around the display area uniformly, reduce the input path of negative pole line, can reduce the resistance of negative pole line, improve and show the homogeneity.
Specifically, in some embodiments, the bypass pin area 32 is further provided with a plurality of VDD power pins, and the plurality of VDD power pins are alternately spaced from the cathode pin of the bypass pin area 32. Of course, the bypass pin area 32 is also provided with a GOA signal pin or a WOA signal pin.
In some embodiments, the driving signal pin region 31 is provided with a source driving pin for outputting a source signal provided by the driving chip 30 and a gate driving pin or for outputting a gate driving signal. When the driver chip is a source driver chip, the driving signal pin area 31 includes a plurality of source driver pins. When the driver chip is a gate driver chip, the driving signal pin area 31 includes a plurality of gate driving pins. When the driver chip is a source integrated driver chip, the driving signal pin area 31 includes a plurality of source driving pins and gate driving pins.
In some embodiments, the cathode line is a fanout line.
Referring to fig. 3, in some embodiments, the non-display region 12 of the substrate 10 is further provided with a flexible circuit board 50, and the flexible circuit board 50 is electrically connected to the cathode 20 through a cathode line 40.
The plurality of driving chips 30 are disposed at regular intervals in the non-display region 12 on one side of the display region 11, and the flexible circuit board 50 is disposed in the non-display region 12 on the other opposite side of the display region 11. The number of the flexible circuit boards 50 is two, and the two flexible circuit boards are disposed at the non-display area 12 at intervals.
In some embodiments, the cathode 20 has a rectangular frame shape and surrounds the display region 11, and the distance between each side of the cathode 20 and the display region 11 is the same.
To sum up, this application is through setting up the negative pole pin respectively in each pin region of driver chip to make the input of negative pole line signal distribute around the display area uniformly, reduce the input path of negative pole line, can reduce the resistance of negative pole line, improve and show the homogeneity.
The application also provides a display device, which is an AMOLED display device, and the display device adopts the display panel in any of the above embodiments. According to the display device, the cathode pins are respectively arranged in each pin area of the driving chip, so that the input ends of cathode line signals are uniformly distributed around the display area, the input path of the cathode lines is reduced, the resistance of the cathode lines is reduced, and the display uniformity is improved.
In summary, although the present application has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, so that the scope of the present application shall be determined by the appended claims.
Claims (9)
1. A display panel, comprising:
a substrate on which a display region and a non-display region are disposed;
a cathode disposed around the display region and located at the non-display region;
the driving chips are uniformly arranged in the non-display area and positioned outside the cathode; each driving chip is provided with a driving signal pin area and bypass pin areas positioned at two sides of the driving signal pin area;
the driving signal pin area and the bypass pin area are both provided with a plurality of cathode pins, and the cathode pins are electrically connected with the cathodes through cathode lines;
each bypass pin area is also provided with a plurality of VDD power supply pins, and the VDD power supply pins and the cathode pins of the bypass pin area are alternately distributed at intervals.
2. The display panel according to claim 1, wherein the bypass pin area is further provided with a GOA signal pin or a WOA signal pin.
3. The display panel according to claim 1, wherein the driving signal pin region is provided with a source driving pin for outputting a source signal provided by the driving chip and a gate driving pin or a gate driving pin for outputting a gate driving signal.
4. The display panel of claim 1, wherein the cathode lead is electrically connected to the cathode through a fanout line.
5. The display panel according to claim 1, wherein the non-display region is further provided with a flexible circuit board electrically connected to the cathode through a cathode line.
6. The display panel according to claim 5, wherein the plurality of driving chips are disposed at regular intervals in a non-display region on one side of the display region, and the flexible circuit board is disposed in a non-display region on the other opposite side of the display region.
7. The display panel according to claim 6, wherein the number of the flexible circuit boards is two, and the two flexible circuit boards are disposed at intervals in the non-display region.
8. The display panel according to claim 1, wherein the cathode has a rectangular frame shape and surrounds the display region, and wherein each side of the cathode is spaced apart from the display region by the same distance.
9. A display device characterized by comprising the display panel according to any one of claims 1 to 8.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910374731.5A CN110111739B (en) | 2019-05-07 | 2019-05-07 | Display panel and display device |
| PCT/CN2019/104265 WO2020224132A1 (en) | 2019-05-07 | 2019-09-04 | Display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910374731.5A CN110111739B (en) | 2019-05-07 | 2019-05-07 | Display panel and display device |
Publications (2)
| Publication Number | Publication Date |
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| CN110111739A CN110111739A (en) | 2019-08-09 |
| CN110111739B true CN110111739B (en) | 2021-01-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201910374731.5A Active CN110111739B (en) | 2019-05-07 | 2019-05-07 | Display panel and display device |
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| Country | Link |
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| CN (1) | CN110111739B (en) |
| WO (1) | WO2020224132A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110111739B (en) * | 2019-05-07 | 2021-01-01 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1517750A (en) * | 2003-01-21 | 2004-08-04 | 株式会社日立显示器 | Display device and its manufacturing method |
| WO2012031362A1 (en) * | 2010-09-07 | 2012-03-15 | Corporation De L ' Ecole Polytechnique De Montreal | Methods, apparatus and system to support large-scale micro- systems including embedded and distributed power supply, thermal regulation, multi-distributed-sensors and electrical signal propagation |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001351929A (en) * | 2000-06-09 | 2001-12-21 | Hitachi Ltd | Semiconductor device and its manufacturing method |
| JP2004342395A (en) * | 2003-05-14 | 2004-12-02 | Shoka Kagi Kofun Yugenkoshi | Organic light-emitting diode display device |
| KR100739300B1 (en) * | 2006-07-31 | 2007-07-12 | 삼성에스디아이 주식회사 | Organic light emitting display device |
| KR101484681B1 (en) * | 2012-11-01 | 2015-01-20 | 엘지디스플레이 주식회사 | Organic light emitting display device |
| US10216302B2 (en) * | 2014-07-22 | 2019-02-26 | Synaptics Incorporated | Routing for an integrated display and input sensing device |
| KR102245304B1 (en) * | 2014-10-28 | 2021-04-27 | 엘지디스플레이 주식회사 | Display device with power supply in cover type |
| CN105742312B (en) * | 2014-12-31 | 2019-02-12 | 乐金显示有限公司 | Organic light-emitting display device |
| KR20180079024A (en) * | 2016-12-30 | 2018-07-10 | 엘지디스플레이 주식회사 | Organic light emitting display device |
| CN107316612B (en) * | 2017-07-11 | 2019-08-30 | 深圳市华星光电半导体显示技术有限公司 | A kind of OLED display panel and OLED display |
| CN108963095B (en) * | 2018-07-23 | 2021-06-01 | 北京蜃景光电科技有限公司 | OLED device packaging method, OLED packaging device and display device |
| CN109638051A (en) * | 2018-12-14 | 2019-04-16 | 武汉华星光电半导体显示技术有限公司 | A kind of production method and oled panel of oled panel |
| CN110111739B (en) * | 2019-05-07 | 2021-01-01 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
-
2019
- 2019-05-07 CN CN201910374731.5A patent/CN110111739B/en active Active
- 2019-09-04 WO PCT/CN2019/104265 patent/WO2020224132A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1517750A (en) * | 2003-01-21 | 2004-08-04 | 株式会社日立显示器 | Display device and its manufacturing method |
| WO2012031362A1 (en) * | 2010-09-07 | 2012-03-15 | Corporation De L ' Ecole Polytechnique De Montreal | Methods, apparatus and system to support large-scale micro- systems including embedded and distributed power supply, thermal regulation, multi-distributed-sensors and electrical signal propagation |
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| Publication number | Publication date |
|---|---|
| CN110111739A (en) | 2019-08-09 |
| WO2020224132A1 (en) | 2020-11-12 |
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