CN110034843B - Channel coding method and coding device - Google Patents

Channel coding method and coding device Download PDF

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CN110034843B
CN110034843B CN201810031522.6A CN201810031522A CN110034843B CN 110034843 B CN110034843 B CN 110034843B CN 201810031522 A CN201810031522 A CN 201810031522A CN 110034843 B CN110034843 B CN 110034843B
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information bits
bit sequence
coding
coded
index set
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CN110034843A (en
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王献斌
张华滋
李榕
王俊
杜颖钢
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Huawei Technologies Co Ltd
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Priority to PCT/CN2019/071662 priority patent/WO2019137537A1/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H04L1/0013—Rate matching, e.g. puncturing or repetition of code symbols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations

Abstract

The application provides a channel coding method, a coding device and a system, which pass through X1 N＝D1 NFNOutput bit sequence X1 NWherein, the D is1 NAccording to the position of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure DDA0001546640030000015
Is a bit sequence obtained from K information bits to be encoded, FNIs log2N matrices F2Kronecker product of (a). In the above technical solution, especially in the design, it is considered that the positions of the K information bits to be coded in the code pattern with the mother code length N include: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1, applying the above designed information bit position to the encoding process reduces the bit error rate, greatly improves the bit error rate performance of the system, and further improves the error report rate performance during decoding.

Description

Channel coding method and coding device
Technical Field
The present invention relates to the field of coding and decoding, and in particular, to a channel coding method and a channel coding device.
Background
The communication system usually adopts channel coding to improve the reliability of data transmission and ensure the quality of communication. Polar code is a coding mode which can achieve shannon capacity and has low coding complexity. Polar code is a linear block code comprising information bits and freeze bits. The generating matrix of the Polar code is F at presentNPolar coding process is X1 N＝u1 NFNWherein
Figure GDA0003532538880000011
Is a binary row vector with length N; fNIs an N × N matrix, and
Figure GDA0003532538880000012
where FNIs defined as log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000013
after the sending end encodes the information bits by Polar code, the receiving end usually decodes by using Serial Cancellation (SC) decoding or Serial Cancellation List (SCL) decoding algorithm. However, the False Alarm Rate (FAR) of the conventional Polar code is relatively high in the decoding process.
Disclosure of Invention
The application provides a channel coding method and a coding device, which can improve the error correction performance of a polar code under high-order modulation.
In a first aspect, a design of the present application provides a channel coding method, including:
first, the transmitting end obtains a bit sequence X 1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000014
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the row position index set H of the information bits in the coding graphLayer position index set M, H is more than or equal to 0 and less than or equal to N, 0<M≤logmN-1；
Secondly, the transmitting end transmits the bit sequence X1 N。
The channel coding method provided by the above embodiment passes through the X1 N＝u1 N G`NObtaining a bit sequence X1 NAnd output is performed. Compared with the existing Polar code encoding system, the output bit sequence X1 NIs to mix u1 NBy means of a new matrix G ″NBit sequence obtained by encoding, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the position of K information bits to be coded in a code pattern with a mother code length of N not only considers the row index set position of the code pattern where the information bits are located, but also needs to consider the layer index set position of the information bits in the code pattern, especially considers the distribution design of the layer index set, and when the design scheme is applied to the coding process, a large number of simulation results prove that the performance of the coding side of the system is improved by reducing the bit error rate of the coding system, and further, whether to stop in advance or not is judged according to Cyclic Redundancy Check (CRC) in the decoding process by the coding method, so that the performance during decoding is not further improved, and meanwhile, the FAR of the decoding side is greatly reduced.
For the possible channel coding design described above, the new matrix
Figure GDA0003532538880000021
Wherein, the first and the second end of the pipe are connected with each other,
Figure GDA0003532538880000022
n＝log2 N。
further, for the above possible channel coding design, the transmitting end obtains the bit sequence
Figure GDA0003532538880000023
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Further, in the above various possible channel coding designs, the layer position index set M includes: from layer 1 to (log)mN-1) any one of the layers.
Further, the layer position index set M is determined according to the row position index set H.
The above-designed determination method for the layer position index set M of the coding map is particularly important in determining the position of the information bit in the coding map, and the position of the information bit in the coding map is determined according to the determination method, further, the sending end determines the input bit sequence according to the position of the information bit in the coding map, especially the layer position index set of the information bit to be coded in the coding map, and then obtains the coded bit sequence by coding through the new matrix, and the bit error rate of the coding method is effectively reduced, and the performance of the coding and coding system is effectively improved.
In a second aspect, the present disclosure provides a coding apparatus, including:
the input interface circuit is used for acquiring K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
logic circuit for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000024
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1；
An output interface circuit for transmitting the bit sequence X1 N。
The encoding apparatus provided by the above embodiment passes through the X1 N＝u1 N G`NObtaining a bit sequence X1 NAnd output is performed. Compared with the existing Polar code coding system, the output bit sequence X 1N is a radical of1 NBy means of a new matrix GNBit sequence obtained by encoding, the new matrix G ″)NGenerating a matrix according to the encoding of Polar codes and a matrix generated by K information bits to be encoded at the position of an encoding graph with the length of a mother code of N; the positions of the K information bits to be encoded in the code pattern with the mother code length of N not only take into account the position of the row index set of the code pattern in which the information bits are located, but also need to take into account the position of the layer index set of the code pattern, especially the distribution design of the layer index set, and when the above design scheme is applied to the encoding process, a large number of simulation results prove that the performance of the encoding side of the system is improved by reducing the bit error rate of the encoding system, and further, the encoding method judges whether to stop in advance or not according to Cyclic Redundancy Check (CRC) in the decoding process, so that the performance during decoding is not further improved, and the FAR at the decoding side is also greatly reduced.
According to the second aspect, the logic circuit provided in the design scheme provided by the application is further used for generating the new matrix
Figure GDA0003532538880000031
Wherein, the first and the second end of the pipe are connected with each other,
Figure GDA0003532538880000032
n＝log2 N。
according to the second aspect, the logic circuit is further configured to obtain a bit sequence
Figure GDA0003532538880000033
The described
Figure GDA0003532538880000034
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, wherein the K information bits to be coded are placed at positions corresponding to a 0-th row position index set H in the coding graph.
In accordance with various designs of the second aspect, the set of layer position indices M includes: from layer 1 to (log)mN-1) any one of the layers.
In accordance with various designs of the second aspect described above, the set of layer position indices M is obtained from the set of row position indices H.
The above-designed encoding apparatus is particularly important for determining the position of the information bit in the encoding map in the determination manner of the layer position index set M of the encoding map, and determines the position of the information bit in the encoding map according to the determination manner, further, the transmitting end determines the input bit sequence according to the position of the information bit in the encoding map, especially the layer position index set of the information bit to be encoded in the encoding map, and further performs encoding through the new matrix to obtain the encoded bit sequence, and the bit error rate of the encoding apparatus is effectively reduced, thereby effectively improving the performance of the encoding system.
The present application also provides an encoding apparatus, the apparatus comprising:
A processor for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the encoding generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000035
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
The encoding apparatus provided by the above embodiment passes through the X1 N＝u1 N G`NObtaining a bit sequence X1 NAnd outputs are performed. Compared with the existing Polar code coding system, the output bit sequence X1 NIs to mix u1 NBy means of a new matrix G ″NThe new matrix G' N is a matrix generated according to the coding generation matrix of Polar codes and the positions of K information bits to be coded in the coding graph with the length of the mother code of N; the position of K information bits to be coded in a code pattern with a mother code length of N not only considers the row index set position of the code pattern where the information bits are located, but also needs to consider the layer index set position of the information bits in the code pattern, especially the distribution design of the layer index set, and the design scheme is applied to the coding process, and a large number of simulation results prove that the performance of the coding side of the system is improved by reducing the bit error rate of the coding system, and further, the coding method judges whether to stop in advance or not according to Cyclic Redundancy Check (CRC) in the decoding process, so that the performance in decoding is not further improved, and meanwhile, the FAR on the decoding side is also greatly reduced Low.
The processor of this design is further configured to generate the new matrix
Figure GDA0003532538880000041
Wherein the content of the first and second substances,
Figure GDA0003532538880000042
n＝log2 N。
the processor of this design is further configured to obtain a bit sequence
Figure GDA0003532538880000043
The above-mentioned
Figure GDA0003532538880000044
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Further, the above design includes, in determining the layer position index set M of the information bits in the coding map: from layer 1 to (log)mN-1) any one of the layers.
Further, the above design includes, in determining the layer position index set M of the information bits in the coding map: the set of layer position indices M is obtained from the set of row position indices H.
The above-designed encoding apparatus is particularly important for determining the position of the information bit in the encoding map in the determination manner of the layer position index set M of the encoding map, and determines the position of the information bit in the encoding map according to the determination manner, further, the transmitting end determines the input bit sequence according to the position of the information bit in the encoding map, especially the layer position index set of the information bit to be encoded in the encoding map, and further performs encoding through the new matrix to obtain the encoded bit sequence, and the bit error rate of the encoding apparatus is effectively reduced, thereby effectively improving the performance of the encoding system.
The present design also provides another encoding device, the device comprising:
a memory for storing program instructions;
a processor for executing the program stored in the memory, the program, when executed, generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the encoding of Polar codes and a matrix generated by K information bits to be encoded at the position of an encoding graph with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of (1),
Figure GDA0003532538880000045
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
The memory provided above may be physically separate units or may be integrated with the processor.
In another design, the memory is located outside the encoding device, and the encoding device is connected to the memory through a circuit/wire, and is used for reading and executing the program stored in the memory.
The above-designed encoding apparatus is particularly important for determining the position of the information bit in the encoding map in the determination manner of the layer position index set M of the encoding map, and determines the position of the information bit in the encoding map according to the determination manner, further, the transmitting end determines the input bit sequence according to the position of the information bit in the encoding map, especially the layer position index set of the information bit to be encoded in the encoding map, and further performs encoding through the new matrix to obtain the encoded bit sequence, and the bit error rate of the encoding apparatus is effectively reduced, thereby effectively improving the performance of the encoding system.
The design scheme provided by the present application further provides an encoding apparatus, the apparatus comprising:
a transceiver for receiving K information bits to be encoded and for transmitting a bit sequence X1 NK is not less than 1 and is an integer;
a processor for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log 2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000051
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
The design solution provided by the present application may further provide an encoding apparatus, including:
the receiving module is used for acquiring K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
a coding module for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NSaidu1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000052
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1；
A transmission module for transmitting the bit sequence X1 N。
The coding device is a base station or a terminal.
The present application further provides a coding and decoding system, the system comprising: the network equipment comprises any one of the coding devices; alternatively, the terminal device includes any one of the above encoding apparatuses.
Drawings
Fig. 1 is a wireless communication system suitable for use with embodiments of the present application;
FIG. 2 is a basic flow diagram for communication using wireless technology;
fig. 3 is a flowchart of an embodiment of a channel coding method provided in an embodiment of the present application;
FIG. 4 is a coding diagram provided by an embodiment of the present application;
FIG. 5 is another encoding diagram provided by the embodiments of the present application;
fig. 6 (a) and fig. 6 (b) are schematic diagrams of channel coding according to an embodiment of the present application;
fig. 7 is a schematic diagram of an encoding apparatus according to another embodiment of the present application;
fig. 8 is a schematic diagram of another encoding apparatus provided in the embodiments of the present application;
fig. 9 is a schematic diagram of another encoding apparatus provided in an embodiment of the present application;
fig. 10 is a schematic diagram of another encoding apparatus provided in the embodiment of the present application;
fig. 11 is a schematic diagram of another encoding apparatus provided in the embodiments of the present application;
Fig. 12 is a flowchart of another embodiment of a channel coding method according to another embodiment of the present application;
FIG. 13 is a flowchart of an embodiment of a channel decoding method according to another embodiment of the present application;
FIG. 14 is a diagram of another decoding apparatus according to an embodiment of the present application;
FIG. 15 is a schematic diagram of another decoding apparatus according to an embodiment of the present application;
FIG. 16 is a diagram of another decoding apparatus according to an embodiment of the present application;
fig. 17 is an activation factor graph 17-1 to an activation factor graph 17-10 according to an embodiment of the present application.
Detailed Description
The technical solution in the present application will be described below with reference to the accompanying drawings.
Fig. 1 is a wireless communication system 100 suitable for use in embodiments of the present application. At least one network device may be included in the wireless communication system, the network device communicating with one or more terminal devices (e.g., terminal device #1 and terminal device #2 shown in fig. 1). The network device may be a base station, or a device formed by integrating the base station and a base station controller, or other devices having similar communication functions.
The wireless communication system mentioned in the embodiments of the present application includes but is not limited to: the Communication system includes three application scenarios of an internet of things Communication system, a Long Term Evolution (LTE) system, and a 5G Mobile Communication system (i.e., enhanced Mobile bandwidth (eMBB), high reliability Low Latency Communication (URLLC), and enhanced mass Machine connectivity (eMTC)), or a new Communication system appearing in the future.
The terminal devices referred to in the embodiments of the present application may include various handheld devices, vehicle mounted devices, wearable devices, computing devices, or other processing devices connected to a wireless modem with wireless communication capability. The terminal device may be a Mobile Station (MS), a subscriber unit (subscriber unit), a cellular phone (cellular phone), a smart phone (smart phone), a wireless data card, a Personal Digital Assistant (PDA) computer, a tablet computer, a wireless modem (modem), a handset (handset), a laptop (laptop computer), a Machine Type Communication (MTC) terminal, or the like.
The network device and the terminal device in fig. 1 communicate by using wireless technology. When the network device sends a signal, it is an encoding end, and when the network device receives a signal, it is a decoding end. The same applies to the terminal device, which is the encoding side when the terminal device transmits a signal and the decoding side when the terminal device receives a signal.
Fig. 2 is a basic flow diagram for communication using wireless technology. At a transmitting end, the information source is transmitted after information source coding, channel coding, rate matching and modulation are sequentially carried out. And at a receiving end, sequentially demodulating, de-rate matching, channel decoding and information source decoding to obtain an information sink.
For ease of understanding, the channel coding referred to in this application will first be briefly described:
channel coding and decoding is one of the core technologies in the field of wireless communication, and the improvement of performance will directly improve network coverage and user transmission rate. At present, the polar code is a channel coding technology which can theoretically prove that the Shannon limit is reached and has practical linear complexity coding and decoding capabilities. The core of the polarization code is that through the processing of 'channel polarization', at the encoding side, the encoding method is adopted to enable each sub-channel to present different reliability, when the code length is continuously increased, one part of channels tend to the noiseless channel with the capacity close to 1, the other part of channels tend to the full-noise channel with the capacity close to 0, and the channel with the capacity close to 1 is selected to directly transmit information to approximate the channel capacity.
The coding strategy provided by the application just applies the characteristic of the phenomenon, useful information of a user is transmitted by using a noise-free or low-noise channel, and appointed information or unvarnished information is transmitted by using a full-noise channel. The coding provided by the application is also a linear block code, and the coding matrix (also called a generating matrix) of the linear block code can be F based on the existing matrix NThe coding process is X1 N＝D1 NFNTo obtain a bit sequence X1 N. Wherein, FNIs an N × N matrix, and
Figure GDA0003532538880000071
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000072
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000073
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
In the encoding process of the above-described encoding,
Figure GDA0003532538880000074
a part of the bits used to carry information is called a set of information bits. The set of indices for these bits is denoted a. The other part of the bits are set as fixed values predetermined by the receiving end and the transmitting end, which are called as fixed bit sets or frozen bit (frozen bits) sets, and the index sets are complementary sets A of A cAnd (4) showing.
Figure GDA0003532538880000075
The fixed set of bits in (N-K), are known bits to both the sending and receiving ends. These fixed bits are usually set to 0, but may be arbitrarily set as long as the receiving end and the transmitting end agree in advance.
Based on the above description, embodiments of the present application provide a channel coding method, apparatus, and system, which can improve the error correction performance of a polar code under high-order modulation, so as to meet the FAR requirement. The following describes the channel coding method and apparatus provided in the present application in detail with reference to the accompanying drawings.
Fig. 3 is a flowchart of an embodiment of a channel coding method provided in the present application, and as shown in fig. 3, an execution main body of the embodiment is a sending end, and the channel coding method of the embodiment may include:
s300, the sending end obtains a bit sequence X1 NSaid X is1 N＝D1 NFN。
Wherein, FNIs an N × N matrix, and
Figure GDA0003532538880000076
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000081
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NBits obtained after encodingSequence of (a) a
Figure GDA0003532538880000082
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1。
Wherein, the
Figure GDA0003532538880000083
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
The fixed bits are pre-agreed values at the receiving end and the transmitting end, and these pre-agreed values may also be referred to as frozen bits, and the value may be 0.
The information bits are bits for carrying information, and the information may include any one or more of the following: data information, signaling information, or Check information, such as power control information, uplink scheduling grant information, resource block resource allocation information, Cyclic Redundancy Check (CRC), Parity Check (PC), or any other Check information.
Further, said D1 NThe method comprises the following steps: bit sequence C1 NAnd a fixed bit, said bit sequence C1 NIs according to the coding pattern
Figure GDA0003532538880000084
And carrying out polarization coding to obtain a bit sequence.
Further, the layer position index set M includes: from layer 1 to (log)mN-1) any one of the layers;
alternatively, the first and second electrodes may be,
the layer position index set M is obtained from the row position index set H.
S302, the sending end sends the bit sequence X1 N。
Further, the transmitting end obtains a bit sequence X1 NThe process of (1) involves the positions of K information bits to be coded in a code pattern with a mother code length of N, and the specific process of determining the positions of the K information bits to be coded in the code pattern with the mother code length of N is as follows:
firstly, a sending end obtains a code pattern with a mother code length of N.
Wherein the code pattern comprises: m 'layer, H' row, M ═ logmN +1 layers, i.e. layer0 0, layer1 1, … …, and layer (M' -1)mAnd N and H' are respectively the 0 th line and the … … th line N-1, wherein N is the integral power of m, and m is a positive integer larger than 1.
Taking the code pattern with the code length N of 8 as an example, as shown in fig. 4, when M is 2 and N is 8, the code pattern has M ' of 4 and H ' of 8 lines, and M ' is { L {0,L1,L2,L3H' is { H }0,h1,h2,h3,h4,h5,h6,h7}。
Secondly, the sending end determines the positions of K information bits to be coded in the code pattern according to the code pattern. Wherein, the position of the K information bits to be coded in the code pattern with the mother code length of N includes: a set of row position indices H of the information bits in the code pattern and a set of layer position indices M of the information bits in the code pattern, the
Figure GDA0003532538880000085
0≤H≤N，0<M≤logmN-1。
Since the position of the information bit in the coding map determines the performance of channel coding, besides determining the row position index set of the information bit in the coding map, it is also necessary to further determine the layer position index set of the information bit in the coding map when confirming the position of the information bit in the coding map.
The process of determining the position of the information bit in the coding map in the embodiment is implemented in two steps: firstly, selecting which row of the coding graph the information bits are placed in; second, it is further confirmed which layer in the selected row the information bits are placed.
The specific sending end may determine the row position index set H where the information bits are located through any one or a combination of several of the following manners, for example: the determination of the set of position indices is made based on a Polarization Weight (PW) sequence, a bartype parameter, or a gaussian approximation, etc. Since determining the row position index set H where the information bits are located is prior art, it is not described here in detail.
Taking fig. 4 as an example, the index set H of the information bits at the row position of the coding diagram is { H } H of the information bits at H of the coding diagram according to the above-mentioned determination method 3,h5,h6,h7It can be understood that the 4 information bits to be encoded are located at row 3, row 5, row 6, and row 7 of the encoding diagram shown in fig. 4, respectively.
Further, the method for the sending end to determine the layer position index set M of the information bits in the coding map includes the following several methods, for example:
the first embodiment is as follows: the K information bits to be coded include from layer 1 to (log) in a layer position index set M of a coding diagrammN-1) any one of the layers.
The method specifically comprises the following steps: the transmitting end selects any layer from the layer position index set M' of the coding graph as the layer position index set M, and the preferable mode is as follows: from layer 1 to (log) of MmN-1) selecting a layer L from the layers, and determining a layer position index set M where the K information bits to be coded are located as { L }. It should be noted that, since all information bits to be encoded are placed in one layer, the only elements in the set M determined here areOne, L layer.
Taking fig. 4 as an example, the sending end selects layer2 from layers 0-3 to put 4 information bits to be coded, that is, the index set L of the layer position where the information bit is located is layer 2. As can be seen from simulation results, when information bits are placed in the layer close to the right, the bit error rate performance during encoding can be greatly improved through the encoding mode, and the report error rate performance during decoding after receiving by a receiving end is also greatly improved.
In conjunction with the determination of the row position index, the positions of the 4 information bits to be coded in the coding map may be determined as follows: line 3 of layer2, line 5 of layer2, line 6 of layer2 and line 7 of layer2, as shown by the 4 shaded circles in layer2 of FIG. 4, which respectively illustrate the location of 4 information bits in the encoding map. That is, the positions of the 4 information bits to be encoded in the encoding diagram include: the row position index set H is { H }3,h5,h6,h7Is { L } and a set of layer position indices M2}。
Or, in the second example, the method for the sending end to determine the layer position index set M of the information bits in the coding map may also be: the set of layer position indices M is determined from the set of row position indices H.
Specifically, the method comprises the following steps: firstly, the sending end selects any layer L from the layer position index set M' to be determined as the layer index corresponding to the row index H where any information bit in the row position index H is located, and H belongs to H.
Secondly, the sending end traverses H in the row position index set H and determines a layer position index set M in which all K information bits to be coded are positioned.
Taking fig. 5 as an example, taking 4 information bits to be encoded as an example, the sending end determines the row index set H where the 4 information bits to be encoded are located as { H } in a manner of passing through the row index position described above 3,h5,h6,h7}。
The sending end firstly determines the row index h of 4 information bits to be coded in the coding diagram3Corresponding information ratioThe particular row index: the sender may be from an optional 1 layer of layers 0-3 in the code map, preferably excluding layer0 and layer3, and from an optional 1 layer of layers 1 or layer2 in the code map. As shown in fig. 5, the sending end selects layer0 as the layer index position of the coding map where one of the information bits is located, that is, the position set of the information bit in the coding map is: { L0,h3}. Then, the transmitting end traverses H in the H and determines the rest H in sequence5、h6、h7The corresponding information bits are combined with M in the layer index of the coding map. As shown in FIG. 5, the transmitting end determines the remaining h in turn5,h6,h7The layer index of the corresponding information bit in the coding diagram is combined with M to be L0,L1,L2}。
As shown in fig. 5, the positions of the 4 information bits in the code pattern include: the set of row position indices H is { H }3,h5,h6,h7And the layer position index set M is { L }0,L1,L2}. The black circles in fig. 5 represent: the information bit positions of the 4 information bits to be coded are distributed in: line 3 of Layer0, line 5 and line 7 of Layer1 and line 7 of Layer 2.
Or, the method for the sending end to determine the information bits in the coding map position index set M may also be:
example three: aiming at the specific implementation of the second example:
and the sending end calculates the layer index L of each information bit according to the following formula for each H in the row position index set H of the information bit, wherein the formula is a function related to H.
The function related to h may be: l ═ ceil (log)2(rem(h,2m) +1)) to obtain L, wherein m is an integer and generally takes any value of 2, 3 or 4; h is a layer index corresponding to the row index H where any information bit in the row position index H is located; the rem function is the division of h by 2mA function of the remainder of (1), e.g. rem (5,2), a ceil function being greater than this numberThe minimum integer of a word, for example ceil (2.5) ═ 3, can be obtained by the above formula, and the layer index L where the information bit of each h is located can be obtained.
It should be noted that, in the process of determining the position of the information bit in the subchannel, the sequence of determining the row position index of the information bit in the subchannel and determining the layer position index of the information bit in the subchannel by the sending end is not particularly limited, and the above embodiment may also be that the sending end determines the layer position index of the information bit in the subchannel first and then determines the row position index of the information bit in the subchannel.
The above process realizes the position determination process of the information bit to be transmitted in the coding diagram, and the coding side codes the information bit according to the position in the coding diagram, especially the row position index of the information bit in the coding diagram, and the bit error rate of the coding system can be well improved by the coding mode through various simulation results.
Based on the above-mentioned method for determining the positions of K information bits to be encoded in the coding diagram, it can be seen that the positions of the information bits not only take into account the row position index of the information bits in the coding diagram, but also take into account the layer position index of the coding diagram where the information bits are located, and especially the information bits are distributed in different layer indexes.
The above is the process of determining the position of the bit of the information to be sent in the coding map by the sending end, and the sending end further codes the polar code for the information bit according to the position of the information bit in the coding map.
The process of encoding the information bits is specifically described below with reference to the positions of the information bits in the coding diagram.
Taking fig. 6 as an example, first, the method for obtaining the input bit sequence by the lower transmitter is introduced
Figure GDA0003532538880000101
The implementation process specifically comprises the following steps:
step 1, a sending end places K information bits to be coded at positions corresponding to a 0 th layer row position index set H in a coding graph.
Here, according to the above description of the positions of the information bits in the coding diagram, taking (a) in fig. 6 as an example, the 4 information bits to be coded, where K is 4, correspond to the positions { h in the coding diagram3,L2}，{h5,L2}，{h6,L2}，{h7,L2However, in encoding, for the encoder at the transmitting end, encoding is generally started from layer0 corresponding to (a) in fig. 6 above, so that, here, the transmitting end places information bits in L in fig. 6 according to their positions in the encoding map, especially their row position index H in the encoding map, respectively0H of a layer3In position, L0H of a layer5In position, L0H of a layer6In position and L0H of a layer7In position.
Here the input bit sequence u at the transmitting end1 NThe coded bits corresponding to layer0 layer in fig. 6 (a) are composed of K information bits to be coded and fixed bits (given in step 2).
And 2, setting other bit positions in the layer0 to be fixed bits by the sending end.
Step 3, the sending end obtains the bit sequence according to the information bit to be coded and the fixed bit
Figure GDA0003532538880000111
It should be noted that the above sequence related to step 1 and step 2 can be interchanged, and is not specifically limited.
The above-mentioned determination process may be that K information bits to be coded are placed at positions corresponding to H of layer0 in the code pattern, or may be understood as that the information to be sent is sentThe bit corresponding to the row index set H in the coded graph is arranged at the position corresponding to the layer0 layer H, and further the input bit sequence is obtained
Figure GDA0003532538880000112
For example: with reference to fig. 6, (a) in fig. 6 is a code pattern of 4 layers and 8 lines: m 'is {0, 1.., 3}, and is denoted as layer0, layer0, layer1, layer1, layer2, layer2, layer3, layer3, and H' is {0, 1.., 7 }. The position set of the 4 information bits to be coded in the sub-channel can also be expressed as: m is { L2H is { H }3,h5,h6,h7}。
Specific sender acquisition
Figure GDA0003532538880000113
The process comprises the following steps:
one way may be:
as shown in fig. 6 (a), the transmitting end has a row index set H of { H } according to the information bits in the coding diagram 3,h5,h6,h7Place the information bits {1,1,0,1} to be sent in { h) of layer0 layer of (a) in FIG. 63,h5,h6,h7At the corresponding position.
Another way may be understood as:
as can be seen from (a) in fig. 6, the positions of the 4 information bits to be coded in the coding map are: m is { L2H is { H }3,h5,h6,h7The sender will layer2 layer { h }3,h5,h6,h7Bit value of { u }3,2,u5,2,u6,2,u7,2(the sequence of the row index and the layer index of the subscript is not limited, and can also be expressed as { u }2,3,u2,5,u2,6,u2,7}) is arranged at the layer0 level, and the row position index set H corresponding to the { u } corresponds to the row position index set H3,u5,u6,u7On, for example: set of settings { h3,h5,h6,h7The corresponding value of {1,1,0,1}, then:
Figure GDA0003532538880000114
{ u } of3,u5,u6,u7}, therefore, { u3,u5,u6,u7}＝{1,1,0,1}。
Further, the sender sets other variable nodes of layer0 layer to fixed values, for example, all 0.
Finally, sending the coding sequence u generated by the opposite end according to the information bit and the fixed bit1 NIs {0,0,0,1,0,1,0,1 }.
It should be noted that, the butterfly operation process for the polar code is also for butterfly operation from layer0 layer, so when encoding is performed at the transmitting end, the information bits to be encoded are generally placed at the positions corresponding to H of layer0, and further the encoding bit sequence u with mother code N is generated1 NAnd then further encoding the polarity code. Here the input bit sequence
Figure GDA0003532538880000115
It can be conveniently understood as N bit sequences for layer0 layer in (a) of fig. 6.
Secondly, the sending end pairs the input bit sequence u1 NPolarization coding is carried out to obtain a bit sequence C1 N。
As shown in (a) of fig. 6, a bit sequence to be obtained by a transmitting end
Figure GDA0003532538880000116
Sequentially proceeding from left to right, such as butterfly operation, until M is calculated as { L }2The corresponding N bit values in the layer, namely the output coding sequence C1 N. Herein C1 NWhich can be conveniently understood as an N-bit sequence for layer 2.
It is noted that, the above pairs
Figure GDA0003532538880000117
The process of polarity encoding is a part of the encoding process of the existing polar code, where the transmitting end starts from layer0 to the encoding end according to the position of the K information bits to be encoded in the encoding diagram
Figure GDA0003532538880000118
Performing butterfly operation until M is { L }2Layer by layer, output bit sequence C1 NHere, M is the layer index position where the information bit is located in the above coding pattern. As shown in fig. 6 (a), if layer0 corresponds to bit sequence u1 NIs {0,0,0,1,0,1,0,1}, pair
Figure GDA0003532538880000119
Applying butterfly computation from layer0 to layer2 to obtain bit sequence C corresponding to layer1 NMay be {1,1,0,1,0,1,1,1 }. The above-mentioned polarization encoding process is a part of the existing polarization encoding, and for the specific polarization encoding process, reference is made to the description of the polarization encoding in the prior art or standard, and details thereof are not repeated here.
Then, the transmitting end is according to C1 NTo obtain the bit sequence D1 N。
This can be understood simply as a process of second polarization encoding. As shown in fig. 6 (b), bit sequence D1 NInput bit sequence corresponding to layer0 layer of (b) in FIG. 6, the D1 NThe method comprises the following steps: c1 NThe middle row index H corresponds to bits and fixed bits.
The specific operation can be as follows: the sending terminal C1 NThe value of the bit position corresponding to the middle row index H is placed at the bit position corresponding to the row position index set H of the 0 th layer in (b) of fig. 6, the other bit positions of the 0 th layer are set as fixed bits, and the bit sequence D is output1 N。
Specifically, as shown in (a) of fig. 6, C1 NFor {1,1,0,1,0,1,1,1}, the sender aggregates the row indexes by { h }3,h5,h6,h7The values {1,0,1,0} of are placed in FIG. 6The row index set H of layer0 in (b) in (c) is { H }3,h5,h6,h7At the corresponding position of. Then, the transmitting end connects other positions { h } in the layer00,h1,h2,h4The corresponding bit value is set as a fixed bit, for example, all 0 bits {0,0,0,0}, and then as shown in (b) of fig. 6, the sending end obtains a bit sequence D1 NIs {0,0,0,1,0,0,1,0 }.
The above pair D1 NThe encoding process of (2) involves that the sending end firstly determines fixed bits in layer0 or firstly determines that the bits corresponding to H in layer0 do not make a restriction on the sequence.
Finally, the transmitting end is according to D1 NBy the formula X1 N＝D1 NFNObtaining a coded bit sequence X1 N。
In particular, the transmitting end will obtain a bit sequence D1 NAnd sequentially calculating from left to right, such as butterfly operation, and outputting the coded bit sequence. As shown in (b) of fig. 6, for example, the transmitting end is according to D1 NOutputting a bit sequence X of information bits corresponding to the layer3 from the layer0 to the last layer3 by applying butterfly computation1 N. The above-mentioned polarization encoding process is the existing polarization encoding technology, and for the specific polarization encoding process, reference is made to the description of the polarization encoding technology in the prior art or the standard, and details are not described here.
The above pair D1 NThe process of performing polarization encoding can also be understood as X1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000121
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000122
the transmitting end converts the 1 XN binary line vector D1 NWith NxN matrix FNMultiplying to output a 1 XN binary line vector X1 N。
It should be noted that, in the process of determining the coding sequence, whether the bits of the row position index corresponding to the information bits are determined first or whether there is no sequential limitation in the order of the fixed bits is determined first, or the fixed bits are determined first and then the values of the row position index corresponding to the information bits are determined.
Optionally, the sender-side obtained bit sequence in S300 mentioned in the above step may also be obtained by the following formula, and the following description is specifically presented in fig. 6 (a) and fig. 6 (b) by taking fig. 6 as an example as follows:
step 1, obtaining an input bit sequence u1 N，u1 NIs a binary row vector with length N;
for details, please refer to the above detailed description, which is not repeated herein.
Step 2, the sending end sends the data according to u1 NBy the formula
Figure GDA0003532538880000131
Obtaining C1 N。
Wherein:
u1 N＝(u1,u2,...,uN) Is a 1 × N binary row vector;
Figure GDA0003532538880000132
representing M matrices F2Kronecker product of (2) outputM×2MM is a layer index set of a subchannel in which information bits to be encoded are located.
Figure GDA0003532538880000133
To represent
Figure GDA0003532538880000134
The number of all-1-vectors,
Figure GDA0003532538880000135
is to generate a diagonal matrix and output
Figure GDA0003532538880000136
The input vectors, e.g., all 1's, are placed above the diagonal. Will be provided with
Figure GDA0003532538880000137
And
Figure GDA0003532538880000138
a Kronecker (Kronecker) product is performed, outputting an N × N matrix.
Specifically, the transmitting end is according to
Figure GDA0003532538880000139
Input bit sequence u1N and
Figure GDA00035325388800001310
matrix multiplying and outputting coded 1 XN bit sequence C1 N. For example: bit sequence C in (a) in FIG. 61 NIs {1,1,0,0,1,1,1,0 }.
Step 3, the sending end is according to the C1 NThe corresponding bit and fixed bit of middle H, obtain bit sequence D 1 N。
For example, C obtained in (a) of FIG. 61 NIs {1,1,0,0,1,1,1,0}, C is taken out1 NThe index set H of middle row position is { H }3,h5,h6,h7The value {0,1,1,0} of {0,1,1,0} is placed in { h } of layer0 in (b) of FIG. 63,h5,h6,h7The corresponding bit position.
Further, the transmitting end sets other bit positions outside the row position index set H of the layer0 to be fixed bits. As in (b) of fig. 6, transmissionEnd up with other positions in the layer0, i.e. { h0,h1,h2,h4The value of the corresponding bit position is set to a fixed bit, e.g., {0,0,0,0 }.
D obtained by the coding1 NIs {0,0,0,0,0,1,1,0 }.
Step 4, the sending end sends the data according to the D1 NBy the formula X1 N＝D1 NFNOutputting the coded bit sequence X1 N。
Specifically, corresponding to the above formula, D will be obtained1 NMultiplying with FN to output 1 × N matrix.
Wherein, FNIs an N × N matrix, and
Figure GDA00035325388800001311
FNdefined as the Kronecker product of log2N matrices F2,
Figure GDA00035325388800001312
the above-mentioned pair D corresponding to (b) in FIG. 61 NAnd carrying out a polarity encoding process.
For example, (b) in fig. 6, the coded bit sequence {0,0,0,0,0,1,1,0} of layer0 layer is D1 NAfter polarization coding layer by layer, the coded bit sequence of the last layer of layer3 layer is obtained, that is, the coded bit sequence X 1 N。
The addition and multiplication operations in the above formulas are all addition and multiplication operations in binary Galois field, and further output coded bit sequence X1 N。
To sum up, the bit sequence X obtained in step 1 to step 41 NThe process of (2) can also be specifically directly obtained by the following formula1 N：
Figure GDA0003532538880000141
And (4) obtaining.
Figure GDA0003532538880000142
Representing n matrices F2Kronecker product of output 2n×2n，N＝2nI.e. output an N × N matrix;
Figure GDA0003532538880000143
representation matrix
Figure GDA0003532538880000144
The number of the h-th row of (c),
Figure GDA0003532538880000145
according to the determination
Figure GDA0003532538880000146
And determining, if H belongs to the row index combination H of the information bits, determining the value of H in the row position index set H to be assigned, and if H does not belong to the row index combination H of the information bits, determining L pre-agreed fixed values, for example, all 0.
As described above
Figure GDA0003532538880000147
The coded bits corresponding to layer0 in fig. 6 (b) can be simply expressed as: the transmitting end determines the value of any H in the row index set H of layer0, i.e. when H is the information bit H set { H }3,h5,h6,h7Any one of H e H, then put the value corresponding to H in the set H3,h5,h6,h7The corresponding value in (c); if h is not { h3,h5,h6,h7Any one of them, i.e.
Figure GDA0003532538880000148
The bit corresponding to h is placed at a fixed bit, e.g., "0".
Taking the bit sequence of layer0 in fig. 6 (b) as an example, when the transmitting end determines the value corresponding to H3 of the lyaer0 layer, since H3 belongs to the information bit H set, the value of H3 is set to C 1 NAt the bit position corresponding to h3, the values of h5, h6 and h7 of layer0 corresponding to the bit positions are sequentially confirmed as described above. If the sending end determines the value of H0 of layer0, it is determined that H0 does not belong to the information bit H set, and the value of H0 of layer0 is directly set to a fixed bit, for example, 0, and then the values of H1, H2, and H4 of layer0 are sequentially determined in the above manner. It should be noted that, in the above process of determining the fixed bits, after the bits corresponding to H in the layer0 are determined, values at other positions in the layer0 may be set as the fixed bits, which is not limited herein.
Further, the above formula can be understood as: will input a bit sequence u1 NAnd
Figure GDA0003532538880000149
matrix multiplying and outputting C1 NTo C1 NCoding to obtain D1 NBy X1 N＝D1 NFNObtaining X1 N。
In the above formula, X is1 N＝D1 NFNMiddle pair D1 NAnd FNThe values corresponding to the rows H are taken and multiplied, and H is 4, corresponding to (b) in fig. 6. Where the transmitting end will D1 NTaking 4 values to generate a 1 × 4 binary line vector, FNAnd correspondingly takes a 4 x 4 matrix, then (D)1 N)HAnd (F)N)HCarry out multiplication, the above pair D1 NAnd FNThe process of H is taken separately for convenience of description. Of course, X in the above formula 1 N＝D1 NFNIn (b) in FIG. 6, D may be1 NIs still a matrix of (1 XN), but constitutes D1 NThe process of (1 × N) is the same as in the above embodiment, and the description is not repeated here, and a matrix constituting (1 × N) is output.
In the specific implementation manner in the encoding process, the output bit sequence D is designed according to the positions of the K information bits to be encoded in the encoding map, especially the layer index position set M of the information bits in the encoding map1 NTo D, pair1 NPerforms polar coding of the ploar code and outputs a coded bit sequence X1 NThe coding method not only improves the BER performance of the coding equipment, but also can improve the FAR performance during decoding, and the channel coding method is particularly obvious when the decoding equipment performs decoding.
An embodiment of the present invention further provides an encoding apparatus for encoding, which is configured to implement the channel encoding method in the foregoing embodiment, where part or all of the channel encoding method in the foregoing embodiment may be implemented by hardware or may be implemented by software, and when implemented by hardware, see fig. 7 for example.
Fig. 7 is a schematic structural diagram of an encoding apparatus for encoding according to another embodiment of the present application, where the apparatus includes:
The input interface circuit 700 is used to obtain K information bits to be encoded, where K is an integer greater than or equal to 1.
A logic circuit 702 for generating a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000151
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000152
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000153
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is larger than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer larger than 1, wherein the positions of the K information bits to be coded in a code pattern with a mother code length of N comprise: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are more than or equal to 0 and less than or equal to N, 0<M≤logmN-1；
An output interface circuit 704 for outputting the encoded bit sequence X1 N。
In the specific implementation manner in the encoding process, the output bit sequence D is designed according to the positions of the K information bits to be encoded in the encoding map, especially the layer index position set M of the information bits in the encoding map 1 NTo D, to1 NAnd performing polarity coding of the ploar code and outputting a coded bit sequence. Compared with the existing non-system Polar code, the position of the information bit in the coding diagram not only considers the row of the coding diagram where the information bit is located, but also needs to consider the layer position of the information bit in the coding diagram, and the designed information bit position is applied to the coding process, so that the Bit Error Rate (BER) of the system is greatly reduced; furthermore, the coding method is convenient for judging whether to stop in advance according to the cyclic redundancy check in the decoding process, and further the FAR performance is reduced in the decoding process.
The implementation manner of an embodiment provided in this embodiment, the logic circuit 702, is further configured to generate a bit sequence
Figure GDA0003532538880000161
The described
Figure GDA0003532538880000162
The method comprises the following steps: the described
Figure GDA0003532538880000163
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
The logic circuit 702 provided in this embodiment is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C 1 NIs according to the coding pattern
Figure GDA0003532538880000164
And carrying out polarization coding to obtain a bit sequence.
Due to the logic circuit 702 generation described above
Figure GDA0003532538880000165
And D1 NThe process of (1) involves positions of K information bits to be coded in the coding map, and the specific process of determining the positions of the information bits in the coding map is the same as the process described in the above-mentioned fig. 3 to fig. 6, and is not repeated here.
Further, the logic circuit 702 determines the layer position index set M of the information bits in the coding diagram in the following ways, for example:
the first embodiment is as follows: the K information bits to be coded include from layer 1 to (log) in a layer position index set M of a coding diagrammN-1) any one of the layers.
Alternatively, as a second example, the method for determining the layer position index set M of the information bits in the coding map may also be: the layer position index set M is obtained from the row position index set H.
Specifically, the method comprises the following steps: firstly, any layer L is selected from a layer position index set M' and determined as a layer index corresponding to a row index H where any information bit in the row position index H is located, and H belongs to H.
And traversing H in the row position index set H to determine a layer position index set M in which all K information bits to be coded are positioned.
Further alternatively, the method for determining the coding layer position index set M of the information bits may be:
example three: aiming at the specific implementation of the second example:
for each H in the row position index set H of the information bits, calculating the layer index L where each information bit is located according to the following formula, wherein the formula is a function related to H.
The function related to h may be: l ═ ceil (log)2(rem(h,2m) +1)) to obtain L, wherein m is an integer and generally takes any value of 2, 3 or 4; h is a layer index corresponding to the row index H where any information bit in the row position index H is located; the rem function is the division of h by 2mThe remainder function of (a) is, for example, rem (5,2) ═ 1, the ceil function is the smallest integer greater than the number, for example, ceil (2.5) ═ 3, and the layer index L at which the information bit of each h is located can be obtained by the above formula.
The above logic circuit 702 may specifically refer to fig. 4 and fig. 5 and the description of the embodiments corresponding to fig. 4 and fig. 5 for the process of determining the position of the information bit to be transmitted in the sub-channel, and is not described herein again.
The process of encoding the information bits is specifically described below with reference to the positions of the information bits in the encoding diagram.
The present embodiment provides a logic circuit 702 for determining an input bit sequence
Figure GDA0003532538880000166
The method can be specifically realized as follows:
step 1, the logic circuit 702 places K information bits to be encoded at the corresponding positions of the 0 th row position index set H in the encoding diagram.
Step 2, the logic circuit 702 sets the value set in other positions in the layer0 to a fixed bit.
Step 3, the logic circuit 702 obtains the bit sequence according to the information bit to be coded and the fixed bit
Figure GDA0003532538880000167
It should be noted that the above sequence related to step 1 and step 2 can be interchanged, and is not specifically limited.
The above-mentioned determination process may be as above-mentioned operation, placing K information bits to be coded in the corresponding positions of H of layer0 in the code map, and further obtaining the input bit sequence
Figure GDA0003532538880000171
Further, the logic circuit 702 provided in this embodiment obtains the bit sequence D1 NThe method can be specifically realized as follows:
first, the input bit sequence is input through the logic circuit 702
Figure GDA0003532538880000172
Polarization coding is carried out to obtain a bit sequence C1 N。
As shown in (a) of fig. 6, a bit sequence to be obtained is obtained by the logic circuit 702
Figure GDA0003532538880000173
Sequentially proceeding from left to right, such as butterfly operation, until M is calculated as { L } 2The corresponding N bit values in the layer, namely the output coding sequence C1 N. Herein C1 NWhich can be conveniently understood as an N-bit sequence to layer 2.
It is noted that, the above pairs
Figure GDA0003532538880000174
The process of polarity coding is a part of the existing polar code coding process, and the position of K information bits to be coded in the coding diagram is preferably determined according to the position of the K information bits to be coded in the coding diagramFirst, start from layer0 to
Figure GDA0003532538880000175
Performing butterfly operation until M is { L }2Layer by layer, output bit sequence C1 NWhere M is the layer index position where the information bit in the above coding map is located. As shown in fig. 6 (a), if the layer0 level corresponds to the bit sequence u1N of {0,0,0,1,0,1,0,1}, the pair
Figure GDA0003532538880000176
Applying butterfly calculation from layer0 to layer2 to obtain bit sequence C corresponding to layer1 NMay be {1,1,0,1,0,1,1,1 }. The above-mentioned polarization encoding process is a part of the existing polarization encoding, and for the specific polarization encoding process, reference is made to the description of the polarization encoding in the prior art or standard, and details thereof are not repeated here.
Secondly, the logic circuit 702 is according to C1 NObtaining the bit sequence D1 N。
Specifically, as shown in (a) of fig. 6, the logic circuit 702 extracts the corresponding bit sequence C from the layer2 layer obtained by the butterfly operation1 NThe value corresponding to the row position index set H where the information bit position is located is taken out, that is, the layer2 layer uplink index set { H is taken out 3,h5,h6,h7The corresponding value, the row index set H for placing the value at layer0 in (b) of FIG. 6 is { H }3,h5,h6,h7At the corresponding position of. For example: c1 NThe value (1,0,1,0) corresponding to the row position index set H where the information bit position is located is taken out, and the (1,0,1,0) is placed in { H corresponding to the layer0 layer in (b) of FIG. 63,h5,h6,h7At the position of (c).
Then, the logic circuit 702 sets bits corresponding to other positions in the layer0 to fixed bits.
Specifically, as shown in (b) of fig. 6, the other positions { h) of the layer0 layer in (b) of fig. 60,h1,h2,h4Is set to a predefined fixed value, e.g., all 0 bits, then the other positions { h } of layer0 layer0,h1,h2,h4The corresponding value of (0,0,0, 0).
Finally, as shown in (b) of fig. 6, the logic circuit 702 obtains the bit sequence D according to the bit corresponding to the H and the fixed bit1 N。
Specifically, as shown in (b) in fig. 6, the logic circuit 702 outputs a bit sequence D of layer0 layer1 NIs (0,0,0,1,0,0,1, 0).
Further, the logic circuit 702 is according to D1 NBy the formula X1 N＝D1 NFNObtaining a coded bit sequence X1 N。
The embodiment of the present invention further provides another implementation manner, for example: the logic 702 obtains the bit sequence X1 NIt can also be obtained by the following formula, and the following is specifically described as follows in fig. 6 (a) and fig. 6 (b), for example:
Step 1, the logic circuit 702 obtains an input bit sequence u1 N，u1 NIs a binary row vector with length N;
for details, please refer to the above detailed description, which is not repeated herein.
Step 2, the logic circuit 702 is according to u1 NBy the formula
Figure GDA0003532538880000181
Obtaining C1 N。
Step 3, the logic circuit 702 obtains the bit sequence D1 N。
The specific encoding process is as follows:
for example, C obtained in (a) of FIG. 61 NIs {1,1,0,0,1,1,1,0}, C is taken out1 NThe index set H of middle row position is { H }3,h5,h6,h7The value of {0,1,1,0}, will be{0,1,1,0} is placed in { h of layer0 in (b) of FIG. 63,h5,h6,h7The corresponding bit position.
Further, the transmitting end sets other bit positions outside the row position index set H of the layer0 to be fixed bits. As shown in (b) of fig. 6, the sender will refer to other positions in the layer0, i.e. { h }0,h1,h2,h4The value of the corresponding bit position is set to a fixed bit, e.g., {0,0,0,0 }.
D obtained by the coding1 NIs {0,0,0,0,0,1,1,0 }.
Step 4, the logic circuit 702 according to D1 NBy the formula X1 N＝D1 NFNOutputting the coded bit sequence X1 N。
For example, (b) in fig. 6, the coded bit sequence {0,0,0,0,0,1,1,0} of layer0 layer is D1 NAfter polarization coding layer by layer, the coded bit sequence of the last layer of layer3 layer is obtained, that is, the coded bit sequence X 1 N。
The addition and multiplication operations referred to in the above equations are all addition and multiplication operations over a binary galois field, and the logic 702 obtains the encoded bit sequence X1 N。
For the method for determining the position of the information bit in the coding diagram and the method for channel coding, please refer to the embodiments for specifically implementing a channel coding method corresponding to fig. 3-6 and fig. 3-6, which will not be described herein again.
In the specific implementation manner in the encoding process, the output bit sequence D is designed according to the positions of the K information bits to be encoded in the encoding map, especially the layer index position set M of the information bits in the encoding map1 NTo D, pair1 NPerforms polar coding of the ploar code and outputs a coded bit sequence X1 NThe coding method not only reduces the BER at the coding side, but also can reduce the FAR at the decoding,this channel coding method is particularly apparent when decoding is performed by a decoding device.
When part or all of the channel coding method of the above embodiment is implemented by software, an embodiment of the present invention further provides a coding apparatus 800, where the apparatus includes: referring to the processor 802 in figure 8,
a processor 802 for generating a bit sequence X 1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000182
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000183
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000184
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
Further optionally, the processor is further configured to generate a bit sequence
Figure GDA0003532538880000191
The above-mentioned
Figure GDA0003532538880000192
The method comprises the following steps: the K numbers are to be encodedAnd N-K fixed bits, wherein the K information bits to be encoded are placed at positions corresponding to a layer 0 row position index set H in the encoding diagram.
The fixed bits are fixed values predetermined by the receiving end and the transmitting end, and these predetermined fixed values may also be referred to as freeze bits.
The information bits are bits for carrying information, and the information may include any one or more of the following: data information, signaling information, or check information, such as power control information, uplink scheduling grant information, resource block resource allocation information, cyclic redundancy check CRC, parity check PC, or any other check information.
Further optionally, the processor is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C1 NIs according to the coding pattern
Figure GDA0003532538880000193
And carrying out polarization coding to obtain a bit sequence.
Further optionally, the layer position index set M includes: from layer 1 to (log)mN-1) any one of the layers; alternatively, the first and second electrodes may be,
the layer position index set M is obtained from the row position index set H.
For the method for determining the position of the information bit in the coding diagram and the method for channel coding, please refer to the embodiments for specifically implementing a channel coding method corresponding to fig. 3-6 and fig. 3-6, which will not be described herein again.
The processor provided above designs an output bit sequence D according to the positions of K information bits to be encoded in the encoding map, in particular, the layer index position set M of the information bits in the encoding map 1 NTo D, to1 NPerforming polarity encoding of the ploar code, and outputtingOutputting the coded bit sequence X1 NThe coding method not only improves the BER performance of the coding equipment, but also can improve the FAR performance during decoding, and the channel coding method is particularly obvious when the decoding equipment performs decoding.
The encoding apparatus 900 according to an embodiment of the present invention may further include a processor 902 and a memory 901, as shown in fig. 9, where the memory 901 is configured to store program instructions.
A processor 902 for executing the program stored in the memory, for generating a bit sequence X when the program is executed1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000194
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000195
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000196
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1。
The memory 901 may be a physically separate unit or may be integrated with the processor 902.
In the above embodiments, the memory may be located outside the encoding device, and the encoding device is connected to the memory through a circuit/wire, and is used for reading and executing the program stored in the memory.
An embodiment of the present invention may further provide an encoding apparatus 1000, which includes:
the processor 1002 and the transceiver 1004, as shown in figure 10,
a transceiver 1004 for K information bits to be encoded and transmitting X1 NK is not less than 1 and is an integer;
a processor 1002 for generating a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000201
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure GDA0003532538880000202
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000203
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1。
For the method for determining the position of the information bit in the coding diagram and the method for channel coding, please refer to the embodiments for specifically implementing a channel coding method corresponding to fig. 3-6 and fig. 3-6, which will not be described herein again.
Further, the various encoding devices may be a base station or a terminal.
The coding device provided above designs the output bit sequence D according to the positions of K information bits to be coded in the coding diagram, especially the layer index position set M of the information bits in the coding diagram1 NTo D, pair1 NPerforms polar coding of the ploar code and outputs a coded bit sequence X1 NThe coding method not only improves BER performance of coding equipment, but also can improve FAR performance during decoding, and the channel coding method is particularly obvious when decoding equipment decodes.
Another embodiment of the present invention further provides an encoding apparatus, as shown in fig. 11, the encoding apparatus 1100 includes:
a receiving module 1102, configured to obtain K information bits to be encoded, where K is greater than or equal to 1 and is an integer;
an encoding module 1104 for generating a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure GDA0003532538880000204
FNis log2N matrices F2The kronecker product of (a-c),
Figure GDA0003532538880000211
N is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure GDA0003532538880000212
Is N bit sequences generated according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, m is a positive integer more than 1, and the K information ratios to be codedThe positions of the code pattern with the mother code length of N are characterized by comprising the following steps: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1；
A transmitting module 1106 configured to transmit the bit sequence X1 N。
Further, the coding unit is further configured to generate a bit sequence
Figure GDA0003532538880000213
The above-mentioned
Figure GDA0003532538880000214
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Further, the coding unit is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C 1 NIs according to the coding pattern to the u1 NAnd carrying out polarization coding to obtain a bit sequence.
Wherein the layer position index set M includes: from layer 1 to (log)mN-1), or the set of layer position indices M is obtained from the set of row position indices H.
For the method for determining the position of the information bit in the coding diagram and the method for channel coding, please refer to the embodiments for specifically implementing a channel coding method corresponding to fig. 3-6 and fig. 3-6, which will not be described herein again.
Further, the various encoding devices may be a base station or a terminal.
The coding device provided above is based on the position of the K information bits to be coded in the coding map, in particular on the information bitsInformation bit in layer index position set M in coding diagram, and designing output bit sequence D1 NTo D, pair1 NPerforms polar coding of the ploar code and outputs a coded bit sequence X1 NThe coding method not only improves the BER performance of the coding equipment, but also can improve the FAR performance during decoding, and the channel coding method is particularly obvious when the decoding equipment performs decoding.
Another embodiment of the present invention also provides a readable storage medium, including: a readable storage medium and a computer program for implementing the channel coding method corresponding to any of fig. 3-6 described above.
Another embodiment of the present invention further provides a program product, which includes a computer program, where the computer program is stored in a readable storage medium, and the computer program can be read by at least one processor of an encoding apparatus from the readable storage medium, and the at least one processor executes the computer program to make the encoding apparatus implement the channel coding method according to any one of the embodiments of the channel coding method provided in the foregoing fig. 3 to fig. 6.
It should be noted that, the transmitting end performs decoding according to the received coding sequence, and the decoding algorithms of the schemes before the decoding algorithms are similar, which is the prior art, and will not be described in detail here. By the encoding method, the error correction capability of the decoding side is greatly improved on the decoding side.
An embodiment of the present invention further provides a system for coding and decoding, as shown in fig. 1, including a network device and a terminal device, where the network device includes the coding apparatuses in the foregoing embodiments, or the terminal device includes the coding apparatuses in the foregoing embodiments. The functions performed by the specific encoding apparatus are described with reference to fig. 3-6 and the corresponding embodiments.
An embodiment of the present invention further provides a flowchart of an embodiment of a channel coding method, and as shown in fig. 12, an execution main body of the embodiment is a sending end, and the channel coding method of the embodiment may include:
S1200, the sending end obtains the bit sequenceX1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000221
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are more than or equal to 0 and less than or equal to N, 0<M≤logmN-1。
S1202, the sending end sends the bit sequence X1 N。
The information bits are bits for carrying information, and the information may include any one or a combination of the following: data information, signaling information, or Check information, such as power control information, uplink scheduling grant information, resource block resource allocation information, Cyclic Redundancy Check (CRC), Parity Check (PC), or any other Check information.
The fixed bits are pre-agreed values at the receiving end and the transmitting end, and these pre-agreed values may also be referred to as frozen bits, and the value may be 0.
The K information bits to be encoded may include Check bits, such as CRC (Parity Check, PC) codes, and may also be any other Check bits.
Specifically, the transmitting end obtains a special sequence X1 NThe process of (2) is as follows:
first, the transmitting end obtains a new matrix GNThe process of (2) is as follows:
the new matrix G ″NThe matrix is generated according to the coding generation matrix of the Polar code and the position of K information bits to be coded in the coding graph with the length of the mother code being N.
For example, the transmitting end may generate G ″ by the following formulaN：
New matrix
Figure GDA0003532538880000222
The new matrix
Figure GDA0003532538880000223
Wherein the content of the first and second substances,
Figure GDA0003532538880000224
n＝log2 N。
from the above, the new matrix G' is obtainedNThe matrix is generated by a sending end according to a Polar code generation matrix C and a matrix B, wherein the matrix B is the same as the matrix B
Figure GDA0003532538880000231
And
Figure GDA0003532538880000232
correlation, C is log2N matrices F2The Kronecker product of (1),
Figure GDA0003532538880000233
Figure GDA0003532538880000234
representing M matrices F2Kronecker product of (2) outputM×2MM is a layer index set of a sub-channel where information bits to be coded are located.
Figure GDA0003532538880000235
Is a function of the generation of a diagonal matrix,
Figure GDA0003532538880000236
to represent
Figure GDA0003532538880000237
All 1 vectors, putting the input vector such as all 1 on the diagonal, filling 0 in the rest, and outputting
Figure GDA0003532538880000238
The diagonal matrix of (a).
Input bit sequence
Figure GDA0003532538880000239
Is a binary row vector, which can be understood as that the corresponding position of its index set H is set as the information bit to be coded, the rest positions are set as 0,
Figure GDA00035325388800002310
h complement of representation. When in use
Figure GDA00035325388800002311
AhDenotes the h-th row of matrix A, L denotes the number of columns of matrix A, AHAccording to
Figure GDA00035325388800002312
And (3) determining: and if H belongs to the row index combination H of the information bits, determining the value of H in the row position index set H for assignment, and if H does not belong to the row index combination H of the information bits, determining L preset fixed values, such as all 0. Here, the formula is used for AHThe value of the corresponding position in (1) is determined, and the output is still an N multiplied by N matrix.
Figure GDA00035325388800002313
Representation matrix
Figure GDA00035325388800002314
The number of the h-th row of (c),
Figure GDA00035325388800002315
according to the determination
Figure GDA00035325388800002316
Making a determination if h belongs to the complement of the row index set of information bits
Figure GDA00035325388800002317
Determining the value of H in the row position index set H to be assigned, if H belongs to the complement of the row index set of the information bits
Figure GDA00035325388800002318
L predetermined fixed values, for example all 0's, are determined.
It should be noted that the above formula is only an example, and may be specifically illustrated by other formulas. It will be appreciated that the above-described new matrix G' isNMay be a matrix related to the encoding generator matrix of Polar code, and may also be understood as the new matrix G ″, as described above NIs a matrix related to the position of the subchannel on which the K information bits to be coded are located, or as described above, the new matrix G ″NOr a matrix related to a code generation matrix of the polar code and a matrix related to positions of subchannels where the K information bits to be coded are located.
Secondly, the transmitting end obtains an input bit sequence u1 N(ii) a The above-mentioned
Figure GDA00035325388800002319
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Specifically, the sending end places K information bits to be encoded at positions corresponding to the 0 th layer row position index set H in the encoding map, and then sets other (N-K) bit positions in the 0 th layer as fixed bits. Finally, the sending end obtains the bit sequence according to the information bit to be coded and the fixed bit
Figure GDA0003532538880000241
Further, in determining u1 NIn the process, the sending end further obtains a code pattern with a mother code length of N, wherein the code pattern includes: m 'layer, H' row, M ═ logmN +1 layers, i.e. layer0 0, layer1 1, … …, and layer (M' -1) mAnd N and H' are respectively the 0 th line and the … … th line N-1, wherein N is the integral power of m, and m is a positive integer larger than 1.
Further, the sending end determines the positions of K information bits to be coded in the code pattern according to the code pattern. Wherein, the position of the K information bits to be coded in the code pattern with the mother code length of N includes: a set of row position indices H of the information bits in the code pattern and a set of layer position indices M of the information bits in the code pattern, the
Figure GDA0003532538880000242
0≤H≤N，0<M≤logm N-1。
Since the position of the information bit in the coding map determines the performance of channel coding, besides determining the row position index set of the information bit in the coding map, it is also necessary to further determine the layer position index set of the information bit in the coding map when confirming the position of the information bit in the coding map.
The process of determining the position of the information bit in the coding map in the embodiment is realized by two steps: firstly, selecting which row of the coding diagram to place the information bits; secondly, it is further confirmed which layer in the selected row the information bits are placed.
The specific sending end may determine the row position index set H where the information bit is located through any one or a combination of several of the following manners, for example: the determination of the set of position indices is made based on a Polarization Weight (PW) sequence, a bartype parameter, or a gaussian approximation, etc. Since determining the row position index set H where the information bits are located is prior art, it is not described here in detail.
Taking fig. 4 as an example, the index set H of the information bits at the row position of the coding diagram is { H } H of the information bits at H of the coding diagram according to the above-mentioned determination method3,h5,h6,h7It can be understood that the 4 information bits to be encoded are located at row 3, row 5, row 6, and row 7 of the encoding diagram shown in fig. 4, respectively.
Further, the method for the sending end to determine the layer position index set M of the information bits in the coding map includes the following several methods, for example:
the first embodiment is as follows: the K information bits to be coded include from layer 1 to (log) in a layer position index set M of a coding diagrammN-1) any one of the layers.
Or, in the second example, the method for the sending end to determine the layer position index set M of the information bits in the coding map may also be: the layer position index set M is determined from the row position index set H.
Specifically, the method comprises the following steps: firstly, a sending end selects any layer L from a layer position index set M' to be determined as a layer index corresponding to a row index H where any information bit in the row position index H is located, and H belongs to H.
Secondly, the sending end traverses H in the row position index set H and determines a layer position index set M in which all K information bits to be coded are positioned.
Or, the method for the sending end to determine the coding layer position index set M of the information bits may also be:
example three: aiming at the specific implementation of the second example:
and the sending end calculates the layer index L of each information bit according to the following formula for each H in the row position index set H of the information bit, wherein the formula is a function related to H.
The function related to h may be: l ═ ceil (log)2(rem(h,2m) +1)) to obtain L, wherein m is an integer and generally takes any value of 2, 3 or 4; h is a layer index corresponding to the row index H where any information bit in the row position index H is located; the rem function is the division of h by 2mThe remainder function of (a) is, for example, rem (5,2) ═ 1, the ceil function is the smallest integer greater than the number, for example, ceil (2.5) ═ 3, and the layer index L at which the information bit of each h is located can be obtained by the above formula.
The above-mentioned manner can also refer to the description of the embodiments corresponding to fig. 3 to 6, and is not described herein again.
Finally, the transmitting end inputs the bit sequence u1 NWith a new matrix G ″NMatrix multiplying and outputting coded 1 XN bit sequence
Figure GDA0003532538880000251
Figure GDA0003532538880000252
Taking (a) in fig. 6 and (b) in fig. 6 as an example, the transmitting end is based on the input bit sequence u1 NAnd a new matrix G ″NOutputting N bits as layer3 in (b) of FIG. 6, i.e. outputting a coded 1 XN bit sequence
Figure GDA0003532538880000253
Based on the channel coding method, the sending end is according to the X1 N＝u1 N G`NObtaining a coded bit sequence X1 NDue to the new matrix G ″NIs a matrix generated according to the coding generation matrix of Polar code and the position of K information bits to be coded in the coding graphThe new channel code is obtained by transforming the coding matrix of the existing ploar code. Various simulation results show that the channel coding method not only greatly reduces the Bit Error Rate (BER) of the system when the transmitting end carries out coding, but also reduces the FAR when the receiving end carries out decoding after receiving.
An embodiment of the present invention further provides an encoding apparatus for encoding, which is configured to implement the channel encoding method in the foregoing embodiment, where part or all of the channel encoding method in the foregoing embodiment may be implemented by hardware or may be implemented by software, and when implemented by hardware, see fig. 7 for example.
Another embodiment of the present application further provides a schematic structural diagram of an encoding apparatus for encoding, where the specific structure of the encoding apparatus may refer to fig. 7, but the functions performed by specific interface circuits are different, where the encoding apparatus includes:
the input interface circuit is used for obtaining K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
logic circuit for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000254
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bit in the coding chart and the row position index set H of the information bit in the coding chartThe layer position index set M in the coding graph is more than or equal to 0 and less than or equal to H and less than or equal to N, 0<M≤logmN-1；；
An output interface circuit for outputting the bit sequence X 1 N。
In a possible implementation manner provided in this embodiment, the logic circuit 1302 is further configured to generate the new matrix
Figure GDA0003532538880000261
Figure GDA0003532538880000262
Wherein, the first and the second end of the pipe are connected with each other,
Figure GDA0003532538880000263
n＝log2 N。
in particular, the logic circuit obtains a special sequence X1 NThe process of (2) is as follows:
first, the logic circuit obtains a new matrix G ″NThe process of (2) is as follows:
the new matrix GNThe matrix is generated according to the coding generation matrix of the Polar code and the position of K information bits to be coded in the coding graph with the length of the mother code being N.
For example, the transmitting end may generate G ″ by the following formulaN：
New matrix
Figure GDA0003532538880000264
The new matrix
Figure GDA0003532538880000265
Wherein the content of the first and second substances,
Figure GDA0003532538880000266
n＝log2 N。
from the above, the new matrix G' is obtainedNThe matrix is generated by a sending end according to a Polar code generation matrix C and a matrix B, wherein the matrix B is the same as the matrix B
Figure GDA0003532538880000267
And
Figure GDA0003532538880000268
correlation, C is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000269
Figure GDA00035325388800002610
representing M matrices F2Kronecker product of (2) outputM×2MM is a layer index set of a subchannel in which information bits to be encoded are located.
Figure GDA00035325388800002611
Is a function of the generation of a diagonal matrix,
Figure GDA00035325388800002612
to represent
Figure GDA00035325388800002613
All 1 vectors, putting the input vector such as all 1 on the diagonal, filling 0 in the rest, and outputting
Figure GDA00035325388800002614
The diagonal matrix of (a).
Input bit sequence
Figure GDA00035325388800002615
Is a binary row vector, which can be understood as that the corresponding position of its index set H is set as the information bit to be coded, the rest positions are set as 0,
Figure GDA00035325388800002616
H complement of representation. When in use
Figure GDA00035325388800002617
AhDenotes the h-th row of matrix A, L denotes the number of columns of matrix A, AHAccording to
Figure GDA00035325388800002618
And (3) determining: and if H belongs to the row index combination H of the information bits, determining the value of H in the row position index set H for assignment, and if H does not belong to the row index combination H of the information bits, determining L pre-agreed fixed values, such as all 0 s. Here, the formula is used for AHThe value of the corresponding position in (1) is determined, and the output is still an N multiplied by N matrix.
Figure GDA0003532538880000271
Representation matrix
Figure GDA0003532538880000272
The number of the h-th row of (c),
Figure GDA0003532538880000273
according to the determination
Figure GDA0003532538880000274
Making a determination if h belongs to the complement of the row index set of information bits
Figure GDA0003532538880000275
Determining the value of H in the row position index set H to be assigned, if H belongs to the complement of the row index set of the information bits
Figure GDA0003532538880000276
L predetermined fixed values, for example all 0's, are determined.
It should be noted that the above formula is only an example, and may be specifically shown by other formulasAnd (4) drawing. It will be appreciated that the above-described new matrix G' isNMay be a matrix related to the encoding generation matrix of Polar code, and may also be understood as the above-mentioned new matrix G ″NIs a matrix related to the position of the subchannel in which the K information bits to be coded are located, or as described above, the new matrix G ″ NOr a matrix related to a code generation matrix of the polar code and a matrix related to positions of subchannels where the K information bits to be coded are located.
Secondly, the logic circuit obtains the input bit sequence u1 N(ii) a The above-mentioned
Figure GDA0003532538880000277
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Specifically, the logic circuit places K information bits to be encoded at positions corresponding to the 0 th layer row position index set H in the encoding map, and then the logic circuit sets other (N-K) bit positions in the 0 th layer to be fixed bits. Finally, the logic circuit obtains the bit sequence according to the information bit to be coded and the fixed bit
Figure GDA0003532538880000278
Further, the logic circuit determines u1 NIn the process, the sending end further obtains a code pattern with a mother code length of N, wherein the code pattern includes: m 'layer, H' row, M ═ logmN +1 layers, i.e. layer0 0, layer1 1, … …, and layer (M' -1)mAnd N and H' are respectively the 0 th line and the … … th line N-1, wherein N is the integral power of m, and m is a positive integer larger than 1.
Furthermore, the logic circuit determines the positions of K information bits to be coded in the code pattern according to the code pattern. Wherein, the position of the K information bits to be coded in the code pattern with the mother code length of N includes: the information ratioA set of row position indices H of said information bits in said code pattern and a set of layer position indices M of said information bits in said code pattern, said
Figure GDA0003532538880000279
0≤H≤N，0<M≤logm N-1。
Since the position of the information bit in the coding map determines the performance of channel coding, besides determining the row position index set of the information bit in the coding map, it is also necessary to further determine the layer position index set of the information bit in the coding map when confirming the position of the information bit in the coding map.
The process of determining the position of the information bit in the coding map in the embodiment is implemented in two steps: firstly, selecting which row of the coding diagram to place the information bits; secondly, it is further confirmed which layer in the selected row the information bits are placed.
The specific logic circuit may determine the row position index set H where the information bit is located by any one or a combination of several of the following manners, for example: the determination of the set of position indices is made based on a Polarization Weight (PW) sequence, a bartype parameter, or a gaussian approximation, etc. Since determining the row position index set H where the information bits are located is prior art, it is not described here in detail.
Taking fig. 4 as an example, the index set H of the information bits at the row position of the coding diagram is { H } H of the information bits at H of the coding diagram according to the above-mentioned determination method3,h5,h6,h7It can be understood that the 4 information bits to be encoded are located at row 3, row 5, row 6, and row 7 of the encoding diagram shown in fig. 4, respectively.
Further, the logic circuit determines the layer position index set M of the information bits in the coding diagram in the following ways, for example:
the first embodiment is as follows: the K information bits to be coded are included from layer 1 to layerLog (i) ofmN-1) any one of the layers.
Alternatively, in the second example, the method for determining the layer position index set M of the information bits in the coding map by the logic circuit may be: the layer position index set M is determined from the row position index set H.
Specifically, the method comprises the following steps: firstly, the logic circuit selects any layer L from the layer position index set M' to be determined as the layer index corresponding to the row index H where any information bit in the row position index H is located, and H belongs to H.
And secondly, traversing H in the row position index set H by the logic circuit, and determining a layer position index set M in which all K information bits to be coded are positioned.
Further alternatively, the logic circuit may determine that the information bits are in the encoding layer position index set M by:
example three: aiming at the specific implementation of the second example:
and the logic circuit calculates the layer index L of each information bit according to the following formula for each H in the row position index set H of the information bits, wherein the formula is a function related to H.
The function related to h may be: l ═ ceil (log)2(rem(h,2m) +1)) to obtain L, wherein m is an integer and generally takes any value of 2, 3 or 4; h is a layer index corresponding to the row index H where any information bit in the row position index H is located; the rem function is the division of h by 2mThe remainder function of (a) is, for example, rem (5,2) ═ 1, the ceil function is the smallest integer greater than the number, for example, ceil (2.5) ═ 3, and the layer index L at which the information bit of each h is located can be obtained by the above formula.
The above-mentioned manner can also be described with reference to the corresponding embodiment of fig. 12, and will not be described herein again.
Finally, the logic circuit will input the bit sequence u1 NWith a new matrix G ″NMatrix multiplication is carried out to generate a coded 1 XN bit sequence
Figure GDA0003532538880000281
Figure GDA0003532538880000282
Taking (a) in fig. 6 and (b) in fig. 6 as an example, the transmitting end is based on the input bit sequence u 1 NAnd a new matrix GNGenerating N bits of layer3 as in (b) of FIG. 6, i.e. generating a coded 1 XN bit sequence
Figure GDA0003532538880000283
The coding device based on the above is based on the X1 N＝u1 N G`NObtaining a coded bit sequence X1 NDue to the new matrix G ″)NThe method is a matrix generated according to the encoding generation matrix of Polar codes and the positions of K information bits to be encoded in an encoding graph, realizes the transformation of the encoding matrix of the existing ploar codes, and obtains new channel codes. Various simulation results show that the channel coding method not only greatly reduces the Bit Error Rate (BER) of the system when the transmitting end carries out coding, but also reduces the FAR when the receiving end carries out decoding after receiving.
For a specific channel encoding process of the logic circuit, please refer to fig. 12 and the corresponding description of the channel encoding method in fig. 12, which are not repeated herein. In a specific implementation, the encoding device may be a chip or an integrated circuit.
When part or all of the channel coding method of the above embodiment is implemented by software, referring to fig. 8, an embodiment of the present invention further provides a coding apparatus, where the apparatus includes:
a processor for generating a bit sequence X 1 NSaid X is1 N＝u1 N G`NU is said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NAccording to the code generating matrix of Polar code and K information bits to be coded, the length of mother code isN is a matrix generated by the positions of the coding patterns; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000291
the encoding method comprises the following steps that K is larger than or equal to 1 and is an integer, N is the length of a mother code, N is the integer power of m, and m is a positive integer larger than 1, wherein the K information bits to be encoded comprise, at the position of an encoding diagram with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
Further, the processor 1400 is further configured to generate a new matrix
Figure GDA0003532538880000292
Wherein the content of the first and second substances,
Figure GDA0003532538880000293
n＝log2 N。
further, the processor is also used for generating a bit sequence
Figure GDA0003532538880000294
The above-mentioned
Figure GDA0003532538880000295
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Further, the layer position index set M includes: from layer 1 to (log) mN-1) any one of the layers.
Further, the layer position index set M is determined according to the row position index set H.
The above processor may also obtain a code pattern with length N and determine the position of the information bit in the code pattern, refer to the description of the channel coding method described in fig. 12, which is not described herein again.
The channel coding method of the coding device not only reduces the BER of the coding equipment, but also can further reduce the FAR during decoding, and the channel coding method is particularly obvious when the decoding equipment decodes, thereby improving the performance of coding and decoding on the whole.
An embodiment of the present invention further provides an encoding apparatus, which includes a processor and a memory, as shown in fig. 9, where the memory is used to store program instructions.
When the coding device comprises a memory, the processor is configured to execute the program stored in the memory, and when the program is executed, the processor generates the obtained bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log 2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000296
the method comprises the following steps that K is more than or equal to 1 and is an integer, N is the length of a mother code, N is the integral power of m, and m is a positive integer greater than 1, wherein the K information bits to be coded comprise the following positions in a coded picture with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are more than or equal to 0 and less than or equal to N, 0<M≤logmN-1。
Further, the processor is configured to generate a new matrix
Figure GDA0003532538880000297
Wherein the content of the first and second substances,
Figure GDA0003532538880000301
n＝log2 N。
further, the processor is configured to generate
Figure GDA0003532538880000302
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, wherein the K information bits to be coded are placed at positions corresponding to a 0-th row position index set H in the coding graph.
Further, the layer position index set M includes: from layer 1 to (log)mN-1) any one of the layers.
Further, the layer position index set M is determined according to the row position index set H.
The memory may be a physically separate unit or may be integrated with the processor.
In another optional embodiment, the memory is located outside the encoding device, and the encoding device is connected to the memory through a circuit/wire, and is configured to read and execute the program stored in the memory.
The channel coding method of the coding device not only reduces the BER of the coding equipment, but also can further reduce the FAR during decoding, and the channel coding method is particularly obvious when the decoding equipment decodes, thereby improving the performance of coding and decoding on the whole.
Another encoding apparatus provided in an embodiment of the present invention may include: a processor and a transceiver, as shown in fig. 10, the transceiver configured to receive K information bits to be encoded; and transmitting the transmission bit sequence X1 NK is not less than 1 and is an integer.
A processor for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000303
the method comprises the following steps that K is more than or equal to 1 and is an integer, N is the length of a mother code, N is the integral power of m, and m is a positive integer greater than 1, wherein the K information bits to be coded comprise the following positions in a coded picture with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1。
Further, the processor is further configured to generate the new matrix
Figure GDA0003532538880000304
Wherein, the first and the second end of the pipe are connected with each other,
Figure GDA0003532538880000305
n＝log2 N。
further, the processor is also configured to obtain a bit sequence
Figure GDA0003532538880000306
The described
Figure GDA0003532538880000307
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
Further, the layer position index set M includes: from layer 1 to (lo)gmN-1) any one of the layers.
Further, the layer position index set M is obtained according to the row position index set H.
For a specific encoding process of the encoding apparatus, please refer to the information encoding embodiment and the corresponding description in fig. 12, which is not repeated herein.
Further, the encoding device is a base station or a terminal.
In another optional embodiment, the memory is located outside the encoding device, and the encoding device is connected to the memory through a circuit/wire, and is configured to read and execute the program stored in the memory.
The channel coding method of the coding device not only reduces the BER of the coding equipment, but also can further reduce the FAR during decoding, and the channel coding method is particularly obvious when the decoding equipment decodes, thereby improving the performance of coding and decoding on the whole.
Another embodiment of the present invention further provides an encoding apparatus, as shown in fig. 11, the encoding apparatus including:
the receiving module is used for acquiring K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
a coding module for generating a bit sequence X1 NSaid X is1 N＝u1 N G`NU of said1 NIs a bit sequence obtained from K information bits to be encoded, the new matrix G ″NGenerating a matrix according to the code of the Polar code and a matrix generated by K information bits to be coded at the position of a code pattern with the length of a mother code of N; the code generating matrix of the Polar code is log2N matrices F2The Kronecker product of Kronecker,
Figure GDA0003532538880000311
wherein K is more than or equal to 1 and is an integer, N is the length of the mother code, N is the integral power of m, and m is a positive integer more than 1Wherein, the position of the K information bits to be coded in the code pattern with the mother code length of N includes: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1；
A transmission module for transmitting the bit sequence X1 N。
The coding apparatus provided in the above embodiments may be a base station or a terminal.
For a specific encoding process of the encoding apparatus, please refer to the information encoding embodiment and the corresponding description in fig. 12, which is not repeated herein.
The channel coding method of the coding device not only reduces the BER of the coding equipment, but also further reduces the FAR of decoding, and the channel coding method is particularly obvious when the decoding equipment decodes.
Another embodiment of the present invention also provides a readable storage medium, including:
readable storage medium and computer program for implementing the channel coding method of any of the method embodiments of fig. 12 and of fig. 12.
Another embodiment of the present invention further provides a program product, which includes a computer program, which is stored in a readable storage medium, and which can be read by at least one processor of an encoding apparatus, and the at least one processor executes the computer program to make the encoding apparatus implement the channel coding method according to any one of the method embodiments corresponding to fig. 12 and fig. 12.
It should be noted that, the transmitting end performs decoding according to the received coding sequence, and the decoding algorithms of the schemes before the decoding algorithms are similar, which is the prior art, and will not be described in detail here. By the encoding method, the error correction capability of the decoding side is greatly improved on the decoding side.
Another embodiment of the present invention further provides a coding system, as shown in fig. 1, where the coding system includes a network device and a terminal device, where the network device includes: the various encoding devices described above; alternatively, the terminal device includes the above various encoding apparatuses.
For various device structures and functions of the specific encoding device, please refer to the detailed description of the above embodiments, which is not repeated herein.
The embodiment of the invention also provides a channel coding method, which comprises the following steps:
taking the information bit sequence to be coded as {1,1} as an example, the method is realized by another channel coding method and is represented in a factor graph form, wherein color filled nodes represent information bits, dotted line shaded filled nodes represent frozen bits, and the rest white unfilled nodes represent variable nodes needing to be calculated in the coding process.
The dashed line in the factor graph indicates that the variable node or check relationship is not utilized yet and is in an inactive state.
In the above description, a value not yet determined is represented by X; x is only an expression method, and all undetermined values can be marked as 2; values that have not been determined are generally labeled 0.
From the perspective of the factor graph, the values corresponding to all the variable nodes in the rightmost column in the factor graph are calculated, and the encoding process is completed correspondingly, and the specific encoding process is as follows:
step 1: 4 variable nodes as column 3 of the graph activation factor graph 17-1, wherein if the information of a certain variable node is known, it is set to a corresponding known value; otherwise, it is set to X. The sending end obtains a sequence according to the activation factor graph 17-1: { x, x, x,1}, called bit sequence C1.
Step 2: the second half of the sequence C1, which is taken to be the two bits x and 1, corresponds to the last two variable nodes as in column 2 of the graph activation factor graph 17-2 and is referred to as the sequence C2.
Step 3, as the activation factor graph 17-3, the second half 1 of the sequence C2 is taken, corresponding to the last variable node in column 1 in the activation factor graph 17-3, and is called the sequence C3.
And 4, step 4: for example, in the activation factor graph 17-4, the first half part of the sequence C3 and the sequence C2 are subjected to XOR to obtain a sequence X which is called a sequence C4; this process corresponds to the third variable node in column 1 of the activation factor graph 17-4: since the variable node is the freeze bit, the sequence C4 is set to 0.
And 5: for example, in the activation factor graph 17-5, the sequence C4 and the sequence C3 are subjected to XOR to obtain a sequence 1, and the third variable node corresponding to the 2 nd column in the activation factor graph 17-5, namely the sequence C2, is updated to be a sequence {1,1 }.
Step 6: for example, in the activation factor graph 17-6, the sequence C2 is XOR-ed with the first half of the sequence C1 to obtain the sequence { x, x }, which is called the sequence C5: corresponding to the first two variable nodes in column 2 of the activation factor graph 17-6.
And 7: for example, in FIG. 17-7, the second half X of the sequence C5 is taken to correspond to the second variable node in column 1 of the activation factor graph 17-7: since the variable node corresponds to an information bit, it is set to uncoded information 1 to be transmitted, referred to as sequence C6.
And 8: performing exclusive or on the sequence C6 and the first half part of the sequence C5 to obtain a sequence X which is called a sequence C7; this process corresponds to the first variable node in column 1 of the activation factor graph 17-8: since the variable node is a freeze bit, C7 is set to 0.
And step 9: the second half of C5 is set as sequence C6, and the first half of sequence C5 is set as the result of XOR between sequence C6 and sequence C7: i.e., sequence C5 is updated to 1, 1.
Step 10: setting the second half part of the sequence C1 as the sequence C2, and setting the first half part of the sequence C1 as the result after XOR of the sequence C2 and the sequence C5: i.e., C1 is updated to 0,0,1, 1.
Step 11: and outputting the coded bit sequence {0,0,1,1} by the coding mode.
When part or all of the channel coding method of the above embodiment is implemented by software, an encoding apparatus may also be provided for the above encoding process, and the apparatus may include a processor, where the processor completes the above encoding process; when implemented by hardware, the present embodiment may also provide an encoding apparatus, including: the input interface circuit is used for receiving K information bits to be coded, wherein K is more than or equal to 1 and is an integer; a logic circuit for implementing the channel coding method; and the output interface circuit is used for outputting the coded bit sequence. In a specific implementation, the encoding device may be a chip or an integrated circuit. The embodiment of the invention also provides an encoding device, which comprises a processor and a memory, wherein the memory is used for storing the program instructions; the processor is configured to execute the program stored in the memory, and when the program is executed, the processor is configured to execute the above channel coding method.
Further, the memory may be a physically separate unit or may be integrated with the processor, and in an alternative embodiment, the memory is located outside the encoding device, and the encoding device is connected to the memory through a circuit/wire, and is used for reading and executing the program stored in the memory.
Another encoding apparatus provided in an embodiment of the present invention may include: the device comprises a processor and a transceiver, wherein the transceiver is used for receiving K information bits to be coded; and sending the coded bit sequence, wherein K is more than or equal to 1 and is an integer; the processor is configured to perform the above-described channel coding method.
Another encoding apparatus provided in the embodiment of the present invention may include a plurality of encoding units, and each encoding process of the channel encoding method is completed by each encoding unit.
Based on the description of the various embodiments described above, the encoding apparatus described above may be a network device or a terminal device (e.g., terminal device #1 or terminal device #2) shown in fig. 1. Specifically, in uplink transmission, the encoding apparatus is specifically a terminal device, for example, a user equipment UE, and the terminal device has a function of implementing the channel encoding method described in each of the above embodiments. In downlink transmission, the coding apparatus is specifically a network device, for example, a base station. The terminal device or the network device has a function of implementing the channel coding method described in each of the above embodiments. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.
In addition, optionally, in order to further improve the function of the encoding apparatus, the encoding apparatus may further include one or more of an input unit, a display unit, an audio circuit (not shown in the figure), a camera, a sensor, and the like, and the audio circuit may further include a speaker, a microphone, and the like.
Optionally, based on the channel coding method provided in the foregoing embodiments, another embodiment of the present invention further provides a decoding method, as shown in fig. 13, where the method includes:
s1300, the receiving end (decoding side) receives the information bits to be decoded.
S1302, the receiving end decodes according to a decoding algorithm, and obtains information bits according to the positions of the information bits in the code map after the decoding is finished.
The decoding algorithm may be a serial cancellation decoding algorithm or a serial cancellation list decoding algorithm.
The decoding operation at the decoding end in the embodiment of the present application is roughly: and after receiving the information bits to be decoded, decoding according to a decoding algorithm, and after decoding is finished, obtaining the information bits according to the positions of the information bits in the code map.
For the above method for determining the position of the information bit in the code map and the description of the code map, please refer to the description of the embodiments corresponding to fig. 3-6, which is not repeated herein.
Further, based on the same inventive concept of the decoding method provided in the foregoing embodiment, as shown in fig. 14, an embodiment of the present application further provides a decoding apparatus 1400, where the decoding apparatus 1400 is configured to perform the decoding method. The decoding device specifically includes an obtaining module 1401, configured to obtain a bit sequence of information to be decoded; the decoding module 1402 is configured to perform decoding according to a decoding algorithm, and obtain information bits according to positions of the information bits in the encoded map after the decoding is completed.
Some or all of the above decoding methods may be implemented by hardware or software, and when implemented by hardware, the decoding apparatus 1500 includes: an input interface circuit 1501 for acquiring a bit sequence to be decoded; a logic circuit 1502 for performing the above decoding method; the output interface circuit 1503 outputs the decoded sequence.
Optionally, the decoding apparatus 1500 may be a chip or an integrated circuit when implemented.
Optionally, when part or all of the decoding method of the foregoing embodiment is implemented by software, as shown in fig. 16, the decoding apparatus 1600 includes: a memory 1601 for storing a program; the processor 1602 is configured to execute the program stored in the memory 1601, and when the program is executed, the decoding apparatus 1600 may implement the decoding method provided in the foregoing embodiments.
Alternatively, the memory 1601 may be a physically separate unit or may be integrated with the processor 1602.
Alternatively, when part or all of the decoding method of the above embodiments is implemented by software, the decoding apparatus 1500 may only include the processor 1602. The memory 1601 for storing programs is located outside the decoding device 1600, and the processor 1602 is connected to the memory 1601 through a circuit/wire for reading and executing the programs stored in the memory 1601.
The processor 1602 may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.
The processor 1602 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.
The memory 1601 may include volatile memory (volatile memory), such as random-access memory (RAM); the memory 1601 may also include a non-volatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory 1601 may also include a combination of the above kinds of memories.
An embodiment of the present application further provides a computer storage medium storing a computer program, where the computer program includes instructions for executing the encoding method shown in fig. 3 and the decoding method provided in fig. 13 in the foregoing embodiment.
Embodiments of the present application also provide a computer program product containing instructions, which when run on a computer, cause the computer to execute the decoding method shown in fig. 13.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if such modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to encompass such modifications and variations.

Claims (27)

1. A method of channel coding, comprising:
obtaining a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure FDA0003113018570000011
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure FDA0003113018570000012
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure FDA0003113018570000015
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1；
Transmitting the bit sequence X1 N。
2. The method of claim 1, wherein the step of applying the coating comprises applying a coating to the substrate
Figure FDA0003113018570000016
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
3. The method of claim 1, wherein D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C1 NIs according to the coding pattern
Figure FDA0003113018570000017
And carrying out polarization coding to obtain a bit sequence.
4. The method according to any of claims 1-3, wherein the layer position index set M comprises: from layer 1 to (log)mN-1) any one of the layers.
5. A method according to any one of claims 1-3, wherein the set of layer position indices M is determined from the set of row position indices H.
6. An encoding apparatus, comprising:
the input interface circuit is used for acquiring K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
logic circuit for generating a bit sequence X1 NSaid X is 1 N＝D1 NFNWherein, FNIs an N × N matrix, and
Figure FDA0003113018570000013
FNis log of2N matrices F2The kronecker product of (a-c),
Figure FDA0003113018570000014
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure FDA0003113018570000018
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bit in the coding chart and the row position index set H of the information bit in the coding chartLayer position index set M, H is more than or equal to 0 and less than or equal to N, 0<M≤logmN-1；
An output interface circuit for outputting the bit sequence X1 N。
7. The encoding apparatus of claim 6, wherein the logic circuit is further configured to generate a bit sequence
Figure FDA0003113018570000021
The above-mentioned
Figure FDA0003113018570000022
The method comprises the following steps: the above-mentioned
Figure FDA0003113018570000023
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, wherein the K information bits to be coded are placed at positions corresponding to a 0-th row position index set H in the coding graph.
8. The encoding apparatus of claim 6, wherein the logic circuit is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C1 NIs according to the coding pattern
Figure FDA0003113018570000024
And carrying out polarization coding to obtain a bit sequence.
9. The encoding apparatus according to any one of claims 6-8, wherein the layer position index set M comprises: from layer 1 to logm N-1 layer of any of the above.
10. The encoding apparatus according to any one of claims 6-8, wherein the layer position index set M is determined according to the row position index set H.
11. An encoding apparatus, characterized in that the apparatus comprises:
a processor for generating a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure FDA0003113018570000025
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure FDA0003113018570000026
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure FDA0003113018570000027
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0 <M≤logmN-1。
12. The encoding apparatus of claim 11, wherein the processor is further configured to generate a bit sequence
Figure FDA0003113018570000029
The above-mentioned
Figure FDA00031130185700000210
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
13. The encoding apparatus of claim 11, wherein the processor is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C1 NIs according to the coding pattern
Figure FDA0003113018570000028
And carrying out polarization coding to obtain a bit sequence.
14. The encoding apparatus according to any one of claims 11-13, wherein the layer position index set M comprises: from layer 1 to (log)mN-1) any one of the layers.
15. The encoding apparatus according to any one of claims 11-13, wherein the layer position index set M is determined according to the row position index set H.
16. An encoding apparatus, characterized in that the apparatus comprises:
a memory for storing program instructions;
A processor for executing the program stored in the memory, for generating a bit sequence X when the program is executed1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure FDA0003113018570000031
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure FDA0003113018570000032
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded1 NA bit sequence obtained after encoding, said
Figure FDA0003113018570000033
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is larger than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer larger than 1, wherein the positions of the K information bits to be coded in a code pattern with a mother code length of N comprise: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1。
17. The encoding apparatus of claim 16, wherein the processor is further configured to generate a bit sequence
Figure FDA0003113018570000034
The above-mentioned
Figure FDA0003113018570000035
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
18. The encoding apparatus of claim 16, wherein the processor is further configured to generate a bit sequence D1 ND is said to1 NThe method comprises the following steps: bit sequence C1 NA bit corresponding to a row position index set H in the coding diagram and a fixed bit, and the bit sequence C1NIs according to the coding pattern
Figure FDA0003113018570000036
And carrying out polarization coding to obtain a bit sequence.
19. The encoding apparatus according to any one of claims 16-18, wherein the layer position index set M comprises: from layer 1 to (log)mN-1) any one of the layers.
20. The encoding apparatus according to any one of claims 16-18, wherein the layer position index set M is determined according to the row position index set H.
21. An encoding apparatus, comprising:
the receiving unit is used for acquiring K information bits to be coded, wherein K is more than or equal to 1 and is an integer;
a coding unit for generating a bit sequence X1 NSaid X is1 N＝D1 NFNWherein F isNIs an N × N matrix, and
Figure FDA0003113018570000037
FNis log2N matrices F2The kronecker product of (a) and (b),
Figure FDA0003113018570000038
n is the length of the mother code, D1 NAccording to the positions of K information bits to be coded in the code pattern whose mother code length is N, the input bit sequence u is coded 1 NA bit sequence obtained after encoding, said
Figure FDA0003113018570000039
The method comprises the following steps of generating N bit sequences according to K information bits to be coded, wherein K is more than or equal to 1 and is an integer, N is the integral power of m, and m is a positive integer which is more than 1, wherein the K information bits to be coded comprise, at the position of a code pattern with the mother code length of N: the row position index set H of the information bits in the coding graph and the layer position index set M of the information bits in the coding graph are equal to or more than 0 and equal to or less than N, and 0<M≤logmN-1；
A transmission unit for transmitting the bit sequence X1 N。
22. The encoding apparatus of claim 21, wherein the encoding unit is further configured to generate a bit sequence
Figure FDA0003113018570000041
The above-mentioned
Figure FDA0003113018570000042
The method comprises the following steps: the K information bits to be coded and N-K fixed bits, where the K information bits to be coded are placed at positions corresponding to a 0 th row position index set H in the code map.
23. The encoding apparatus of claim 21, wherein the encoding unit is further configured to generate a bit sequence D1 NSaid D is1 NThe method comprises the following steps: bit sequence C1 NThe bit and the fixed bit corresponding to the row position index set H in the code pattern, the bit sequence C 1 NIs according to the coding pattern
Figure FDA0003113018570000043
And carrying out polarization coding to obtain a bit sequence.
24. The encoding apparatus of any of claims 21-23, wherein the set of layer position indices M packetsComprises the following steps: from layer 1 to (log)mN-1) any one of the layers.
25. The encoding apparatus according to any one of claims 21-23, wherein the layer position index set M is determined according to the row position index set H.
26. The apparatus of claim 21, wherein the encoding apparatus is a base station or a terminal.
27. A coding system comprising: network equipment and terminal equipment, characterized in that the network equipment comprises an encoding device according to any one of claims 6-10; or, comprising an encoding device according to any one of claims 11-15; or, comprising an encoding device according to any one of claims 16-20; or, comprising an encoding device according to any one of claims 21-26; alternatively, the first and second electrodes may be,
the terminal device comprises any one of the encoding apparatus of claims 6-10; or, comprising an encoding device according to any one of claims 11-15; or, comprising an encoding device according to any one of claims 16-20; or, comprising an encoding device according to any one of claims 21-26.
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