CN110011533A - Voltage-multiplying circuit unit, multistage voltage-multiplying circuit and its control method and storage medium - Google Patents
Voltage-multiplying circuit unit, multistage voltage-multiplying circuit and its control method and storage medium Download PDFInfo
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- CN110011533A CN110011533A CN201910296954.4A CN201910296954A CN110011533A CN 110011533 A CN110011533 A CN 110011533A CN 201910296954 A CN201910296954 A CN 201910296954A CN 110011533 A CN110011533 A CN 110011533A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/007—Plural converter units in cascade
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Abstract
This application discloses a kind of voltage-multiplying circuit unit, multistage voltage-multiplying circuit and its control method and storage mediums, voltage-multiplying circuit unit includes the first branch and second branch, there are at least two first switching elements in the first branch, there are at least two second switch elements in second branch；Sequence signal generator, for generating multiple First ray signals, multiple second sequence signals, third sequence signal, the 4th sequence signal and the 5th sequence signal；First ray signal is used to carry out on-off control to each first switching element；Second sequence signal is used to carry out on-off control to each second switch element；First ray signal and the second sequence signal reverse phase；Third sequence signal is used to be aligned each First ray signal sequence；4th sequence signal is used to be aligned each second sequence signal timing.Above scheme allows each switch high-frequency rate to act, and ensure that the high symmetry of different branch upper switch in single-stage voltage doubling unit.
Description
Technical field
The present invention relates generally to voltage-multiplying circuit technical fields, and in particular to a kind of voltage-multiplying circuit unit, multistage voltage-multiplying circuit
And its control method and storage medium.
Background technique
Voltage-multiplying circuit is the purpose for realizing circuit boosting.Generally, multistage voltage-multiplying circuit is realized by " switch and capacitor ", switch
Such as, but not limited to triode.Every level-one voltage-multiplying circuit includes 4 boosted switch, has 1 switching between two-stage voltage-multiplying circuit
Switch.Application processor (Application Processor can be passed through；Abbreviation AP), through universal input/output (General
Purpose Input Output；Abbreviation GPIO) interface control swith movement.In general, when realizing N grades of multiplication of voltages, the number of GPIO
Range is measured between 2N-1~5N-1.Ideally, the switch of a wherein branch for every grade of voltage-multiplying circuit occupies a GPIO,
Another road signal is generated by phase inverter, is not take up GPIO resource.
In multistage voltage-multiplying circuit, multistage multiplication of voltage switch motion is responsible for by AP as core processing unit, carries out to GPIO
Its non-main task of timing control, modification of program is time-consuming and laborious, and when energy storing of switch requires high to movement comment, multichannel GPIO
Frequent movement, needs to adjust temporal constraint/path delay of existing program, or even can change software architecture.
Summary of the invention
In view of drawbacks described above in the prior art or deficiency, it is intended to provide a kind of voltage-multiplying circuit unit, multistage voltage-multiplying circuit
And its control method and storage medium, it split can put the discrete control of row into, switch high-frequency rate is allowed to act, and guarantee at different levels times
The high symmetry of volt circuit unit difference path upper switch key.
In a first aspect, the present invention provides a kind of voltage-multiplying circuit unit, including the first branch and second branch, in the first branch
With at least two first switching elements, there are at least two second switch elements in second branch；
Sequence signal generator, for generating multiple First ray signals, multiple second sequence signals, third sequence letter
Number, the 4th sequence signal and the 5th sequence signal, wherein third sequence signal, the 4th sequence signal and the 5th sequence signal are
Correction signal；
First ray signal is used to carry out one-to-one on-off control to first switching element；
Second sequence signal is used to carry out one-to-one on-off control to second switch element；
First ray signal and the second sequence signal reverse phase；
Third sequence signal is used to carry out each First ray signal the correction of timing alignment；
4th sequence signal is used to carry out each second sequence signal the correction of timing alignment；
5th sequence signal is used to carry out First ray signal and the second sequence signal the correction of timing alignment.
Further, sequence signal generator further includes correction unit, and correction unit is configured to:
Logical AND or inverse are carried out to First ray signal using third sequence signal, so that third sequence signal
Each rising edge of a pulse/failing edge is aligned with the respective pulses of First ray signal rising edge/failing edge；
Logical AND or inverse are carried out to the second sequence signal using the 4th sequence signal, so that the 4th sequence signal
The respective pulses rising edge of each the second sequence signal of rising edge of a pulse/failing edge/failing edge alignment；
Logical AND or inverse are carried out to First ray signal and the second sequence signal using the 5th sequence signal, so that
Each rising edge of a pulse/the failing edge and First ray signal of 5th sequence signal and the respective pulses of the second sequence signal rise
The alignment of edge/failing edge.
Further, First ray signal and the second sequence signal use square-wave pulse signal, third sequence signal, the 4th
Sequence signal and the 5th sequence signal use spike signal.
Further, the pulse spacing of First ray signal and the second sequence signal is a switch clock period, third
The pulse spacing of sequence signal and the 4th sequence signal is n switch clock period, and the pulse spacing of the 5th sequence signal is 2n
In a switch clock period, wherein n is the natural number greater than 2.
Second aspect, the present invention provides a kind of voltage-multiplying circuit unit control method, for the switch to voltage-multiplying circuit unit
Element carries out on-off control, and voltage-multiplying circuit unit includes the first branch and second branch, has at least two the in the first branch
One switch element has at least two second switch elements in second branch,
Sequence signal generator after obtaining enable signal, generate multiple First ray signals, multiple second sequence signals,
Third sequence signal, the 4th sequence signal and the 5th sequence signal, wherein third sequence signal, the 4th sequence signal and the 5th sequence
Column signal is correction signal；
First ray signal is used to carry out one-to-one on-off control to first switching element；
Second sequence signal is used to carry out one-to-one on-off control to second switch element；
First ray signal and the second sequence signal reverse phase；
Third sequence signal is used to carry out each First ray signal the correction of timing alignment；
4th sequence signal is used to carry out each second sequence signal the correction of timing alignment；
5th sequence signal is used to carry out First ray signal and the second sequence signal the correction of timing alignment.
Further, third sequence signal is used to carry out each First ray signal the correction of timing alignment；4th sequence
Signal is used to carry out each second sequence signal the correction of timing alignment；5th sequence signal is used for First ray signal and the
The correction of two sequence signals progress timing alignment respectively include:
Logical AND or inverse are carried out to First ray signal using third sequence signal, so that third sequence signal
Each rising edge of a pulse/failing edge is aligned with the respective pulses of First ray signal rising edge/failing edge；
Logical AND or inverse are carried out to the second sequence signal using the 4th sequence signal, so that the 4th sequence signal
The respective pulses rising edge of each the second sequence signal of rising edge of a pulse/failing edge/failing edge alignment；
Logical AND or inverse are carried out to First ray signal and the second sequence signal using the 5th sequence signal, so that
Each rising edge of a pulse/the failing edge and First ray signal of 5th sequence signal and the respective pulses of the second sequence signal rise
The alignment of edge/failing edge.
The third aspect, the present invention provides a kind of multistage voltage-multiplying circuit, including multiple sequentially connected above-mentioned voltage-multiplying circuits
The output end of unit, previous stage voltage-multiplying circuit unit is connect with the input terminal of rear stage voltage-multiplying circuit unit；
The output end of previous stage voltage-multiplying circuit unit, which is also connected with, to rear stage voltage-multiplying circuit unit to carry out making can control
Feedback unit.
Further, feedback unit is from previous stage to the switching device of rear stage one-way conduction or circuit.
Further, the switching frequency of previous stage voltage-multiplying circuit unit is the switching frequency of rear stage voltage-multiplying circuit unit
Twice or more.
Fourth aspect, the present invention provide a kind of computer readable storage medium, are stored thereon with computer program, computer
Above-mentioned method is realized when program is executed by processor.
In above scheme, discrete control is carried out to the switch of each branch road by First ray signal and the second sequence signal
System, each switch is mutually indepedent, and each switch high-frequency rate is allowed to act, in addition, passing through each First ray signal of third sequence signal
Timing alignment；4th sequence signal is aligned each second sequence signal timing；5th sequence signal is to First ray signal and
The alignment of two sequence signal timing, ensure that the high symmetry of different branch upper switch in single-stage voltage doubling unit.
Detailed description of the invention
By reading a detailed description of non-restrictive embodiments in the light of the attached drawings below, the application's is other
Feature, objects and advantages will become more apparent upon:
Fig. 1 is the schematic diagram of voltage-multiplying circuit unit provided in an embodiment of the present invention；
Fig. 2 is the timing diagram of single-stage voltage-multiplying circuit provided in an embodiment of the present invention；
Fig. 3 is the schematic diagram of multistage voltage-multiplying circuit provided in an embodiment of the present invention；
Fig. 4 is the timing diagram of two-stage voltage-multiplying circuit provided in an embodiment of the present invention.
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention, rather than the restriction to the invention.It also should be noted that in order to
Convenient for description, part relevant to invention is illustrated only in attached drawing.
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
As shown in Figure 1, only as the example of a voltage-multiplying circuit, being not pair it illustrates a kind of voltage-multiplying circuit
The restriction of voltage-multiplying circuit.There is also other types of attachment for voltage-multiplying circuit.
Voltage-multiplying circuit in the example includes first capacitor C1, and the first end of first capacitor C1 connects voltage input end VDD,
The second end of first capacitor C1 is grounded, and the first end of the second capacitor C2 is connected by the first end of switch SW1-1 and first capacitor C1
It connects, the second end of the second capacitor C2 is connect by switch SW2-1 with the first end of first capacitor C1, the second end of the second capacitor C2
It is grounded by switch SW1-2, the first end of the second capacitor C2 passes through switch SW2-2 connection voltage output end VDDH1 ', switch
Tie point between SW2-2 and voltage output end VDDH1 ' is grounded by capacitor C3.
Switch SW1-1, the second capacitor C2 and switch SW1-2 switch SW2-1, the second capacitor C2 and are opened as the first branch
SW2-2 is closed as second branch.When switch SW1-1, switch SW1-2 are closed, and switch SW2-1, switch SW2-2 are opened, electric current
B point is flowed to by a point, at this point, c point voltage=VDD；Then, switch SW1-1, switch SW1-2 are opened, switch SW2-1, switch
SW2-2 closure, electric current flow to a point by b point, at this point, b point voltage is VDD, due to the boot strap of capacitor, c point voltage=V
(C2)=2VDD.Wherein, C3 is used to maintain the voltage of c point.
Voltage-multiplying circuit unit provided in an embodiment of the present invention, including the first branch and second branch have in the first branch
At least two first switching elements have at least two second switch elements in second branch；Sequence signal generator, for giving birth to
At multiple First ray signals, multiple second sequence signals, third sequence signal, the 4th sequence signal and the 5th sequence signal,
Wherein third sequence signal, the 4th sequence signal and the 5th sequence signal are correction signal；It see also Fig. 2, First ray letter
Number identical as first switching element quantity, First ray signal is used to carry out one-to-one on-off control to first switching element；
Second sequence signal is identical as second switch number of elements, and the second sequence signal is used to carry out second switch element one-to-one
On-off control；First ray signal and the second sequence signal reverse phase；Third sequence signal is used to carry out each First ray signal
Timing alignment correction；4th sequence signal is used to carry out each second sequence signal timing alignment correction；5th sequence signal is used
It is corrected in carrying out timing alignment to First ray signal and the second sequence signal.
Such as, but not limited to, the voltage-multiplying circuit unit in the present embodiment can use above-mentioned voltage-multiplying circuit, wherein switching
SW1-1, the second capacitor C2 and switch SW1-2 are as the first branch, and switch SW2-1, the second capacitor C2 and switch SW2-2 are as
Two branches.Switch SW1-1, switch SW1-2 are first switching element, and switch SW2-1, switch SW2-2 are second switch element,
It can be using triode, metal-oxide-semiconductor etc..By the First ray signal difference control switch SW1-1 and switch of two identical timing
SW1-2 synchronization action, i.e., one of First ray Signal-controlled switch SW1-1 movement, another First ray signal control are opened
SW1-2 movement is closed, control switch SW2-1 and switch SW2-2 synchronization action are distinguished by the second sequence signal of two identical timing,
That is one of them second sequence signal control switch SW2-1 movement, another second sequence signal control switch SW2-2 movement.Its
In, high level representation switch closure, low level indicates that switch is opened.It is understood that in practical application, it can be according to use
Switching tube type determines that switch control signal is that high level is effective or low level is effective.
First ray signal and the second sequence signal are inversion signal, and third sequence signal ensure that each First ray letter
The alignment of number timing, the 4th sequence signal ensure that each second sequence signal timing alignment, and the 5th sequence signal ensure that the first sequence
Column signal and the alignment of the second sequence signal timing, then when each first switching element is closed, each second switch element is disconnected；And it is each
When second switch element is closed, each first switching element is disconnected, and ensure that the height of different branch upper switch in single-stage voltage doubling unit
Symmetry.
S-LEVEL1 indicates enable signal in Fig. 2, and SW1-1 indicates the First ray signal of control switch SW1-1 movement；
SW1-2 indicates the First ray signal of control switch SW1-2 movement；SW2-1 indicates the second sequence of control switch SW2-1 movement
Signal；SW2-2 indicates the second sequence signal of control switch SW2-2 movement；TJ1Indicate third sequence signal；TJ12Indicate the 5th
Sequence signal；TJ2Indicate the 4th sequence signal.
The mode of sequence signal timing alignment has a variety of.In the present embodiment, each First ray is believed by logical operation
Number carry out the correction of timing alignment, it can be understood as, third sequence signal is as correction signal, and it is effective to be set as high level,
As shown in Figure 2.Each First ray signal and third sequence signal carry out "or" logical operation, then every group in each First ray signal
The rising edge of the 4th pulse, the 8th pulse of sequence works simultaneously from the rising edge of a pulse of third sequence signal, realizes
Each rising edge of a pulse of third sequence signal is aligned with the rising edge of a pulse of corresponding First ray signal.As shown in Fig. 2, the
Each group of sequence includes 8 pulses in one sequence signal.The alignment correction of second sequence signal timing is same reason.First sequence
Column signal and the second sequence signal are inversion signals, then when carrying out timing alignment by the 5th sequence signal, are respectively adopted as follows
Logical operation carry out timing alignment.Each First ray signal and the 5th sequence signal carry out "or" logical operation, then and each first
The rising edge of the 1st pulse of every group of sequence works simultaneously from the rising edge of a pulse of the 5th sequence signal in sequence signal, real
Each rising edge of a pulse of the 5th sequence signal and the respective pulses rising edge alignment of First ray signal are showed.
Each second sequence signal carries out "AND" logical operation with the 5th sequence signal after logical not operation has been executed, then
The failing edge of 1st pulse of every group of each second sequence signal works simultaneously from the rising edge of a pulse of the 5th sequence signal,
The each rising edge of a pulse for realizing the 5th sequence signal is aligned with the respective pulses failing edge of the second sequence signal
It should be noted that the spike position of each correction signal can be set in the failing edge for being corrected pulse or
Rising edge, here without limitation.Wherein, logical operation according to apply needs, can be used individually with or it is non-, with it is non-or non-
Operation, or using wherein several combinatorial operations, here without limitation.
In addition when software realization, such as, but not limited to, can believe using to First ray signal and the second sequence
Number by the way of non-obstruction assignment, to third sequence signal, the 4th sequence signal, the 5th sequence signal using obstruction assignment
Mode.
Further, sequence signal generator is programmable logic device (Programmable Logic Device；Letter
Claim PLD), Complex Programmable Logic Devices (Complex Programmable Logic Device；Abbreviation CPLD) or scene can
Program gate array (Field-Programmable Gate Array；Abbreviation FPGA).
The timing requirements that FPGA can be acted according to each branch switch, carry out programming in logic, Lai Shixian FPGA's is defeated in advance
Sequence signal of the exit port to each branch switch by required timing requirements output for control.PLD and CPLD are similar with FPGA,
Which is not described herein again.
Further, the pulse spacing of First ray signal and the second sequence signal is a switch clock period, third
The pulse spacing of sequence signal and the 4th sequence signal is n switch clock period, and the pulse spacing of the 5th sequence signal is 2n
In a switch clock period, wherein n is the natural number greater than 2.Fig. 2 show a specific embodiment, wherein third sequence letter
Number and pulse spacing of the 4th sequence signal be 4 switch clock periods, when pulse spacing of the 5th sequence signal is 8 switches
The clock period.
In the present embodiment, it is that high level comes into force that enable signal S-level1, which comes into force, and level rises to high electricity by low level
Usually effectively, and can be made by holding circuit in normal operation level be constantly in high level.
First ray signal and the second sequence signal are square-wave pulse signal, since the low and high level of square wave respectively accounts for half
The switch clock period, therefore can guarantee the high symmetry of different branch upper switch in single-stage voltage doubling unit.Third sequence signal,
4th sequence signal and the 5th sequence signal are spike signal, and specifically, waveform may each be pulse width less than upper
The rectangular wave of square-wave pulse width is stated, and the width of pulse as needed is adjustable.It should be noted that wherein First ray signal
It can be generated by a clock with the square-wave pulse of the second sequence signal；Third sequence signal, the 4th sequence signal and the 5th sequence
The spike of signal can accurately clock generates relatively by another.It is understood that the generation of above-mentioned clock is available
The crystal oscillator that CPLD/FPGA is internally integrated obtains, or is generated by external crystal-controlled oscillation.
Further, the embodiment of the present invention also provides a kind of voltage-multiplying circuit unit control method, for voltage-multiplying circuit list
The switch element of member carries out on-off control, and voltage-multiplying circuit unit includes the first branch and second branch, has extremely in the first branch
Lack two first switching elements, there are at least two second switch elements in second branch, sequence signal generator is made
Multiple First ray signals, multiple second sequence signals, third sequence signal, the 4th sequence signal and the can be generated after signal
Five sequence signals, wherein third sequence signal, the 4th sequence signal and the 5th sequence signal are correction signal；First ray letter
Number for carrying out one-to-one on-off control to first switching element；Second sequence signal is used to carry out one to second switch element
On-off control to one；First ray signal and the second sequence signal reverse phase；Third sequence signal is used to believe each First ray
Number carry out timing alignment correction；4th sequence signal is used to carry out each second sequence signal timing alignment correction；5th sequence
Signal is used to carry out First ray signal and the second sequence signal timing alignment correction.
Since First ray signal and the second sequence signal are inversion signal, and third sequence signal ensure that each first sequence
The alignment of column signal timing, the 4th sequence signal ensure that the alignment of each second sequence signal timing, and the 5th sequence signal ensure that the
One sequence signal and the alignment of the second sequence signal timing, then when each first switching element is closed, each second switch element is disconnected；
And when each second switch element closure, each first switching element disconnects, and ensure that different branch upper switch in single-stage voltage doubling unit
High symmetry.
Further, third sequence signal is used to carry out each First ray signal the correction of timing alignment；4th sequence
Signal is used to carry out each second sequence signal the correction of timing alignment；5th sequence signal is used for First ray signal and the
The correction of two sequence signals progress timing alignment respectively include:
Logical AND or inverse are carried out to First ray signal using third sequence signal, so that First ray signal
It is aligned in rising edge of a pulse/failing edge with the respective pulses of third sequence signal rising edge/failing edge；
Logical AND or inverse are carried out to the second sequence signal using the 4th sequence signal, so that the second sequence signal
It is aligned in rising edge/failing edge of pulse with respective pulses rising edge/failing edge of the 4th sequence signal；
Logical AND or inverse are carried out to First ray signal and the second sequence signal using the 5th sequence signal, so that
Number respective pulses in rising edge of a pulse/failing edge of First ray signal and the second sequence signal with the 5th sequence letter rise
The alignment of edge/failing edge.
In another aspect, see also shown in Fig. 3, the embodiment of the present invention provides a kind of multistage voltage-multiplying circuit, including it is multiple sequentially
The above-mentioned voltage-multiplying circuit unit of connection, sequence signal generator are used to carry out on-off control to the switch of voltage-multiplying circuits at different levels,
The output end of previous stage voltage-multiplying circuit unit is connect with the input terminal of rear stage voltage-multiplying circuit unit；Previous stage voltage-multiplying circuit unit
Output end be also connected with the feedback unit (Feedback) for making can control carried out to rear stage voltage-multiplying circuit unit, show in Fig. 3
First order voltage-multiplying circuit unit 31 and afterbody voltage-multiplying circuit unit 32 are gone out, voltage-multiplying circuit unit principles at different levels are identical, can
Referring to the description of above-described embodiment.The voltage output end VDDH1 of afterbody voltage-multiplying circuit unit 32 is also connected with two ground connection
Capacitor C4, CJ1 and two concatenated resistance R1, R2, connect a voltage output grade VDDH between resistance R1, R2.
By the way that feedback unit is arranged, so that being associated between front and back stages, one side can be worked normally in circuit
When compole between it is synchronous, can also be interrupted in time when circuit abnormality works, for example, rear stage voltage-multiplying circuit unit whether work
Make, is controlled by previous stage voltage-multiplying circuit unit, only in the normal situation of previous stage voltage-multiplying circuit cell operation, rear stage times
Volt circuit unit just works, and effective interrupt routine and can evade high pressure in this way and damages other devices.
Further, feedback unit is from previous stage to the switching device of rear stage one-way conduction or circuit.Switching device
Such as can be diode, the anode of diode is connect with the output end of previous stage voltage-multiplying circuit unit, cathode and rear stage times
The input terminal of volt circuit unit connects.Cathode is also connect with an external voltage.Specifically, defeated when previous stage voltage-multiplying circuit unit
When the normal multiplication of voltage value of outlet VDDH1' is 4v, which can be used 3.9V.At this point, when previous stage voltage-multiplying circuit unit
When output is not stabilized to the voltage of 3.9V or more, which is not turned on, and rear stage voltage-multiplying circuit unit can not work；When previous
When the output of grade voltage-multiplying circuit unit is stabilized to 4V, diode conducting, rear stage voltage-multiplying circuit unit is started to work.Outside this
The occurrence of voltage is according to the electric conduction of normal the multiplication of voltage value and diode of the output end VDDH1' of previous stage voltage-multiplying circuit unit
Pressure value determines, will not enumerate here.Further, it is also possible to the circuit that one-way conduction may be implemented is selected as needed, it should
Circuit can be existing circuit, does not constitute repeat to it here.
Further, in order to guarantee that there is the sufficient charge and discharge time between front stage, then previous stage voltage-multiplying circuit unit
Switching frequency, be twice or more of the switching frequency of rear stage voltage-multiplying circuit unit.
For example, the present embodiment is illustrated by taking two-stage voltage-multiplying circuit unit as an example, and referring to fig. 4, first order voltage-multiplying circuit list
The switching frequency of member is 2 times of second level voltage-multiplying circuit unit switch frequency.As to its arteries and veins in the voltage-multiplying circuit unit of the second level
The third sequence signal of punching and the pulse spacing of the 4th sequence signal equally may be configured as 4 switch clock periods of the grade, and the 5th
The pulse spacing of sequence signal is similarly 8 switch clock periods of the grade.That is, voltage-multiplying circuit cellular constructions at different levels are unified,
It can correspond to same program module on controlling, it is only necessary to this unique Transfer Parameters of switching frequency be arranged, while passing through the overall situation
Interval coefficient is arranged in variable, and the unified check point for modifying voltage-multiplying circuit unit adjusts the width of each alignment pulse by local variable
Degree, to be precisely controlled the alignment (namely synchronous) of corresponding sequence signal.Timing relative loose between voltage-multiplying circuit units at different levels, no
It needs to carry out the alignment of sequence signal, therefore simplifies the sequential scheduling process of sequence signal generator, reduce resource occupation.
S-LEVEL1 indicates the enable signal of first order voltage-multiplying circuit unit in Fig. 3, and SW1-1 indicates control first order multiplication of voltage
The First ray signal of circuit unit switch SW1-1 movement；SW1-2 indicates control first order voltage-multiplying circuit unit switch SW1-2
The First ray signal of movement；SW2-1 indicates the second sequence letter of control first order voltage-multiplying circuit unit switch SW2-1 movement
Number；SW2-2 indicates the second sequence signal of control first order voltage-multiplying circuit unit switch SW2-2 movement；TJ1Indicate the first order times
The third sequence signal of volt circuit unit；TJ12Indicate the 5th sequence signal of first order voltage-multiplying circuit unit；TJ2Indicate the first order
4th sequence signal of voltage-multiplying circuit unit.S-LEVEL2 indicates the enable signal of second level voltage-multiplying circuit unit, SW1-1 ' table
Show the First ray signal of control second level voltage-multiplying circuit unit switch SW1-1 movement；SW1-2 ' indicates control second level multiplication of voltage
Second sequence signal of circuit unit switch SW1-2 movement；SW2-1 ' indicates control second level voltage-multiplying circuit unit switch SW2-1
Second sequence signal of movement；SW2-2 ' indicates the second sequence letter of control second level voltage-multiplying circuit unit switch SW2-2 movement
Number；TJ1’Indicate the third sequence signal of second level voltage-multiplying circuit unit；TJ12’Indicate the 5th sequence of second level voltage-multiplying circuit unit
Column signal；TJ2’Indicate the 4th sequence signal of second level voltage-multiplying circuit unit.
As another aspect, present invention also provides a kind of computer readable storage medium, the computer-readable storage mediums
Matter can be computer readable storage medium included in device described in above-described embodiment；It is also possible to individualism, not
The computer readable storage medium being fitted into equipment.Computer-readable recording medium storage has one or more than one journey
Sequence, described program are used to execute the voltage-multiplying circuit unit controlling party for being described in the application by one or more than one processor
Method.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.Those skilled in the art
Member is it should be appreciated that invention scope involved in the application, however it is not limited to technology made of the specific combination of above-mentioned technical characteristic
Scheme, while should also cover in the case where not departing from the inventive concept, it is carried out by above-mentioned technical characteristic or its equivalent feature
Any combination and the other technical solutions formed.Such as features described above has similar function with (but being not limited to) disclosed herein
Can technical characteristic replaced mutually and the technical solution that is formed.
Claims (10)
1. a kind of voltage-multiplying circuit unit, which is characterized in that including the first branch and second branch, have extremely in the first branch
Lack two first switching elements, there are at least two second switch elements in the second branch；
Sequence signal generator, for generating multiple First ray signals, multiple second sequence signals, third sequence signal,
Four sequence signals and the 5th sequence signal, wherein the third sequence signal, the 4th sequence signal and the 5th sequence signal are
Correction signal；
The First ray signal is used to carry out one-to-one on-off control to the first switching element；
Second sequence signal is used to carry out one-to-one on-off control to the second switch element；
The First ray signal and the second sequence signal reverse phase；
The third sequence signal is used to carry out each First ray signal the correction of timing alignment；
4th sequence signal is used to carry out each second sequence signal the correction of timing alignment；
5th sequence signal is used to carry out the First ray signal and second sequence signal school of timing alignment
Just.
2. voltage-multiplying circuit unit according to claim 1, which is characterized in that the sequence signal generator further includes correction
Unit, the correction unit are configured to:
Logical AND or inverse are carried out to the First ray signal using the third sequence signal, so that the third sequence
Each rising edge of a pulse/failing edge of column signal is aligned with respective pulses rising edge/failing edge of the First ray signal；
Logical AND or inverse are carried out to second sequence signal using the 4th sequence signal, so that the 4th sequence
The respective pulses rising edge of second sequence signal described in each rising edge of a pulse/failing edge of column signal/failing edge alignment；
Logical AND or inverse are carried out to the First ray signal and second sequence signal using the 5th sequence signal,
So that each rising edge of a pulse/failing edge of the 5th sequence signal and the First ray signal and second sequence signal
Respective pulses rising edge/failing edge alignment.
3. voltage-multiplying circuit unit according to claim 1 or 2, which is characterized in that the First ray signal and described the
Two sequence signals use square-wave pulse signal, the third sequence signal, the 4th sequence signal and the 5th sequence letter
Number use spike signal.
4. voltage-multiplying circuit unit according to claim 3, which is characterized in that the First ray signal and second sequence
The pulse spacing of column signal is a switch clock period, between the pulse of the third sequence signal and the 4th sequence signal
It is divided into n switch clock period, the pulse spacing of the 5th sequence signal is 2n switch clock period, and wherein n is greater than 2
Natural number.
5. a kind of voltage-multiplying circuit unit control method carries out on-off control for the switch element to voltage-multiplying circuit unit, described
Voltage-multiplying circuit unit includes the first branch and second branch, has at least two first switching elements, institute in the first branch
Stating has at least two second switch elements in second branch, which is characterized in that
Sequence signal generator generates multiple First ray signals, multiple second sequence signals, third after obtaining enable signal
Sequence signal, the 4th sequence signal and the 5th sequence signal, wherein the third sequence signal, the 4th sequence signal and the 5th sequence
Column signal is correction signal；
The First ray signal is used to carry out one-to-one on-off control to the first switching element；
Second sequence signal is used to carry out one-to-one on-off control to the second switch element；
The First ray signal and the second sequence signal reverse phase；
The third sequence signal is used to carry out each First ray signal the correction of timing alignment；
4th sequence signal is used to carry out each second sequence signal the correction of timing alignment；
5th sequence signal is used to carry out the First ray signal and second sequence signal school of timing alignment
Just.
6. voltage-multiplying circuit unit control method according to claim 5, which is characterized in that the third sequence signal is used for
The correction of timing alignment is carried out to each First ray signal；4th sequence signal is used to believe each second sequence
Number carry out timing alignment correction；5th sequence signal is used for the First ray signal and second sequence signal
Carry out timing alignment correction respectively include: using the third sequence signal to the First ray signal progress logical AND,
Or inverse, so that each rising edge of a pulse/failing edge of the third sequence signal is corresponding with the First ray signal
Rising edge of a pulse/failing edge alignment；
Logical AND or inverse are carried out to second sequence signal using the 4th sequence signal, so that the 4th sequence
The respective pulses rising edge of second sequence signal described in each rising edge of a pulse/failing edge of column signal/failing edge alignment；
Logical AND or inverse are carried out to the First ray signal and second sequence signal using the 5th sequence signal,
So that each rising edge of a pulse/failing edge of the 5th sequence signal and the First ray signal and second sequence signal
Respective pulses rising edge/failing edge alignment.
7. a kind of multistage voltage-multiplying circuit, which is characterized in that including multiple sequentially connected times as described in claim 1-4 is any
The input terminal of volt circuit unit, voltage-multiplying circuit unit described in the output end and rear stage of voltage-multiplying circuit unit described in previous stage connects
It connects；
The output end of voltage-multiplying circuit unit described in previous stage is also connected with the voltage-multiplying circuit unit described in rear stage and carries out enabled control
The feedback unit of system.
8. multistage voltage-multiplying circuit according to claim 7, which is characterized in that the feedback unit is from previous stage to latter
The switching device or circuit of grade one-way conduction.
9. multistage voltage-multiplying circuit according to claim 7 or 8, which is characterized in that voltage-multiplying circuit unit described in previous stage
Switching frequency is twice or more of the switching frequency of voltage-multiplying circuit unit described in rear stage.
10. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the computer program
The method as described in any one of claim 5-6 is realized when being executed by processor.
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| CN1212491A (en) * | 1997-09-22 | 1999-03-31 | 日本电气株式会社 | Semiconductor apparatus for use in low voltage power supply |
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Application publication date: 20190712 |