CN109993156B - Ultrasonic fingerprint identification panel and display device - Google Patents

Ultrasonic fingerprint identification panel and display device Download PDF

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Publication number
CN109993156B
CN109993156B CN201910337453.6A CN201910337453A CN109993156B CN 109993156 B CN109993156 B CN 109993156B CN 201910337453 A CN201910337453 A CN 201910337453A CN 109993156 B CN109993156 B CN 109993156B
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electrode
insulating layer
layer
fingerprint identification
ultrasonic fingerprint
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CN109993156A (en
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邸云萍
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to PCT/CN2020/079974 priority patent/WO2020215928A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • G06V40/1306Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing

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  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Image Input (AREA)
  • Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
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Abstract

The application discloses ultrasonic fingerprint identification panel and display device. Ultrasonic wave fingerprint identification panel, including grid insulation layer, grid, flat layer, source drain insulating layer, organic insulating layer, receiving electrode insulating layer, piezoelectric film layer, the driving electrode that sets gradually, still include: the first extraction electrode is arranged on the organic insulating layer and is connected with the source drain electrode through a first through hole; and the second extraction electrode is arranged on the receiving electrode insulating layer and is connected with the driving electrode through a second through hole.

Description

Ultrasonic fingerprint identification panel and display device
Technical Field
The present disclosure relates generally to the field of fingerprint identification sensors, and more particularly to an ultrasonic fingerprint identification panel and display device.
Background
The existing ultrasonic fingerprint identification device has two product forms, one is an ultrasonic fingerprint identification device prepared by a semiconductor process taking a silicon wafer as a substrate, and the other is an ultrasonic fingerprint identification device prepared by a low-temperature polysilicon process taking glass as a substrate, and the two have the common problems that:
1. the substrate is thick, even if the thickness of the glass substrate is about 0.1mm through the thinning process, and the yield is lost through the substrate thinning process. The substrate thickness causes the space occupied when the ultrasonic fingerprint identification device is attached to the display screen cover plate glass to be large, so that the product thickness is increased.
2. The substrate is thick and rigid, and is not suitable for being attached to an ultrathin and flexible display screen.
3. Current products are not suitable for creating large size panels.
Disclosure of Invention
In view of the above-mentioned drawbacks and deficiencies of the prior art, it is desirable to provide a thin and large-sized ultrasonic fingerprint identification panel and display device.
First aspect, an ultrasonic fingerprint identification panel, including grid insulation layer, grid, planarization layer, source drain insulating layer, organic insulation layer, receiving electrode insulating layer, piezoelectric film layer, the driving electrode that sets gradually, still includes:
the first extraction electrode is arranged on the organic insulating layer and is connected with the source and drain electrodes through a first through hole;
and the second extraction electrode is arranged on the receiving electrode insulating layer and is connected with the driving electrode through a second through hole.
In one or more embodiments of the present application, a side of the driving electrode facing away from the piezoelectric thin film layer is provided with a high-density metal layer.
In one or more embodiments of the present application, the receiving electrode and the second extraction electrode are spaced apart from each other, and the two are disposed in parallel and in the same layer on the receiving electrode insulating layer.
In one or more embodiments of the present application, the display device further includes a substrate, and the substrate is a flexible substrate.
In one or more embodiments of the present application, an inorganic insulating layer is disposed between the organic insulating layer and the receiving electrode insulating layer.
In one or more embodiments of the present application, the liquid crystal display device further includes an active layer, the active layer is disposed on a side of the gate insulating layer away from the gate, a third via hole is disposed between the active layer and the source/drain, and the third via hole and the first via hole are perpendicular to the substrate on a same line.
In one or more embodiments of the present application, the first lead electrodes are symmetrically disposed centering on the first via hole.
In one or more embodiments of the present application, the thickness of the organic insulating layer is greater than the thickness of the source-drain insulating layer.
In a second aspect, a display device is provided, which includes the ultrasonic fingerprint identification panel provided in the embodiments of the present application and a display panel attached to the ultrasonic fingerprint identification panel.
In one or more embodiments of the present application, a display panel has a flexible substrate base.
According to the technical scheme provided by the embodiment of the application, the plurality of the extraction electrodes are respectively arranged on different layers, so that the wiring density of the peripheral circuit caused by large size can be reduced. Further, according to some embodiments of the present application, by using a flexible substrate, the thickness of the entire fingerprint identification panel can be reduced, and an ultra-thin and bendable effect can be obtained.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1 illustrates an exemplary block diagram of an NMOS-based ultrasonic fingerprinting panel according to an embodiment of the application;
FIG. 2 illustrates an exemplary block diagram of a PMOS-based ultrasonic fingerprinting panel according to another embodiment of the present application;
FIG. 3 illustrates an exemplary flow chart of a method of manufacturing an NMOS based ultrasonic fingerprinting panel according to an embodiment of the present application;
FIG. 4 illustrates an exemplary flow chart of a method of manufacturing a PMOS-based ultrasonic fingerprinting panel according to another embodiment of the present application.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
As shown in fig. 1, an ultrasonic fingerprint identification panel includes a gate insulating layer 4, a gate 5, a planarization layer 8, a source/drain electrode 9, a source/drain electrode insulating layer 10, an organic insulating layer 12, a receiving electrode 14, a receiving electrode insulating layer 16, a piezoelectric thin film layer 17, and a driving electrode 18, which are sequentially disposed, and further includes:
the first extraction electrode 11 is arranged on the organic insulating layer 12 and is connected with the source drain electrode 9 through a first through hole 21;
and the second extraction electrode 15 is arranged on the receiving electrode insulating layer 16, and is connected with the driving electrode 18 through a second through hole 22.
The source-drain 9 and the driving electrode 18 are respectively provided with a first extraction electrode and a second extraction electrode, the source-drain 9 and the first extraction electrode are respectively arranged on different layers, namely a source-drain insulating layer 10 and an organic insulating layer 12, the driving electrode 18 and the second extraction electrode 15 are arranged on different layers, and the second extraction electrode 15 is arranged on a receiving electrode insulating layer 16. The arrangement can realize the formation of the data routing in multilayer arrangement on the peripheral circuit, and is beneficial to forming a large-size fingerprint identification panel.
It can be understood that, according to the actual application scenario, an extraction electrode may be provided for each source/drain and the driving electrode, or extraction electrodes may be provided for a part of the source/drain and the driving electrode.
In some embodiments, the side of the actuation electrode 18 facing away from the piezoelectric film layer is provided with a high-density metal layer 19. In the field of sound waves, the larger the difference of acoustic resistances of two media is, the larger the difference of masses of the media is, and the larger the change of sound velocity is. The larger the acoustic impedance difference is, the larger the inertia of the phonon is, and the larger the inertia creates an energy condition for the ultrasonic reflection, so that the larger the acoustic impedance difference between the two media is, the larger the ultrasonic reflection capacity is. Wherein the acoustic impedance is:
acoustic impedance (density x speed of sound in medium)
Obviously, the acoustic impedance is in direct proportion to the density, so that the high-density metal layer is arranged on one side of the driving electrode, which is far away from the piezoelectric film layer, so that ultrasonic waves generated by the piezoelectric film in vibration can be mostly reflected to the direction facing the flat layer through the high-density metal layer, and the fingerprint identification precision is improved.
In some embodiments, the receiving electrode 14 and the second extraction electrode 1 are spaced apart from each other, and are disposed in the receiving electrode insulating layer in parallel and in the same layer. In this arrangement, the space and the thickness of the fingerprint identification panel can be reduced compared to the arrangement in which the receiving electrode and the second extraction electrode are provided on different layers. It should be noted that the receiving electrode 14 is connected to the first electrode 11 through a fourth via 24, and is used for collecting a voltage signal of the receiving electrode to form a fingerprint image.
In some embodiments, an inorganic insulating layer is disposed between the organic insulating layer and the receiving electrode insulating layer. Thus, when the receiving electrode 14 is disposed in close proximity to the organic insulating layer 12, the organic insulating layer itself adsorbs impurities or water-absorbing property, which can prevent adverse effects on the metal electrode.
In some embodiments, the substrate 1 is a flexible substrate. The flexible substrate is thinner than a conventional glass substrate, and thus ultra-thin is achieved without increasing processes such as a thinning process of the glass substrate. In addition, a buffer layer 2 is provided between the substrate and the active layer in order to increase the buffer effect. A protective layer 20 is again provided on the side of the high-density metal layer facing away from the drive electrodes.
The active layer 29 is arranged on one side, away from the grid electrode, of the grid electrode insulating layer, a third through hole 23 is arranged between the active layer and the source and drain electrodes, and the third through hole 23 and the first through hole 21 are in a same line and are perpendicular to the substrate. The switch tube can be arranged closely and more switch tubes can be arranged in the same space.
In some embodiments, the first lead-out electrodes 11 are symmetrically disposed centering on the first via hole 21. The symmetrical arrangement can simplify the positioning process of the patterned extraction electrode.
In some embodiments, the thickness of the organic insulating layer is greater than the thickness of the source-drain insulating layer. The thickness of the organic insulating layer is increased, so that the distance between the receiving electrode and the source drain electrode can be increased, and the capacitance value of a parallel plate capacitor formed between the receiving electrode and the source drain electrode is reduced. Specifically, the capacitance value of a parallel plate capacitor is proportional to the dielectric constant and inversely proportional to the distance. Therefore, using an organic insulating layer with a smaller dielectric constant and increasing its thickness will reduce the capacitance value of the parallel plate capacitor.
As shown in fig. 2, the PMOS-based ultrasonic fingerprint recognition panel is different from the NMOS-based ultrasonic fingerprint recognition panel in the active layer 30. The active layer 29 of the ultrasonic fingerprint identification panel of the NMOS is sequentially provided with an N-type heavily doped region 6, an N-type lightly doped region 7, a polysilicon region 3, the N-type lightly doped region 7 and the N-type heavily doped region 6 in a direction parallel to the substrate; the active layer 30 of the PMOS ultrasonic fingerprint identification panel is sequentially provided with a P-type heavily doped region, a polysilicon region, and a P-type heavily doped region in a direction parallel to the substrate.
The application also discloses a display device, and this display device includes the ultrasonic fingerprint identification panel that each embodiment of this application provided and the display panel who laminates rather than.
In some embodiments, the display panel has a flexible substrate base. When the ultrasonic fingerprint identification panel of display panel and laminating all adopted flexible substrate, can obtain ultra-thin flexible effect.
The application also discloses a manufacturing method of the ultrasonic fingerprint identification panel. As shown in fig. 3, the method for manufacturing the NMOS-based ultrasonic fingerprint recognition panel includes the steps of:
step S1: on the glass base, a flexible substrate is formed.
Step S2: the buffer layer can be formed by coating, Chemical Vapor Deposition (CVD), or Plasma Enhanced Chemical Vapor Deposition (PECVD).
Step S3: forming an active layer, wherein the active layer is a polycrystalline silicon film;
step S4: performing ion implantation of the TFT Vth to adjust the threshold voltage Vth;
step S5: forming a gate insulating layer by coating, Chemical Vapor Deposition (CVD), Plasma Enhanced Chemical Vapor Deposition (PECVD);
step S6: patterning to form a grid, forming the grid by adopting a physical vapor deposition method, and forming a required pattern by an exposure display wet etching process;
step S7: performing N-type heavily doped ion implantation to form an N-type heavily doped region on the active layer;
step S8: carrying out N-type lightly doped ion implantation to form an N-type lightly doped region on the active layer;
step S9: forming a flat layer and a via hole connected with the N-type heavily doped region so as to be connected with the source and drain electrodes;
step S10: patterning to form a source drain, forming a grid by adopting a physical vapor deposition method, and forming a required pattern by an exposure display wet etching process;
step S11: forming a source and drain electrode insulating layer and a via hole connected with the source and drain electrode so as to be connected with the first extraction electrode through the via hole;
step S12: patterning to form a first lead electrode, forming a grid electrode by adopting a physical vapor deposition method, and forming a required pattern by an exposure display wet etching process;
step S13: forming an organic insulating layer and a via hole connected with the first extraction electrode, and connecting the source and drain electrodes with the receiving electrode through the via hole; it can be understood that, the first extraction electrode of each source and drain electrode is not required to be connected with the receiving electrode, but the first extraction electrode of the source and drain electrode required to be connected with the receiving electrode is formed with a connecting via hole on the organic insulating layer;
step S14: forming an inorganic insulating layer and an extended via hole of the via hole connected with the first extraction electrode in the step S13, so that the source drain electrode is connected with the receiving electrode;
step S15: patterning to form a receiving electrode and a second leading-out electrode, forming a grid electrode by adopting a physical vapor deposition method, and forming a required pattern by an exposure display wet etching process;
step S16: forming a receiving electrode insulating layer and a via hole connected with a second extraction electrode, and connecting the second extraction electrode with the driving electrode through the via hole;
step S17: patterning to form a piezoelectric film layer;
step S18: patterning to form a driving electrode, specifically forming the driving electrode by adopting a physical vapor deposition method, and forming a required pattern by an exposure display wet etching process;
step S19: patterning to form a high-density metal layer;
step S20: forming a protective layer and peeling off the glass substrate.
The manufacturing method of the PMOS-based ultrasonic fingerprint recognition panel as shown in fig. 4 is different from the manufacturing method of the NMOS-based ultrasonic fingerprint recognition panel in that the steps S7 and S8 are different, and the manufacturing method of the PMOS-based ultrasonic fingerprint recognition panel corresponds to the steps S27 of performing P-type heavily doped ion implantation to form a P-type heavily doped region in an active layer.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by a person skilled in the art that the scope of the invention as referred to in the present application is not limited to the embodiments with a specific combination of the above-mentioned features, but also covers other embodiments with any combination of the above-mentioned features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.

Claims (7)

1. The utility model provides an ultrasonic fingerprint identification panel, is including the grid insulation layer, grid, planarization layer, source drain insulating layer, organic insulation layer, receiving electrode insulating layer, piezoelectric film layer, the driving electrode that set gradually, its characterized in that still includes:
the first extraction electrode is arranged on the organic insulating layer and is connected with the source drain electrode through a first through hole;
the second leading-out electrode is arranged on the receiving electrode insulating layer and is connected with the driving electrode through a second through hole, the receiving electrode and the second leading-out electrode are mutually spaced, the receiving electrode and the second leading-out electrode are arranged on the receiving electrode insulating layer in parallel on the same layer, and one side of the driving electrode, which is far away from the piezoelectric film layer, is provided with a high-density metal layer;
the active layer is arranged on one side, away from the grid electrode, of the grid electrode insulating layer, a third through hole is arranged between the active layer and the source drain electrode, and the third through hole and the first through hole are perpendicular to the substrate on one line.
2. The ultrasonic fingerprint identification panel of claim 1, further comprising a substrate, wherein the substrate is a flexible substrate.
3. The ultrasonic fingerprint identification panel according to claim 1, wherein an inorganic insulating layer is disposed between the organic insulating layer and the receiving electrode insulating layer.
4. The ultrasonic fingerprint recognition panel of claim 1, wherein the first lead-out electrode is disposed symmetrically about the first via.
5. The ultrasonic fingerprint identification panel of claim 1, wherein the thickness of the organic insulating layer is greater than the thickness of the source-drain insulating layer.
6. A display device comprising the ultrasonic fingerprint recognition panel according to any one of claims 1 to 5 and a display panel attached thereto.
7. The display device according to claim 6, wherein the display panel has a flexible base substrate.
CN201910337453.6A 2019-04-24 2019-04-24 Ultrasonic fingerprint identification panel and display device Active CN109993156B (en)

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