CN109861675A - Digital signal burr eliminates circuit - Google Patents
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Abstract
The present invention provides a kind of digital signal burrs to eliminate circuit, including resistance, first order plural serial stage fall and fall than pipe high threshold reverser, second level plural serial stage than pipe high threshold reverser, the first transistor and second transistor.Compared with the relevant technologies, digital signal burr of the invention eliminates the burr for effectively filtering out digital signal of circuit and keeps the duty ratio of signal constant.
Description
Technical field
The present invention relates to signal processing technology field more particularly to a kind of number letters applied to radio frequency identification label chip
Number burr eliminates circuit.
Background technique
Currently, wireless application is more and more extensive, wherein radio frequency identification label chip, i.e. RFID chip (Radio
Frequency Identification chip) in every field using more and more.In radio frequency identification label chip, by penetrating
Frequency identification tag chip is sent to the burr in the digital signal of card reader and is easy to influence card reader reception, so in radio frequency identification
In label chip, it is non-that the digital signal burr especially in the transmission channel of the radio frequency identification label chip of hyperfrequency eliminates circuit
It is often important.
As shown in Figure 1, the digital signal burr of the radio frequency identification label chip of the relevant technologies, which eliminates circuit, uses filtering
The mode of circuit and Schmidt trigger, which is realized, eliminates digital signal burr, and it includes the first electricity which, which eliminates circuit,
Hinder R1, second resistance R2, capacitor C, the first transistor M1, second transistor M2, third transistor M3, the 4th transistor M4 and
Buffer BUF.The first resistor R1 and capacitor C forms RC filter circuit；The first transistor M1 and described second
Transistor M2 forms first order phase inverter；The third transistor M3 and the 4th transistor M4 forms first order phase inverter；
Feedback resistance of the second resistance R2 as circuit.
It is as follows that the digital signal burr eliminates circuit operation principle: when circuit is started to work, if input signal IN is low
Level, then first order phase inverter exports high level, second level phase inverter exports low level, the last buffer BUF output
Level OUT is low level.As the voltage of input signal IN is gradually increased, if reaching the threshold values of similar Schmidt trigger
VTH1, first order phase inverter export low level, and second level phase inverter exports high level, and the second resistance R2 forms positive and negative feedthrough
Road is input to first order phase inverter, so that circuit immediate stability, the last buffer BUF output level OUT is high level.With
The voltage of input signal IN continue to increase, the buffer BUF output level OUT is remained unchanged.With input signal IN's
Voltage is gradually reduced, if reaching the threshold values VTH2 of similar Schmidt trigger, first order phase inverter exports high level, the second level
Phase inverter exports low level, and the second resistance R2 forms positive feedback path and is input to first order phase inverter, so that circuit is rapid
Stablize, the last buffer BUF output level OUT is low level.It is described slow as the voltage of input signal IN continues to reduce
Device BUF output level OUT is rushed to remain unchanged.When the digital signal that the digital signal burr eliminates circuit is jagged, if
Burr raised voltage is less than VTH1, and drop-out voltage is less than VTH2, and the digital signal burr, which eliminates circuit, can successfully filter out hair
Thorn.
However, the digital signal burr eliminates the transmission channel for being mainly used in ultra-high frequency RFID label chip of circuit
Digital signal burr filter out.Wherein, radio frequency identification label chip and the communication protocol requirements of card reader emit signal dutyfactor
It is 50%, if eliminating the filter circuit of circuit using the digital signal burr of the radio frequency identification label chip of the relevant technologies and applying
The mode of schmitt trigger, which is realized, eliminates digital signal burr, although the burr of digital signal can be filtered out, believes number
Number duty ratio have large effect, and influence reception of the digital signal at card reader end of radio frequency identification label chip.
Therefore, it is really necessary to provide the new digital signal burr elimination circuit of one kind to solve the above problems.
Summary of the invention
For the above the deficiencies in the prior art, the present invention proposes a kind of burr for effectively filtering out digital signal and keeps signal
The constant digital signal burr of duty ratio eliminate circuit.
In order to solve the above-mentioned technical problems, the present invention provides a kind of digital signal burrs to eliminate circuit, including resistance, the
Level-one plural serial stage fall than pipe high threshold reverser, second level plural serial stage fall than pipe high threshold reverser, the first transistor and
Second transistor；
The first end of the resistance is connected to external signal input terminals, and the second end of the resistance is respectively connected to described
Level-one plural serial stage falls than the input terminal of pipe high threshold reverser and the grid of the first transistor；
The first order plural serial stage, which falls, is respectively connected to the second level multistage than the output end of pipe high threshold reverser
Series connection is fallen than the input terminal of pipe high threshold reverser and the grid of the second transistor；
The second level plural serial stage is eliminated than the output end of pipe high threshold reverser as the digital signal burr
The output of circuit；
The source electrode of the first transistor, the drain electrode of the first transistor, the source electrode of the second transistor and institute
The drain electrode for stating second transistor is connected to supply voltage.
Preferably, the first transistor and the second transistor are PMOS tube.
Preferably, the first order plural serial stage fall than pipe high threshold reverser include third transistor, the 4th transistor,
5th transistor, the 6th transistor, the 7th transistor and the 8th transistor:
The grid of the third transistor, the grid of the 4th transistor, the grid of the 5th transistor, described
The grid electrical connection of the grid of six transistors, the grid of the 7th transistor and the 8th transistor is used as the first order
Plural serial stage fall than pipe high threshold reverser input terminal and be connected to the second end of the resistance；
The source electrode of the third transistor is connected to ground connection, and the drain electrode of the third transistor is connected to the 4th crystal
The source electrode of pipe；
The drain electrode of 4th transistor is connected to the source electrode of the 5th transistor；
The drain electrode of 5th transistor and the drain electrode of the 8th transistor are electrically connected and as the first order plural serial stage
Than the output end of pipe high threshold reverser and be connected to the second level plural serial stage fall than pipe high threshold reverser input
End；
The source electrode of 6th transistor is connected to the supply voltage, and the drain electrode of the 6th transistor is connected to described
The source electrode of 7th transistor；
The drain electrode of 7th transistor is connected to the source electrode of the 8th transistor.
Preferably, the third transistor, the 4th transistor and the 5th transistor are NMOS tube, and described
Six transistors, the 7th transistor and the 8th transistor are PMOS tube.
Preferably, it includes the 9th transistor, the tenth crystal that the second level plural serial stage, which falls than pipe high threshold reverser,
Pipe, the 11st transistor, the tenth two-transistor, the 13rd transistor and the 14th transistor:
The grid of 9th transistor, the grid of the tenth transistor, the 11st transistor grid, described
The grid of the grid of tenth two-transistor, the grid of the 13rd transistor and the 14th transistor is electrically connected and conduct
The second level plural serial stage is connected to the first order plural serial stage and falls than pipe than the input terminal of pipe high threshold reverser
The output end of high threshold reverser；
The source electrode of 9th transistor is connected to ground connection, and the drain electrode of the 9th transistor is connected to the tenth crystal
The source electrode of pipe；
The drain electrode of tenth transistor is connected to the source electrode of the 11st transistor；
The drain electrode of 11st transistor and the drain electrode of the 14th transistor are fallen as the second level plural serial stage
Output end and interconnection than pipe high threshold reverser；
The source electrode of tenth two-transistor is connected to the supply voltage, and the drain electrode of the tenth two-transistor is connected to
The source electrode of 13rd transistor；
The drain electrode of 13rd transistor is connected to the source electrode of the 14th transistor.
Preferably, the 9th transistor, the tenth transistor and the 11st transistor are NMOS tube, described
Tenth two-transistor, the 13rd transistor and the 14th transistor are PMOS tube.
Preferably, it further includes multiple selector that the digital signal burr, which eliminates circuit, and the first of the multiple selector
Input terminal is connected to the second end of the resistance, and the second input terminal of the multiple selector is connected to the second level multistage string
For connection than the output end of pipe high threshold reverser, the output end of the multiple selector eliminates electricity as the digital signal burr
The output on road.
Preferably, the digital signal burr eliminate circuit further include as low as high voltage converter, it is described as low as high voltage
The input terminal of converter is connected to the output end of the multiple selector, and the output end as low as high voltage converter is as institute
State the output that digital signal burr eliminates circuit.
Compared with the relevant technologies, digital signal burr of the invention eliminates what circuit was formed by resistance and the first transistor
Equivalent capacity collectively constitutes low-pass filter, and burr digital signal passes sequentially through low-pass filter to band, first order plural serial stage falls
It falls than pipe high threshold reverser and second level plural serial stage than pipe high threshold reverser.The circuit can effectively filter out digital signal
Burr.In addition, the digital signal burr eliminates the equivalent capacity and second that circuit is formed by adjusting optimization second transistor
Grade plural serial stage falls than pipe high threshold reverser, reaches compensation low-pass filter and first order plural serial stage is more anti-than pipe high threshold
Influence to device to the variation of the duty ratio of digital signal, to keep the duty ratio of digital signal constant.
Detailed description of the invention
The invention will now be described in detail with reference to the accompanying drawings.By made detailed description in conjunction with the following drawings, of the invention is upper
It states or otherwise content will be apparent and be easier to understand.In attached drawing:
Fig. 1 is that the digital signal burr of the relevant technologies eliminates the circuit diagram of circuit；
Fig. 2 is the circuit diagram that digital signal burr of the present invention eliminates circuit；
Fig. 3 is the circuit diagram for the embodiment that digital signal burr of the present invention eliminates circuit；
Fig. 4 is key node waveform diagram in Fig. 3.
Specific embodiment
The embodiment of the invention will now be described in detail with reference to the accompanying drawings.
Specific embodiment/the embodiment recorded herein is specific specific embodiment of the invention, for illustrating this
The design of invention, be it is explanatory and illustrative, should not be construed as the limitation to embodiment of the present invention and the scope of the invention.
In addition to the embodiment recorded herein, those skilled in the art can also be based on disclosed in the claim of this application book and specification
For content using obvious other technical solutions, these technical solutions include using taking the post as to the embodiment recorded herein
The technical solution of what obvious substitutions and modifications, all within protection scope of the present invention.
It please join shown in Fig. 2, the present invention provides a kind of digital signal burrs to eliminate circuit 100, including resistance R, the first order
Plural serial stage, which falls, to fall than pipe high threshold reverser 1, second level plural serial stage than pipe high threshold reverser 2, the first transistor M1, the
Two-transistor M2, multiple selector 3 and as low as high voltage converter 4.
It please join shown in Fig. 3-4, in the present embodiment, the digital signal burr elimination circuit 100 is mainly used in super
The digital signal burr of the transmission channel of HF RPID tags chip filters out.Wherein, the digital duty cycle signal of transmission channel is
50%, specific:
The first end of the resistance R is connected to external signal input terminals IN, and the external signal input terminals IN is that transmitting is logical
The digital signal in road, wherein the resistance R is metal routing dead resistance, and the second end of the resistance R is respectively connected to described
First order plural serial stage falls than the input terminal of pipe high threshold reverser 1 and the grid of the first transistor M1.Described first is brilliant
Body pipe M1 is PMOS tube.The first order plural serial stage, which falls, is respectively connected to described the than the output end of pipe high threshold reverser 1
Second level plural serial stage falls than the input terminal of pipe high threshold reverser 2 and the grid of the second transistor M2.Second crystal
Pipe M2 is PMOS tube.The second level plural serial stage is than the output end of pipe high threshold reverser 2 as the digital signal
The output of burr elimination circuit 100.The source electrode of the first transistor M1, the drain electrode of the first transistor M1, described second
The drain electrode of the source electrode of transistor M2 and the second transistor M2 are connected to supply voltage VDD.
The function and working principle of the partial circuit are as follows: the digital signal burr eliminates circuit 100 and passes through the resistance R
Low-pass filter is collectively constituted with the first transistor M1 equivalent capacity formed, the low-pass filter makes digital signal
Become with the rising edge of burr signal more slowly, so that the level of burr signal reduces.Band burr digital signal is successively
It is fallen by the low-pass filter, the first order plural serial stage than pipe high threshold reverser 1 and the second level plural serial stage
Than pipe high threshold reverser 2, fallen by the first order plural serial stage more multistage than pipe high threshold reverser 1 and the second level
Series connection filters out burr signal than the threshold voltage of pipe high threshold reverser 2.
In the present embodiment, the first order plural serial stage fall than pipe high threshold reverser 1 include third transistor M3,
4th transistor M4, the 5th transistor M5, the 6th transistor M6, the 7th transistor M7 and the 8th transistor M8.Specifically, described
The grid of third transistor M3, the grid of the 4th transistor M4, the 5th transistor M5 grid, the 6th crystal
The grid of the grid of pipe M6, the grid of the 7th transistor M7 and the 8th transistor M8 is electrically connected and as described first
Grade plural serial stage fall than pipe high threshold reverser 1 input terminal and be connected to the second end of the resistance R.The third transistor
The source electrode of M3 is connected to ground connection GND, and the drain electrode of the third transistor M3 is connected to the source electrode of the 4th transistor M4.It is described
The drain electrode of 4th transistor M4 is connected to the source electrode of the 5th transistor M5.The drain electrode of the 5th transistor M5 and the 8th crystalline substance
The drain electrode electrical connection of body pipe M8 simultaneously than the output end of pipe high threshold reverser 1 and is connected to as the first order plural serial stage
The second level plural serial stage is than the input terminal of pipe high threshold reverser 2.The source electrode of the 6th transistor M6 is connected to institute
Supply voltage VDD is stated, the drain electrode of the 6th transistor M6 is connected to the source electrode of the 7th transistor M7.7th crystal
The drain electrode of pipe M7 is connected to the source electrode of the 8th transistor M8.Wherein, the third transistor M3, the 4th transistor M4
And the 5th transistor M5 is NMOS tube, the 6th transistor M6, the 7th transistor M7 and the 8th crystal
Pipe M8 is PMOS tube.
The function and working principle of the partial circuit are as follows: the first order plural serial stage falls more logical than pipe high threshold reverser 1
Cross foregoing circuit structure make its threshold voltage VH1 voltage it is relatively high, when burr signal voltage be lower than threshold voltage VH1
When, the output that the first order plural serial stage falls than pipe high threshold reverser 1 will not be overturn, to reach the work for eliminating burr
With.When the first order plural serial stage is fallen than pipe high threshold 1 output signal of reverser, burr signal has been eliminated substantially.
In the present embodiment, it includes the 9th transistor that the second level plural serial stage, which falls than pipe high threshold reverser 2,
M9, the tenth transistor M10, the 11st transistor M11, the tenth two-transistor M12, the 13rd transistor M13 and the 14th crystal
Pipe M14.Specifically, grid, the 11st transistor of the grid of the 9th transistor M9, the tenth transistor M10
The grid of M11, the grid of the tenth two-transistor M12, the 13rd transistor M13 grid and the 14th crystal
The grid electrical connection of pipe M14 simultaneously than the input terminal of pipe high threshold reverser 2 and is connected to as the second level plural serial stage
The first order plural serial stage is than the output end of pipe high threshold reverser 1.The source electrode of the 9th transistor M9, which is connected to, to be connect
The drain electrode of ground GND, the 9th transistor M9 are connected to the source electrode of the tenth transistor M10.The tenth transistor M10's
Drain electrode is connected to the source electrode of the 11st transistor M11.The drain electrode of the 11st transistor M11 and the 14th transistor
The drain electrode electrical connection of M14 and output end and the interconnection fallen as the second level plural serial stage than pipe high threshold reverser 2.
The source electrode of the tenth two-transistor M12 is connected to the supply voltage VDD, the drain electrode connection of the tenth two-transistor M12
To the source electrode of the 13rd transistor M13.The drain electrode of the 13rd transistor M13 is connected to the 14th transistor
The source electrode of M14.Wherein, the 9th transistor M9, the tenth transistor M10 and the 11st transistor M11 are
NMOS tube, the tenth two-transistor M12, the 13rd transistor M13 and the 14th transistor M14 are PMOS
Pipe.
The working principle of the partial circuit are as follows: the second level plural serial stage passes through than pipe high threshold reverser 2 above-mentioned
Circuit structure makes the voltage of its threshold voltage VH2 relatively high, when the first order plural serial stage is more reversed than pipe high threshold
When the voltage of the output of device 1 is higher than threshold voltage VH2, the second level plural serial stage is than the output of pipe high threshold reverser 2
It will overturn.Wherein, when the first order plural serial stage also occurs than the signal dutyfactor of the output of pipe high threshold reverser 1
Variation, the digital signal burr are eliminated circuit 100 by adjusting the breadth length ratio of the second transistor M2, are changed described in reaching
Second level plural serial stage is than the failing edge of the input signal of pipe high threshold reverser 2.The second transistor M2 is PMOS tube
Equivalent capacity, the equivalent voltage are used to compensate the waveform duty cycle that the low-pass filter generates and change.
In the present embodiment, it in order to reach the symmetrical matched effect with the low-pass filter, needs described
Second level plural serial stage falls to optimize simultaneously than pipe high threshold reverser 2 and the second transistor M2, reach the compensation resistance R and
The first transistor M1 forms the low-pass filter of low-pass filter composition and when the first order plural serial stage falls
Influence than pipe high threshold reverser 1 to the variation of duty ratio, thus successfully to filter out burr, and duty ratio is also kept
50%.
In the present embodiment, for application scenes, the digital signal burr eliminates circuit 100 and passes through setting institute
Multiple selector 3 is stated to realize.Such as in testing, it needs to verify the digital signal burr and eliminates 100 pairs of band hairiness of circuit
Whether the digital signal of thorn effectively filters out burr.Specifically, the first input end of the multiple selector 3 is connected to the resistance
The second end of R, it is more reversed than pipe high threshold that the second input terminal of the multiple selector 3 is connected to the second level plural serial stage
The output end of device 2, the output end of the multiple selector 3 eliminate the output of circuit 100 as the digital signal burr, can be with
Independent lead is gone out.
In the present embodiment, the digital signal burr is eliminated circuit 100 and is converted by the way that setting is described as low as high voltage
Device 4 is used to digital signal be transformed into analog domain, to launch.Specifically, the input as low as high voltage converter 4
End is connected to the output end of the multiple selector 3, and the output end as low as high voltage converter 4 is as the digital signal
Burr eliminates the output of circuit 100, i.e. output port OUT.
Compared with the relevant technologies, digital signal burr of the invention eliminates what circuit was formed by resistance and the first transistor
Equivalent capacity collectively constitutes low-pass filter, and burr digital signal passes sequentially through low-pass filter to band, first order plural serial stage falls
It falls than pipe high threshold reverser and second level plural serial stage than pipe high threshold reverser.The circuit can effectively filter out digital signal
Burr.In addition, the digital signal burr eliminates the equivalent capacity and second that circuit is formed by adjusting optimization second transistor
Grade plural serial stage falls than pipe high threshold reverser, reaches compensation low-pass filter and first order plural serial stage is more anti-than pipe high threshold
Influence to device to the variation of the duty ratio of digital signal, to keep the duty ratio of digital signal constant.
It should be noted that each embodiment above by reference to described in attached drawing is only to illustrate the present invention rather than limits this
The range of invention, those skilled in the art should understand that, it is right under the premise without departing from the spirit and scope of the present invention
The modification or equivalent replacement that the present invention carries out, should all cover within the scope of the present invention.In addition, signified unless the context
Outside, the word occurred in the singular includes plural form, and vice versa.In addition, unless stated otherwise, then any embodiment
All or part of in combination with any other embodiment all or part of come using.
Claims (8)
1. a kind of digital signal burr eliminates circuit, which is characterized in that it includes resistance, first that the digital signal burr, which eliminates circuit,
Grade plural serial stage, which falls, to fall than pipe high threshold reverser, second level plural serial stage than pipe high threshold reverser, the first transistor and the
Two-transistor；
The first end of the resistance is connected to external signal input terminals, and the second end of the resistance is respectively connected to the first order
Plural serial stage falls than the input terminal of pipe high threshold reverser and the grid of the first transistor；
The first order plural serial stage is respectively connected to the second level plural serial stage than the output end of pipe high threshold reverser
Than the input terminal of pipe high threshold reverser and the grid of the second transistor；
The second level plural serial stage eliminates circuit as the digital signal burr than the output end of pipe high threshold reverser
Output；
The source electrode of the first transistor, the drain electrode of the first transistor, the source electrode of the second transistor and described
The drain electrode of two-transistor is connected to supply voltage.
2. digital signal burr according to claim 1 eliminates circuit, which is characterized in that the first transistor and described
Second transistor is PMOS tube.
3. digital signal burr according to claim 1 eliminates circuit, which is characterized in that the first order plural serial stage falls
Than pipe high threshold reverser include third transistor, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor and
8th transistor:
The grid of the third transistor, the grid of the 4th transistor, the grid of the 5th transistor, the 6th crystalline substance
The grid electrical connection of the grid of body pipe, the grid of the 7th transistor and the 8th transistor is multistage as the first order
Series connection fall than pipe high threshold reverser input terminal and be connected to the second end of the resistance；
The source electrode of the third transistor is connected to ground connection, and the drain electrode of the third transistor is connected to the 4th transistor
Source electrode；
The drain electrode of 4th transistor is connected to the source electrode of the 5th transistor；
The drain electrode of 5th transistor and the drain electrode electrical connection of the 8th transistor simultaneously fall to compare as the first order plural serial stage
The output end of pipe high threshold reverser and be connected to the second level plural serial stage fall than pipe high threshold reverser input terminal；
The source electrode of 6th transistor is connected to the supply voltage, and the drain electrode of the 6th transistor is connected to the described 7th
The source electrode of transistor；
The drain electrode of 7th transistor is connected to the source electrode of the 8th transistor.
4. digital signal burr according to claim 3 eliminates circuit, which is characterized in that the third transistor, described
4th transistor and the 5th transistor are NMOS tube, the 6th transistor, the 7th transistor and the described 8th
Transistor is PMOS tube.
5. digital signal burr according to claim 3 eliminates circuit, which is characterized in that the second level plural serial stage falls
It include the 9th transistor, the tenth transistor, the 11st transistor, the tenth two-transistor, the 13rd crystalline substance than pipe high threshold reverser
Body pipe and the 14th transistor:
The grid of 9th transistor, the grid of the tenth transistor, the grid of the 11st transistor, the described tenth
The grid of the grid of two-transistor, the grid of the 13rd transistor and the 14th transistor is electrically connected and as described
Second level plural serial stage is connected to the first order plural serial stage threshold higher than pipe than the input terminal of pipe high threshold reverser
It is worth the output end of reverser；
The source electrode of 9th transistor is connected to ground connection, and the drain electrode of the 9th transistor is connected to the tenth transistor
Source electrode；
The drain electrode of tenth transistor is connected to the source electrode of the 11st transistor；
The drain electrode of 11st transistor and the drain electrode of the 14th transistor are electrically connected and as the second level plural serial stage
The output end than pipe high threshold reverser and interconnection；
The source electrode of tenth two-transistor is connected to the supply voltage, and the drain electrode of the tenth two-transistor is connected to described
The source electrode of 13rd transistor；
The drain electrode of 13rd transistor is connected to the source electrode of the 14th transistor.
6. digital signal burr according to claim 5 eliminates circuit, which is characterized in that the 9th transistor, described
Tenth transistor and the 11st transistor are NMOS tube, the tenth two-transistor, the 13rd transistor and institute
Stating the 14th transistor is PMOS tube.
7. digital signal burr according to claim 1 eliminates circuit, which is characterized in that the digital signal burr is eliminated
Circuit further includes multiple selector, and the first input end of the multiple selector is connected to the second end of the resistance, described more
Second input terminal of road selector be connected to the second level plural serial stage fall than pipe high threshold reverser output end, it is described more
The output end of road selector eliminates the output of circuit as the digital signal burr.
8. digital signal burr according to claim 7 eliminates circuit, which is characterized in that the digital signal burr is eliminated
Circuit further includes as low as high voltage converter, and the input terminal as low as high voltage converter is connected to the multiple selector
Output end, the output end as low as high voltage converter eliminate the output of circuit as the digital signal burr.
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| CN201910018062.8A CN109861675B (en) | 2019-01-09 | 2019-01-09 | Digital signal burr eliminating circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112673263A (en) * | 2019-08-15 | 2021-04-16 | 深圳市汇顶科技股份有限公司 | Burr signal detection circuit, safety chip and electronic equipment |
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|---|---|
| CN109861675B (en) | 2023-05-02 |
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