CN109740214A - The method and apparatus for overturning counter model building - Google Patents
The method and apparatus for overturning counter model building Download PDFInfo
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- CN109740214A CN109740214A CN201811581405.3A CN201811581405A CN109740214A CN 109740214 A CN109740214 A CN 109740214A CN 201811581405 A CN201811581405 A CN 201811581405A CN 109740214 A CN109740214 A CN 109740214A
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Abstract
The present invention provides a kind of method and apparatus of overturning counter model building, this method comprises: carrying out emulation level category of model to the logical simulation tool for analyzing power consumption leakage in encryption equipment；Emulation hierarchical model is divided into impulse- free robustness model and model containing burr；Determine that emulation hierarchical model for impulse- free robustness model, then according to the corresponding emulation hierarchical model of circuit types of encryption equipment, obtains final emulation hierarchical model；Emulation data in final emulation hierarchical model are exported as into VCD file；Energizing signal in the VCD file is analyzed, overturning counter model is obtained.A kind of method and apparatus of overturning counter model building provided by the invention, by emulate needed for model hierarchy, burr information is portrayed and in conjunction with actual encrypted circuitry type, it constructs obtained overturning and counts leak model, so that specific aim is stronger and more efficient when implementing practical side channel power consumption analysis.
Description
Technical field
The present invention relates to information security field more particularly to a kind of method and apparatus of overturning counter model building.
Background technique
With the rapid development of Information technology, the effect of information security becomes ever more important.However whether Encryption Algorithm
Hardware realization or software realization, all can be by various security threats, wherein side Multiple Channel Analysis is existing threat encryption
One of the important means of device security.
In order to improve the high efficiency of side information analysis, scholars propose various leakage models, such as: prior art
One: Hamming molality type, power consumption when suitable for describing bus low power or constant description encryption equipment original state.In attacker
When can not obtain complete net meter file or can not judge the data change state before and after data/address bus, Hamming molality can be used
Type.
The disadvantage is that: when using Hamming molality type, it is believed that the Hamming of power consumption and handled data that encryption equipment generates
Heavy phase is closed.But in most cases, the size of the power consumption is also related to the previous state of current value, i.e., with the change of data
Change amount is related.If data initial state is constant, the current state of data is directly proportional to variable quantity at this time, and Hamming molality type is effective at this time.
However work as initial state not timing, the current state of data is unrelated with variable quantity, is invalid, therefore Hamming using Hamming molality type at this time
The applicable condition of molality type is limited.
Prior art 2: the 2004 years Hamming distance models proposed.Hamming distance model is suitable for portraying the function in bus
Consumption, including address bus and data/address bus etc..
The disadvantage is that: in original design known to attacker or netlist when the data of a part of continuous processing, it can be used
Hamming distance model portrays the power consumption leakage information of the part.There are a large amount of burrs in combinational circuit, even if attacker
Net meter file is obtained in advance, often can not also obtain correct median, therefore Hamming distance model is not suitable for combination electricity
The power consumption leakage of road is portrayed.
Therefore, how to find one kind and be applicable not only to register or bus, and be suitable for the power consumption of hardware encryption circuit
Model is revealed, it is most important to the Accuracy and high efficiency for improving the leakage analysis of side channel power consumption.
Summary of the invention
Side Multiple Channel Analysis is mainly waited using encryption equipment at runtime, the side channel information leakage of generation, and then to encryption
Equipment is attacked.These side channel informations include power consumption information, electromagnetic radiation information etc..It, can for different applicable scenes
By power leakage model be divided into theoretical leak model and emulation leak model, the difference of the two be construct leak model when whether
Using the original design of Encryption Algorithm and it is emulated.When constructing theoretical leak model, it is only necessary to treat point of attack equipment
Class has preliminary understanding.And when constructing emulation leak model, after the classification for understanding encryption equipment, it is also necessary to use emulation tool
Encryption Algorithm is emulated.Emulation leak model is relative to the advantages of theoretical leak model, with actual encrypted equipment
Power consumption leakage feature is more nearly, and higher using validity when emulation leak model progress side Multiple Channel Analysis.
Therefore in order to which simple and efficiently building simulated power dissipation reveals model, the present invention provides a kind of overturning counter models
The method and apparatus of building.
In a first aspect, the present invention provides a kind of methods of overturning counter model building, which comprises
Emulation level category of model is carried out to the logical simulation tool for analyzing power consumption leakage in encryption equipment；
The emulation hierarchical model is divided into impulse- free robustness model and model containing burr；
Determine that the emulation hierarchical model is impulse- free robustness model, then according to the corresponding simulation layer of circuit types of encryption equipment
Secondary model obtains final emulation hierarchical model；
Emulation data in the final emulation hierarchical model are exported as into VCD file；
Energizing signal in the VCD file is analyzed, overturning counter model is obtained.
Second aspect, the present invention provides a kind of device of overturning counter model building, described device includes:
Category of model module, for carrying out simulation layer to the logical simulation tool for analyzing power consumption leakage in encryption equipment
Secondary category of model；
Burr model determining module, for the emulation hierarchical model to be divided into impulse- free robustness model and model containing burr；
Circuit types selecting module, for determining that the emulation hierarchical model is impulse- free robustness model, then according to encryption equipment
The corresponding emulation hierarchical model of circuit types, obtain final emulation hierarchical model；
VCD file obtains module, for the emulation data in the final emulation hierarchical model to be exported as VCD text
Part；
Counter model determining module is overturn, for analyzing energizing signal in the VCD file, overturning is obtained and counts
Model.
It is provided by the invention it is a kind of overturning counter model building method and apparatus, by emulate needed for model hierarchy,
Burr information is portrayed and in conjunction with actual encrypted circuitry type, the overturning that constructs counts leak model,
So that specific aim is stronger and more efficient when implementing practical side channel power consumption analysis.
For above and other objects, features and advantages of the invention can be clearer and more comprehensible, preferred embodiment is cited below particularly,
And cooperate institute's accompanying drawings, it is described in detail below.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the method flow schematic diagram of overturning counter model building provided in an embodiment of the present invention；
Fig. 2 is the device block diagram of overturning counter model building provided in an embodiment of the present invention；
Fig. 3 is the overall structure diagram of overturning counter model building provided in an embodiment of the present invention；
Fig. 4 is the category of model stage schematic diagram of Fig. 3；
Fig. 5 is the model choice phase schematic diagram of Fig. 3；
Fig. 6 is the model construction stage schematic diagram of Fig. 3；
Fig. 7 is the model implementation phase schematic diagram of Fig. 3.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
With the rapid development of Information technology, the effect of information security becomes ever more important.Existing information security field
In core technology first is that cryptography.It is various in communication system up to the various agreements of applications of computer network layer
Hardware device, cryptography all play a very important role.It is close with public key that existing Encryption Algorithm is broadly divided into symmetric cryptography
Two classes of code, wherein symmetric cryptography includes the Encryption Algorithm such as AES, 3-DES and SMS4.Symmetric cryptography due to its higher safety with
Succinct implementation process, is widely used in various kinds of equipment.The implementation of cryptographic algorithm includes software and hardware realization, software
It realizes due to its good customizability, is applied in the equipment such as smart card, embedded；And hardware realization is quickly added due to it
Speed is decrypted, is applied in all kinds of special encryption chips, including FPGA, ASIC etc..However whether the hardware of Encryption Algorithm is real
Existing or software realization, all can be by various security threats, and wherein side Multiple Channel Analysis is existing threat encryption equipment safety
One of the important means of property.
Attacker is when implementing attack to encryption equipment using side Multiple Channel Analysis technology, it is necessary first to use electromagnetic probe etc.
Special equipment detects the side channel information of encryption equipment, and side channel information is acquired and saved using oscillograph, it
These information are analyzed using a variety of side Multiple Channel Analysis methods afterwards, are finally reached the mesh for restoring correct code key in encryption equipment
's.When attacker obtains the correct code key of encryption equipment, all secret informations for encrypting equipment can all be leaked, thoroughly broken
The safety of bad encryption equipment.Later in order to improve the high efficiency of side information analysis, scholars propose various leakage models, but
It is that existing leakage model exists suitable for the leakage analysis of the power consumption of register or bus, for the power consumption side of combinational circuit part
Multiple Channel Analysis data are inaccurate.To solve the above-mentioned problems, the method for a kind of overturning counter model building provided by the invention
And device.As shown, Fig. 1 is the method flow schematic diagram of overturning counter model building provided in an embodiment of the present invention.Fig. 1
In, this method comprises:
Step 101, emulation hierarchical model point is carried out to the logical simulation tool for analyzing power consumption leakage in encryption equipment
Class.
Specifically, logical simulation tool needed for building power consumption leakage model includes ISIM, ModelSim etc..According to analysis
The difference of emulation tool selected by person, emulation classification are different.
Step 102, emulation hierarchical model is divided into impulse- free robustness model and model containing burr.
Specifically, judging whether to count the burr information in circuit signal, emulation hierarchical model is divided into this
Impulse- free robustness model and model containing burr, wherein burr information refers in circuit since the non-purpose that signal delivery lag generates is jumped
Become, burr information is garbage for the normal operation of circuit, but be can be used as when doing side Multiple Channel Analysis to circuit
Useful information is utilized.
Step 103, determine that emulation hierarchical model is impulse- free robustness model, then it is corresponding imitative according to the circuit types of encryption equipment
True hierarchical model obtains final emulation hierarchical model.
Specifically, after judging determine emulation hierarchical model for impulse- free robustness model, further according to encrypt equipment circuit types,
Hierarchical model further division, the emulation hierarchical model finally determined will be emulated.Wherein, the circuit types packet of equipment is encrypted
It includes: SLCD (simple logical circuit design, simple logic circuit design) or CLCD (complex logical
Circuit design, complex logic circuit design), SLCD corresponds to the translation post-simulation types of models in impulse- free robustness model,
CLCD corresponds to the behavior simulation types of models in impulse- free robustness model.
Step 104, the emulation data in final emulation hierarchical model are exported as into VCD file.
Specifically, related circuit data in hierarchical model will be finally emulated, and burr information data, the emulation number such as signal overturning
According to as simulation result, VCD file is exported as.Wherein, VCD file is for describing all signal intensities in circuit.According to circuit
Input is different, and the signal overturning situation of different number can embody in VCD file, inputs asynchronous signal by statistics and overturns
Quantity, the available corresponding relationship between circuit input and signal rollover number.
Step 105, upset information in VCD file is analyzed, obtains overturning counter model.
Specifically, analyzing the signal for overturning jump in VCD file, overturning counter model is obtained, which counts
Model is exactly the final power consumption leakage model of the embodiment of the present invention.
The embodiment of the present invention is by emulating required model hierarchy, being portrayed burr information and combined actual encrypted
The type of circuitry, the overturning constructed counts leak model, so that being directed to when implementing practical side channel power consumption analysis
Property is stronger and more efficient.
Content based on the above embodiment, as a kind of alternative embodiment: emulation hierarchical model includes: behavior simulation mould
Type, translation post-simulation model, mapping post-simulation model and wiring post-simulation model.
Specifically, needing when implementing to verilog design by three key steps: translation, mapping, wiring,
These steps are universal method in the industry.It should be noted that behavior simulation is in verilog design in embodiments of the present invention
It is executed before translation.Translation post-simulation, mapping post-simulation, wiring post-simulation execute after translation, mapping, Route step respectively.
The embodiment of the present invention is by classifying to emulation hierarchical model, so that subsequent obtained leakage model is more quasi-
Really.
Content based on the above embodiment, as a kind of alternative embodiment: further include:
Determine that emulation hierarchical model is model containing burr, then using wiring post-simulation model as final emulation level mould
Type.
Specifically, in embodiments of the present invention, mapping post-simulation model and wiring post-simulation model belong to model containing burr.
Emulation hierarchical model is determined after judging as model containing burr, then directly selected wiring post-simulation model is as final simulation layer
Secondary model.Because while it is long the time required to wiring post-simulation model construction model, but it is routed the resulting model of post-simulation
Precision highest.
The embodiment of the present invention is routed post-simulation model according to the statistical conditions to burr information, for model selection containing burr
As final emulation hierarchical model, so that the model accuracy of construction reaches highest.
Content based on the above embodiment, as a kind of alternative embodiment: circuit types includes: SLCD or CLCD.
Specifically, in Verilog design, using signal, input signal and output signal on line as the base of jump calculating
This unit.Each element is expressed as BLU in original design, and the input quantity of BLU is limited.If some signal without
Method is indicated by the output of a BLU, then multiple BLU and additional output signal is needed to indicate.
It defines CLCD circuit and SLCD circuit: enabling BLU (In, O) and indicate the BLU with n inputs and an output.
Wherein, I indicates that Input, O indicate Output, and n is natural number.Y (y ∈ Y) indicates to be located at ASSIGN statement in Verilog design
Variable afterwards, and Y is the set comprising all y.At this point,WhereinExpression is arbitrarily patrolled
It collects operation x and y is a binary variable.SLCD and CLCD can be expressed as follows at this time:
If the circuit of encryption equipment belongs to SLCD, selected text translation post-simulation model is as impulse- free robustness model；If encryption is set
Standby circuit belongs to CLCD, then housing choice behavior simulation model is as impulse- free robustness model.
The embodiment of the present invention selects corresponding emulation hierarchical model by the confirmation to encryption circuitry type,
And then determine overturning counter model used in the secondary side Multiple Channel Analysis, improve the high efficiency of the overturning counter model of acquisition and accurate
Property.
Content based on the above embodiment, as a kind of alternative embodiment: energizing signal in VCD file is analyzed,
Overturning counter model is obtained, later further include:
The side Multiple Channel Analysis of power consumption is carried out to actual measurement power consumption profile according to overturning meter model.
Specifically, after the overturning counter model for obtaining revealing analysis for power consumption, using correlation power consumption analysis or mutually
The methods of information power consumption analysis carries out the side Multiple Channel Analysis of power consumption to actual measurement power consumption profile.The embodiment of the present invention is not to the side of power consumption
The method of Multiple Channel Analysis makees specific limit.
The embodiment of the present invention is used for the power consumption point to actual measurement power consumption profile after obtaining overturning counter model, by the model
Analysis, so that specific aim is stronger and more efficient in practical side Multiple Channel Analysis.
According to another aspect of the present invention, the embodiment of the present invention also provides a kind of device of overturning counter model building,
Referring to fig. 2, Fig. 2 is the device block diagram of overturning counter model building provided in an embodiment of the present invention.The device is used for aforementioned each
The formation of overturning counter model building is carried out in embodiment.Therefore, the side of counter model building is overturn in foregoing embodiments
Description and definition in method, can be used for the understanding of each execution module in the embodiment of the present invention.
As shown, the device includes:
Category of model module 201, for imitating the logical simulation tool for analyzing power consumption leakage in encryption equipment
True hierarchical model classification；
Burr model determining module 202 is divided into impulse- free robustness model and model containing burr for that will emulate hierarchical model；
Circuit types selecting module 203, for determining that emulation hierarchical model is impulse- free robustness model, then according to encryption equipment
The corresponding emulation hierarchical model of circuit types, obtains final emulation hierarchical model；
VCD file obtains module 204, for the emulation data in final emulation hierarchical model to be exported as VCD file；
Counter model determining module 205 is overturn, for analyzing energizing signal in VCD file, overturning is obtained and counts
Model.
The embodiment of the present invention is by emulating required model hierarchy, being portrayed burr information and combined actual encrypted
The type of circuitry, the overturning constructed counts leak model, so that being directed to when implementing practical side channel power consumption analysis
Property is stronger and more efficient.
Content based on the above embodiment, as a kind of alternative embodiment: emulation hierarchical model includes: behavior simulation mould
Type, translation post-simulation model, mapping post-simulation model and wiring post-simulation model.
The embodiment of the present invention is by classifying to emulation hierarchical model, so that subsequent obtained leakage model is more accurate
Content based on the above embodiment, as a kind of alternative embodiment: further include:
It is routed post-simulation model determining module, for determining that emulation hierarchical model is model containing burr, then will be imitated after wiring
True mode is as final emulation hierarchical model.
The embodiment of the present invention is routed post-simulation model according to the statistical conditions to burr information, for model selection containing burr
As final emulation hierarchical model, so that the model accuracy of construction reaches highest.
Content based on the above embodiment, as a kind of alternative embodiment: circuit types includes: SLCD or CLCD.
The embodiment of the present invention selects corresponding emulation hierarchical model by the confirmation to encryption circuitry type,
And then determine overturning counter model used in the secondary side Multiple Channel Analysis, improve the high efficiency of the overturning counter model of acquisition and accurate
Property.
Content based on the above embodiment, as a kind of alternative embodiment: further include:
Power consumption analysis module, model carries out the side Multiple Channel Analysis of power consumption to actual measurement power consumption profile based on according to overturning.
The embodiment of the present invention is used for the power consumption point to actual measurement power consumption profile after obtaining overturning counter model, by the model
Analysis, so that specific aim is stronger and more efficient in practical side Multiple Channel Analysis.
Content based on the above embodiment, as a kind of alternative embodiment: the embodiment of the present invention provides a kind of overturning counting
The organization plan of model construction, as shown in figure 3, Fig. 3 is the whole knot of overturning counter model building provided in an embodiment of the present invention
Structure schematic diagram.
In the whole design figure of the embodiment of the present invention, it is most of mainly to contain four: category of model stage, model selection
Stage, model construction stage and model implementation phase.Wherein, sorted model is passed to model and selects rank by the category of model stage
Model after selection is passed to the model construction stage by section, model choice phase, and the model construction stage obtains overturning meter by calculating
Exponential model carries out side channel power consumption analysis by overturning counter model in model implementation phase later.
Fig. 4 gives category of model stage basic procedure, includes two parts in figure: emulation level confirmation stage and burr
Information requirement confirmation stage.Operation is as follows:
Building model outfit is logical simulation common tool, comprising: ISIM, ModelSim etc..According to analyst institute
The difference of the emulation tool of choosing, emulation classification are different.Such as after ISIM can be divided into behavior simulation, translation post-simulation, mapping
Four kinds of post-simulation of emulation and wiring.If analyst needs to count burr information, can continue will to emulate level be divided into it is hairless
Thorn emulation is emulated with containing burr.The category of model stage exports the emulation level category of model that emulation tool is supported.
Fig. 5 gives model choice phase basic procedure, includes two parts: circuit types confirmation stage and model in figure
Confirmation stage.Operation is as follows:
The model choice phase is passed to after available category of model, circuit types confirmation stage confirmation encryption circuitry category
In SLCD or CLCD.Overturning meter needed for the model validation stage selects the secondary side Multiple Channel Analysis according to the type of encryption circuitry
Exponential model type.If encryption circuitry belongs to SLCD, counter model is overturn after selected text translation as impulse- free robustness model, if plus
Close circuitry belongs to CLCD, then housing choice behavior overturns counter model as impulse- free robustness model.Model choice phase final output
Overturning counter model used in the secondary side Multiple Channel Analysis.
Fig. 6 gives model construction stage basic procedure, includes three parts in figure: logical simulation stage, emulation data
Export stage and model calculation stages.Operation is as follows:
1) the logical simulation stage according to use logical simulation tool to original circuit design carry out logical simulation.
2) simulation result is exported as VCD file by the emulation data export stage.
3) model calculation stages analyze VCD file, and obtain by calculating resulting overturning counter model.
After completing above three step, accurate overturning counter model corresponding to the circuit design can be obtained, supply
Following model implementation phase uses.
Fig. 7 gives the basic procedure of model implementation phase.Operation is as follows:
Model implementation phase uses building stage resulting overturning counter model, passes through correlation power consumption analysis or mutual information
The methods of power consumption analysis carries out side Multiple Channel Analysis to actual measurement power consumption profile.
Specific embodiment is applied in the present invention, and principle and implementation of the present invention are described, above embodiments
Explanation be merely used to help understand method and its core concept of the invention；At the same time, for those skilled in the art,
According to the thought of the present invention, there will be changes in the specific implementation manner and application range, in conclusion in this specification
Appearance should not be construed as limiting the invention.
Claims (10)
1. a kind of method of overturning counter model building, which is characterized in that the described method includes:
Emulation level category of model is carried out to the logical simulation tool for analyzing power consumption leakage in encryption equipment；
The emulation hierarchical model is divided into impulse- free robustness model and model containing burr；
Determine that the emulation hierarchical model is impulse- free robustness model, then according to the corresponding emulation level mould of circuit types of encryption equipment
Type obtains final emulation hierarchical model；
Emulation data in the final emulation hierarchical model are exported as into VCD file；
Energizing signal in the VCD file is analyzed, overturning counter model is obtained.
2. the method according to claim 1, wherein the emulation hierarchical model includes: behavior simulation model, turns over
Translate post-simulation model, mapping post-simulation model and wiring post-simulation model.
3. according to the method described in claim 2, it is characterized by further comprising:
Determine that the emulation hierarchical model is model containing burr, then using the wiring post-simulation model as final emulation level
Model.
4. the method according to claim 1, wherein the circuit types includes: SLCD or CLCD.
5. the method according to claim 1, wherein described analyze energizing signal in the VCD file,
Overturning counter model is obtained, later further include:
The side Multiple Channel Analysis of power consumption is carried out to actual measurement power consumption profile according to the overturning meter model.
6. a kind of device of overturning counter model building, which is characterized in that described device includes:
Category of model module, for carrying out emulation level mould to the logical simulation tool for analyzing power consumption leakage in encryption equipment
Type classification；
Burr model determining module, for the emulation hierarchical model to be divided into impulse- free robustness model and model containing burr；
Circuit types selecting module, for determining that the emulation hierarchical model is impulse- free robustness model, then according to the electricity of encryption equipment
The corresponding emulation hierarchical model of road type, obtains final emulation hierarchical model；
VCD file obtains module, for the emulation data in the final emulation hierarchical model to be exported as VCD file；
Counter model determining module is overturn, for analyzing energizing signal in the VCD file, obtains overturning count module
Type.
7. device according to claim 6, which is characterized in that the emulation hierarchical model includes: behavior simulation model, turns over
Translate post-simulation model, mapping post-simulation model and wiring post-simulation model.
8. device according to claim 7, which is characterized in that further include:
It is routed post-simulation model determining module, for determining that the emulation hierarchical model is model containing burr, then by the wiring
Post-simulation model is as final emulation hierarchical model.
9. device according to claim 6, which is characterized in that the circuit types includes: SLCD or CLCD.
10. device according to claim 6, which is characterized in that further include:
Power consumption analysis module, for carrying out the side Multiple Channel Analysis of power consumption to actual measurement power consumption profile according to the overturning counter model.
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| WO2023207440A1 (en) * | 2022-04-24 | 2023-11-02 | 浙江大学 | Vcd vector compression method and apparatus based on circuit flipping behavior |
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