CN109716486B - Method for cutting silicon ingot, method for manufacturing silicon wafer, and silicon wafer - Google Patents
Method for cutting silicon ingot, method for manufacturing silicon wafer, and silicon wafer Download PDFInfo
- Publication number
- CN109716486B CN109716486B CN201780048352.6A CN201780048352A CN109716486B CN 109716486 B CN109716486 B CN 109716486B CN 201780048352 A CN201780048352 A CN 201780048352A CN 109716486 B CN109716486 B CN 109716486B
- Authority
- CN
- China
- Prior art keywords
- wire
- cutting
- silicon ingot
- silicon
- silicon wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 169
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 167
- 239000010703 silicon Substances 0.000 title claims abstract description 167
- 238000005520 cutting process Methods 0.000 title claims abstract description 71
- 238000000034 method Methods 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000006061 abrasive grain Substances 0.000 claims abstract description 80
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 50
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 8
- 235000012431 wafers Nutrition 0.000 claims description 110
- 239000002245 particle Substances 0.000 claims description 29
- 238000011109 contamination Methods 0.000 abstract description 29
- 238000001514 detection method Methods 0.000 abstract description 27
- 239000002002 slurry Substances 0.000 description 15
- 238000005498 polishing Methods 0.000 description 11
- 238000007747 plating Methods 0.000 description 7
- 238000012545 processing Methods 0.000 description 7
- 239000000243 solution Substances 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000002253 acid Substances 0.000 description 4
- 238000004070 electrodeposition Methods 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 239000002826 coolant Substances 0.000 description 3
- 239000010432 diamond Substances 0.000 description 3
- 229910003460 diamond Inorganic materials 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 230000003028 elevating effect Effects 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 238000005406 washing Methods 0.000 description 3
- 238000004804 winding Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000005491 wire drawing Methods 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 229910001369 Brass Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 235000011114 ammonium hydroxide Nutrition 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- 238000012993 chemical processing Methods 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 229960002050 hydrofluoric acid Drugs 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000001095 inductively coupled plasma mass spectrometry Methods 0.000 description 1
- 239000003112 inhibitor Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B27/00—Other grinding machines or devices
- B24B27/06—Grinders for cutting-off
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/04—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Abstract
The present invention proposes a method capable of suppressing contamination caused by nickel below a detection limit when a silicon ingot having a diameter exceeding 300mm is cut using a fixed abrasive wire saw. A method for cutting a silicon ingot by running at least one wire of fixed abrasive grains having a plurality of abrasive grains fixed on the surface of a bare wire and pushing and feeding the silicon ingot having a diameter exceeding 300mm into the wire of fixed abrasive grains, characterized in that the cutting of the silicon ingot is performed within a cutting time of 30 hours or less.
Description
Technical Field
The present invention relates to a method for cutting a silicon ingot, a method for manufacturing a silicon wafer, and a silicon wafer.
Background
A wire saw is a cutting device that winds a wire in a spiral manner at regular intervals with respect to a plurality of rollers to form a wire array, runs the wire while supplying slurry, presses a workpiece such as a silicon ingot against the wire array, and performs slicing processing on the workpiece. Since a plurality of wafers can be cut simultaneously from a workpiece by a wire saw, the wire saw is widely used in a process of slicing a silicon ingot to produce silicon wafers.
Fig. 1 is a schematic view of a main part of a general wire saw. The wire saw 10 shown in the figure includes a wire drawing/winding mechanism (not shown) for drawing or winding the wire 20, main rollers 30 arranged in parallel with a predetermined interval, a nozzle 40 for supplying a coolant to the main rollers 30, and a nozzle 50 for supplying a slurry to the wire 20. A plurality of grooves are formed at regular intervals on the surface of the main roller 30, and the wire 20 is wound around the grooves, thereby forming a wire train. Above the wire array, a work holding portion 60 that holds and presses the work W against the wires of the wire array is provided so as to be movable up and down by a lifting mechanism (not shown).
The wire 20 is operated by the wire drawing/winding mechanism, and the workpiece W is sliced by lowering the workpiece holding portion 60 by the elevating mechanism while the slurry is supplied from the nozzle 50 to the operated wire 20, and pressing the workpiece W against the wire 20 fed into the wire array. In addition, during processing, the main roller 30 is cooled by the coolant supplied from the nozzle 40.
Such wire saws are roughly classified into free-abrasive wire saws and fixed-abrasive wire saws, but free-abrasive wire saws are generally used for slicing silicon ingots having a diameter of 300mm or less. In the free abrasive wire saw, the wire is operated while continuously supplying slurry containing abrasive grains to the wire. Further, the workpiece is cut by the grinding action of the slurry fed into the workpiece processing section by the running of the wire. As described above, by using the free abrasive wire saw, a large number of wafers can be sliced at a time, and productivity can be greatly improved as compared with the conventional slicing process using the inner peripheral edge grindstone.
In recent years, wafers have become larger in diameter, and silicon ingots having diameters exceeding 300mm (for example, 450 mm) have been produced. However, when such a large-diameter silicon ingot is cut by a free abrasive wire saw, problems are caused by the use of slurry. For example, since slurry adheres to a wafer obtained by dicing, the slurry is removed in a subsequent cleaning step, but the slurry removal operation takes time. In addition, the slurry supplied during processing is scattered and attached to the wire saw device or the peripheral operation site, and the operation for removing the attached slurry is difficult. Further, in the free abrasive wire saw, since slicing is performed by the grinding action of the abrasive grains included in the slurry, the processing speed is lower than in the case of using the conventional inner peripheral edge grindstone.
In order to solve the above-described problem, the cutting of a silicon ingot having a diameter exceeding 300mm is gradually turned to the direction in which a fixed abrasive grain wire saw is used (for example, refer to patent document 1). The fixed abrasive grain wire saw includes a wire having abrasive grains fixed to a surface thereof over the entire length of the wire. That is, in the fixed abrasive grain wire saw, since the workpiece is sliced by the grinding action of the abrasive grains fixed to the surface, the coolant containing no abrasive grains can be used, and the problem caused by the slurry in the free abrasive grain wire saw can be solved.
Prior art literature
Patent literature
Patent document 1: japanese patent laid-open No. 2000-288902.
Disclosure of Invention
Technical problem to be solved by the invention
The fixed abrasive wire is a wire obtained by fixing abrasive grains 2 such as diamond on the surface of a bare wire such as a piano wire by electrodeposition using a nickel (Ni) plating layer 3. Therefore, it was judged that when a silicon ingot having a diameter exceeding 300mm was cut, there was a case where the contamination level by Ni was deteriorated in a short time.
Therefore, an object of the present invention is to propose a method capable of suppressing contamination caused by nickel below a detection limit when cutting a silicon ingot having a diameter exceeding 300mm using a fixed abrasive wire saw.
Solution for solving the technical problems
The present inventors have conducted intensive studies on a method for solving the above-mentioned problems. For this reason, the present inventors cut a silicon ingot under various cutting conditions, and analyzed the Ni contamination of the resulting silicon wafer in detail. As a result, it was found that Ni contamination of the obtained silicon wafer can be suppressed to be lower than the detection limit by dicing the silicon ingot in a dicing time of 30 hours or less, and the present invention was completed.
That is, the gist of the present invention is as follows.
(1) A method of cutting a silicon ingot by running at least one wire of fixed abrasive grains having a plurality of abrasive grains fixed on a surface of a bare wire and pushing and feeding the silicon ingot having a diameter exceeding 300mm into the wire of fixed abrasive grains to cut the silicon ingot, characterized in that the cutting of the silicon ingot is performed in a cutting time of 30 hours or less.
(2) The method for cutting a silicon ingot according to (1), wherein the abrasive grains are fixed to the surface of the bare wire using a nickel layer.
(3) The method for cutting a silicon ingot according to (1) or (2), wherein an average linear velocity of the fixed abrasive grain wire is set so that a flatness of a silicon wafer obtained by cutting the silicon ingot becomes a predetermined value, based on the predetermined cutting time and the particle diameter of the abrasive grain.
(4) The method for cutting a silicon ingot according to (3), wherein an average linear velocity of the fixed abrasive grain wire is set to Y (m/min) and an average particle diameter of the plurality of abrasive grains is set to X (μm) so as to satisfy the following formula (a).
Y≥-79.2×X+1979 （A）
(5) The method for cutting a silicon ingot according to any one of (1) to (4), wherein an average particle diameter of the plurality of abrasive grains is 5 μm or more and 15 μm or less.
(6) The method for cutting a silicon ingot according to any one of (1) to (5), wherein the predetermined cutting time is 15 hours or longer.
(7) The method for cutting a silicon ingot according to any one of (1) to (6), wherein the diameter is 450mm or more.
(8) A method for producing a silicon wafer, characterized in that after a silicon ingot is grown by a predetermined method, the silicon ingot is cut by the method for cutting a silicon ingot according to any one of the above (1) to (7) to obtain a plurality of silicon wafers.
(9) The method for producing a silicon wafer according to (8), wherein the predetermined method is a Czochralski method.
(10) A silicon wafer, characterized in that the silicon wafer has a diameter exceeding 300mm and a nickel concentration below a detection limit.
(11) The silicon wafer according to (10), wherein the TTV value is 20 μm or less.
(12) The silicon wafer according to the item (10) or (11), wherein the diameter is 450mm or more.
Effects of the invention
According to the present invention, when a silicon ingot having a diameter exceeding 300mm is cut using a fixed abrasive wire saw, the cutting time is set to 30 hours or less, and therefore contamination caused by nickel of the obtained silicon wafer can be suppressed to be lower than the detection limit.
Drawings
Fig. 1 is a schematic view of a main part of a general wire saw.
Fig. 2 is a schematic cross-sectional view of a wire of fixed abrasive particles used in the fixed abrasive particle wire saw used in the present invention.
Fig. 3 is a flowchart showing an example of a method for manufacturing a silicon wafer according to the present invention.
Fig. 4 is a graph showing the relationship between the cutting time and the Ni concentration for each of the average particle diameter of the abrasive grains and the linear velocity of the fixed abrasive grain wire, (a) is a graph for the case where the average particle diameter of the abrasive grains is 7 μm, (b) is a graph for the case where the average particle diameter of the abrasive grains is 10 μm, and (c) is a graph for the case where the average particle diameter of the abrasive grains is 13 μm.
Fig. 5 is a graph showing the relationship between the cutting time and TTV of a silicon wafer for each of the average particle diameter of abrasive grains and the linear velocity of a wire of fixed abrasive grains, (a) is a graph for the case where the average particle diameter of abrasive grains is 7 μm, (b) is a graph for the case where the average particle diameter of abrasive grains is 10 μm, and (c) is a graph for the case where the average particle diameter of abrasive grains is 13 μm.
Fig. 6 is a diagram showing conditions in which Ni contamination of a silicon wafer is suppressed within a detection limit and TTV of the silicon wafer is set to 20 μm or less in a dicing time of 15 hours or more.
Detailed Description
(method for cutting silicon ingot)
The present invention will be described in detail below with reference to the accompanying drawings. The method for cutting a silicon ingot according to the present invention is a method in which at least one wire of fixed abrasive grains having a plurality of abrasive grains fixed on the surface of a bare wire is operated and a silicon ingot having a diameter exceeding 300mm is pushed into the wire of fixed abrasive grains to cut the silicon ingot. The method is characterized in that the cutting of the silicon ingot is performed in a cutting time of 30 hours or less.
The present inventors have conducted intensive studies on a method of suppressing Ni contamination below the detection limit even when cutting a silicon ingot having a diameter exceeding 300mm using a fixed abrasive wire, and as a result, have found that cutting of the silicon ingot is extremely effective in a cutting time of 30 hours or less.
In the present invention, the term "suppressing Ni contamination to a level not higher than the detection limit" means that the Ni concentration of the silicon wafer obtained by the present invention is lower than 1×10 10 atoms/cm 3 。
The reason why Ni contamination can be suppressed to a detection limit or less by setting the cutting time to 30 hours or less is not necessarily clear, but it is conceivable that the cutting efficiency is improved by running the fixed abrasive grain wire at high speed, abrasion of abrasive grains is reduced, the cutting surface of the silicon ingot (i.e., the surface of the silicon wafer) is not in direct contact with the Ni plating layer of the fixed abrasive grain wire, or the contact time is reduced, ni is easily separated from the Si surface, even if Ni contacts the silicon wafer, in the vicinity of the surface of the silicon wafer, and then the contamination layer or the like is removed by subsequent mechanical and chemical processing.
On the other hand, the lower limit of the cutting time is not limited in any way in terms of suppressing Ni contamination below the detection limit. However, as will be described later, if the dicing time is shortened, the flatness of the obtained silicon wafer is lowered. Therefore, the cutting time is preferably longer than 10 hours. More preferably, the cutting time is 13 hours or longer, and still more preferably, the cutting time is 15 hours or longer.
The silicon ingot used in the present invention is a single crystal silicon ingot grown by a predetermined method. The method for growing the ingot is not particularly limited, and is, for example, a Czochralski (CZ) method or a Floating Zone (FZ) method. Among them, the CZ method is preferable from the viewpoint that a large-diameter ingot can be obtained.
In addition, the diameter of the silicon ingot used in the method for cutting a silicon ingot of the present invention exceeds 300mm, and even in the case of a large diameter ingot of 450mm or more, ni contamination can be suppressed below the detection limit. The silicon ingot may have an n-type conductivity or a p-type conductivity, and an appropriate dopant corresponding to the conductivity may be added. The resistivity can also be set to an appropriate value as needed.
Fig. 2 shows a schematic cross-sectional view of a wire of fixed abrasive particles used in a fixed abrasive particle wire saw used in the present invention. The fixed abrasive grain wire 21 shown in the figure is a wire in which the abrasive grains 2 are fixed to the surface 1a of the bare wire 1 by electrodeposition using the Ni plating layer 3. For drawing and rust prevention at the production stage, the surface 1a of the bare wire 1 may be coated with brass before the abrasive grains 2 are electrodeposited.
As the bare wire 1 to which the abrasive grain wire 21 is fixed, a steel wire (piano wire) or the like can be used. The diameter of the bare wire 1 is preferably 80 μm or more and 130 μm or less. By setting the diameter of the bare wire 1 to 80 μm or more, a fixed abrasive grain wire having sufficient strength can be produced. On the other hand, by setting the diameter of the bare wire to 130 μm or less, the kerf loss at the time of dicing can be sufficiently reduced.
As the abrasive grains 2 electrodeposited on the bare wire 1, diamond, CBN (cubic boron nitride), al can be used 2 O 3 Known abrasive grains made of SiC, and the like. The average particle diameter of the abrasive grains 2 is preferably 5 μm or more and 15 μm or less. By setting the average particle diameter of the abrasive grains 2 to 5 μm or more, abrasion of the abrasive grains 2 caused by use of the fixed abrasive grain wire 21 can be suppressed, and thusThe fixed abrasive wire 21 can be used for a long period of time. On the other hand, by setting the average particle diameter of the abrasive grains 2 to 15 μm or less, the kerf loss at the time of dicing can be reduced, and mechanical damage to the dicing surface by the fixed abrasive grain wire 21 can be suppressed, and the flatness of the dicing surface can be improved. More preferably, the average particle diameter is 7 μm or more and 13 μm or less.
The electrodeposition of the abrasive grains 2 on the bare wire 1 is performed by, for example, successively performing degreasing treatment, water washing, acid washing, and water washing, and passing the bare wire 1 connected to the cathode electrode through an electrolytic plating bath (Ni plating bath or the like) in which an electrolytic plating solution in which the abrasive grains 2 are dispersed is stored and a metal plate connected to the anode electrode is immersed. In this way, the Ni plating layer 3 is formed on the outer peripheral surface 1a of the bare wire 1, and the abrasive grains 2 in the electrolytic plating solution are fixed and attached to the bare wire 1 by the Ni plating layer 3. The thickness of the Ni plating layer 3 to which the abrasive grain wire 21 is fixed is set to a thickness at which a part of the abrasive grains 2 is exposed from the surface.
The average linear velocity of the fixed abrasive grain wire 21 is preferably 800 m/min or more and 2500 m/min or less. Here, by setting the average linear velocity to 800 m/min or more, the straightness of the wire rod can be improved and the flatness of the cut surface can be improved. Further, by setting the thickness to 2500 m/min or less, heat generation due to wire operation can be suppressed, and warpage can be suppressed by suppressing thermal deformation of the main roller or the main shaft.
Such a fixed abrasive wire 21 is mounted on the wire saw illustrated in fig. 1 and is run at a prescribed average wire speed. The slurry is supplied to the wire rod, and the workpiece holding portion is moved to the wire rod side by the elevating mechanism and pushed into the wire rod, whereby the silicon ingot can be cut.
As described above, in the present invention, it is important to set the cutting time of the ingot to 30 hours or less. The cutting time can be obtained from the radial cutting speed of the silicon ingot and the diameter of the silicon ingot. Further, by adjusting the load of pressing the silicon ingot against the fixed abrasive wire by the elevating mechanism, the cutting speed in the radial direction of the silicon ingot can be adjusted.
In the present invention, it is preferable that the average linear velocity of the fixed abrasive grain wire 21 is set so that the flatness of the silicon wafer obtained by cutting the silicon ingot is equal to or less than a predetermined value, depending on the cutting time and the grain size of the abrasive grains. As described above, the cutting time when cutting the silicon ingot is set to 30 hours or less, and Ni contamination can be suppressed below the detection limit. On the other hand, if the dicing time of the ingot is shortened, there is a problem that the flatness of the obtained silicon wafer is lowered. That is, suppression of Ni contamination and improvement of flatness of the obtained silicon wafer are in an adverse relationship.
The present inventors have conducted intensive studies on a method capable of suppressing Ni contamination below the detection limit and improving the flatness of the obtained silicon wafer. As a result, it was found that by appropriately setting the average linear velocity of the fixed abrasive grain wire rod in a suitable range of the cutting time of the silicon ingot and the grain size range of the abrasive grains, ni contamination of the obtained silicon wafer can be suppressed below the detection limit, and the flatness of the silicon wafer can be improved.
Here, "flatness of a silicon wafer" means TTV (Total Thickness Variation ) of the silicon wafer, and means a difference between a maximum value and a minimum value of a height from a reference plane in the silicon wafer. The term "improvement in flatness" means that the TTV of the silicon wafer is 20 μm or less. TTV can be measured by a wafer shape measuring device.
As shown in examples described later, it is preferable that the average linear velocity of the fixed abrasive grain wire rod is Y (m/min) and the average particle diameter of the plurality of abrasive grains is X (μm) so as to satisfy the following expression (a).
Y≥-79.2×X+1979 （A）
Thus, in the dicing time of 15 hours or longer, the Ni contamination of the obtained silicon wafer can be made lower than the detection limit, and the TTV of the silicon wafer can be set to 20 μm or less.
(method for producing silicon wafer)
Next, a method for manufacturing a silicon wafer according to the present invention will be described. The method for producing a silicon wafer according to the present invention is characterized in that after a silicon ingot is grown by a predetermined method, the silicon ingot is cut by the above-described method for cutting a silicon ingot according to the present invention, thereby obtaining a plurality of silicon wafers. Therefore, the process other than the cutting process of the silicon ingot is not limited at all. Hereinafter, a method for producing a single crystal silicon wafer from a silicon ingot by the CZ method will be described as an example.
Fig. 3 is a flowchart showing an example of a method for manufacturing a silicon wafer according to the present invention. First, in step S1, polycrystalline silicon charged into a quartz crucible is melted at about 1400 ℃ by the CZ method, and then a seed crystal is immersed in a liquid surface and pulled up while being rotated, thereby producing a silicon ingot. Here, boron, phosphorus, or the like is doped to obtain a desired resistivity. Further, by using a magnetic field application pulling (Magnetic field Czochralski, MCZ) method in which a magnetic field is applied at the time of ingot production, the oxygen concentration in the silicon ingot can be controlled.
Next, in step S2, the obtained silicon ingot is subjected to a peripheral grinding treatment to have a uniform diameter, and then the silicon ingot is cut by the above-described method for cutting a silicon ingot according to the present invention, and the silicon ingot is sliced to a thickness of about 1mm, thereby obtaining a silicon wafer.
In this case, it is important to cut the silicon ingot in a cutting time of 30 hours or less. Thus, ni contamination of the obtained silicon wafer can be suppressed to be lower than the detection limit, specifically, ni concentration of the silicon wafer can be made lower than 1×10 10 atoms/cm 3 。
Next, in step S3, the silicon wafer is sliced and then cleaned. Since a mixture of silicon chips (powder), ethylene glycol, and a polishing agent adheres to the surface of the silicon wafer immediately after dicing, the silicon wafer is subjected to a post-dicing cleaning process to remove these.
Then, in step S4, the obtained silicon wafer is transported to a polishing apparatus, and polished with an alumina polishing agent or the like. Thus, the wafer thickness is set to a predetermined value, and parallelism between the front surface and the back surface of the wafer can be improved.
Next, in step S5, the silicon wafer is polished and then cleaned. Silicon chips (powder) and rust inhibitors, dispersants, and polishing agents as polishing oil components are adhered to the surface of the silicon wafer immediately after polishing treatment. Therefore, a post-polishing cleaning process is performed on the silicon wafer to remove these.
Next, in step S6, the wafer is subjected to acid etching using an aqueous solution containing at least one of fluoric acid, nitric acid, acetic acid, and phosphoric acid, alkali etching using an aqueous potassium hydroxide solution, an aqueous sodium hydroxide solution, or the like, or both the acid etching and the alkali etching, thereby eliminating the wafer warpage caused by the processing in the preceding step.
Next, in step S7, a mirror polishing process is performed on the silicon wafer subjected to the etching process using a polishing apparatus. In the present invention, DSP processing for polishing both sides of a wafer is performed. That is, a silicon wafer is set in a carrier, the wafer is sandwiched between an upper platen and a lower platen to which a polishing cloth is attached, a slurry such as colloidal silica is flowed between the upper platen and the lower platen and the wafer, the upper platen and the lower platen are rotated in opposite directions to each other, and mirror polishing is performed on both surfaces of the silicon wafer. Thus, the roughness of the wafer surface can be reduced, and a wafer having high flatness can be obtained.
Then, in step S8, the silicon wafer subjected to the double-sided polishing process is subjected to a cleaning process, and particles, organic matter, metal, and the like on the wafer surface are removed using, for example, an SC-1 cleaning solution that is a mixture of ammonia water, hydrogen peroxide water, and water, or an SC-2 cleaning solution that is a mixture of hydrochloric acid, hydrogen peroxide water, and water.
Finally, in step S9, various inspections are performed on the silicon wafer that has been cleaned, to check the flatness of the wafer, the number of LPDs on the wafer surface, damage, contamination of the wafer surface, and the like. In these inspections, only wafers that meet the predetermined quality are shipped as products.
Further, the wafer obtained in the above step may be subjected to annealing treatment or epitaxial film growth treatment as necessary, to thereby obtain an annealed wafer, an epitaxial wafer, an SOI (Silicon On Insulator ) wafer, or the like.
(silicon wafer)
Next, a silicon wafer according to the present invention will be described. The silicon wafer according to the present invention is characterized by having a diameter exceeding 300mm and a Ni concentration below the detection limit. The cutting of the silicon ingot according to the present invention is performed within a cutting time of 30 hours or less, and thus Ni contamination of the silicon wafer by the fixed abrasive wire can be suppressed and the Ni concentration of the obtained silicon wafer can be made lower than the detection limit.
Here, the term "Ni concentration is lower than the detection limit" means that the Ni concentration is lower than 1X 10 10 atoms/cm 3 。
In the present invention, the TTV value of the silicon wafer can be set to 20 μm or less. Further, even if the diameter of the silicon wafer is 450mm or more, the Ni concentration can be made lower than the detection limit.
Examples
Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the examples.
< cutting of silicon ingot >)
A single crystal silicon ingot with a diameter of 450mm (dopant: boron) was grown by the CZ method, and cut with a fixed abrasive wire saw to obtain 100 pieces of thickness: 1065 μm silicon wafer. In this case, as the wire rod for fixing abrasive grains, a wire rod was used in which the surface of the piano wire was brass-plated, and diamond having an average particle diameter of 7 μm was used as abrasive grains and was fixed to the surface of the piano wire by Ni electrodeposition. The average linear velocity of the fixed abrasive wire was 712 m/min, and the cutting time was 10 hours.
The above-described dicing was performed similarly for the case where the average particle diameter of the abrasive grains was 10 μm and 13 μm, the average linear velocity of the fixed abrasive grain wire was 950 m/min, 1188 m/min, 1425 m/min, 1663 m/min, 1900 m/min, and the dicing time was 15 hours, 20 hours, 25 hours, 30 hours, 35 hours, and 40 hours, and 100 silicon wafers were obtained under each dicing condition.
< evaluation of Ni contamination >
10 silicon wafers obtained under each dicing condition were prepared, and the Ni concentration was measured by the total dissolution evaluation method. Specifically, first, a reaction vessel comprising an acid-resistant container and a lid and having a support base disposed therein is prepared. The supporting table consists of a bracket and a workbenchThe flange is protruded on most part of the periphery of the workbench. Then, HF (hydrogen fluoride) and HNO are prepared 3 (nitric acid) and H 2 SO 4 (sulfuric acid) is uniformly mixed in a predetermined ratio.
Next, the decomposition solution was stored in a storage container, the silicon wafer was placed horizontally on the upper surface of the table, and then the storage container was closed by covering with a lid, and the container was left to stand at room temperature for about 12 hours. Thus, the silicon wafer is decomposed and sublimated, and a residue is obtained on the table of the support table. Then, the lid of the reaction vessel was opened, and 1ml of the dissolution liquid was added dropwise to each 1g of the residue to dissolve the residue, which was collected in a beaker.
Thereafter, the beaker was heated to 80 ℃ to decompose and sublimate the residue. Next, in HF and HNO 3 And (3) recovering a trace amount of impurities from the diluted aqueous solution, and quantitatively analyzing Ni contained in the recovered liquid by an ICP-MS analyzer. The results obtained are shown in FIG. 4.
As is clear from FIG. 4, when the cutting time is 30 hours or less, ni contamination can be suppressed to below the detection limit, i.e., below 1X 10, regardless of the average particle diameter of the abrasive grains and the average linear velocity of the fixed abrasive grain wire rod 10 atoms/cm 3 . On the other hand, if the dicing time exceeds 30 hours, ni contamination cannot be suppressed below the detection limit even in the silicon wafer obtained under any dicing conditions.
< evaluation of flatness >)
Each of the silicon wafers obtained under each dicing condition was prepared into 50 pieces, and the flatness of each silicon wafer was measured. Specifically, the TTV (Total ThicknessVariation ) of the silicon wafer was measured by using SBW-451/R manufactured by KOBELO scientific research. The results obtained are shown in FIG. 5. From this figure, it is clear that by appropriately setting the average linear velocity of the fixed abrasive grain wire according to the average particle diameter of the abrasive grains and the cutting time, ni contamination of the silicon wafer can be suppressed within the detection limit (that is, the cutting time is set to 30 hours or less), and TTV of the silicon wafer can be set to 20 μm or less.
Fig. 6 shows a condition in which Ni contamination of the silicon wafer is suppressed within a detection limit (i.e., the dicing time is set to 30 hours or less) and the TTV of the silicon wafer is set to 20 μm or less in a dicing time of 15 hours or more. This figure is a graph showing that in fig. 5, ni contamination of a silicon wafer can be suppressed within a detection limit and TTV of the silicon wafer can be set to an average linear velocity of a wire of fixed abrasive grains of 20 μm or less and an average particle diameter of the fixed abrasive grains in a dicing time of 15 hours or less.
The average linear velocity of the fixed abrasive wire is set to a value higher than the linear velocity shown in fig. 6 to satisfy the above formula (a), whereby Ni contamination of the obtained silicon wafer can be suppressed within the detection limit, the TTV of the silicon wafer can be set to 20 μm or less, and the silicon ingot can be cut in a short cutting time of 15 hours or more.
Industrial applicability
According to the present invention, when a silicon ingot having a diameter exceeding 300mm is cut using a fixed abrasive wire saw, the cutting time is set to 30 hours or less, and contamination caused by nickel in the obtained silicon wafer can be suppressed to be lower than the detection limit, which is useful for the semiconductor industry.
Description of the reference numerals
10-wire saw, 20-wire, 21-fixed abrasive wire, 30-main roller, 40, 50-nozzle, 60-work holding part, W-work.
Claims (5)
1. A method for cutting a silicon ingot by running at least one wire of fixed abrasive grains in which a plurality of abrasive grains are fixed on the surface of a bare wire using a nickel layer and pushing and feeding a silicon ingot having a diameter exceeding 300mm into the wire of fixed abrasive grains to cut the silicon ingot, characterized in that,
the cutting of the silicon ingot is performed within a cutting time of 15 hours to 30 hours,
setting an average linear velocity of the fixed abrasive grain wire so that a flatness of a silicon wafer obtained by cutting the silicon ingot is equal to or less than a predetermined value according to the cutting time and the grain diameter of the abrasive grain,
the average linear velocity of the fixed abrasive grain wire is set to Y, and the average particle diameter of the plurality of abrasive grains is set to X so as to satisfy the following formula a:
y is more than or equal to-79.2 X+1979 formula A,
wherein Y is m/min and X is um.
2. The method for cutting a silicon ingot according to claim 1, wherein,
the plurality of abrasive particles have an average particle diameter of 5 μm or more and 15 μm or less.
3. The method for cutting a silicon ingot according to claim 1 or 2, wherein,
the diameter is 450mm or more.
4. A method for manufacturing a silicon wafer is characterized in that,
after growing a silicon ingot by a prescribed method, the silicon ingot is cut by the cutting method of the silicon ingot according to any one of claims 1 to 3 to obtain a plurality of silicon wafers.
5. The method for manufacturing a silicon wafer as set forth in claim 4, wherein,
the prescribed method is a Czochralski method.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016153488A JP6642327B2 (en) | 2016-08-04 | 2016-08-04 | Method for cutting silicon ingot and method for manufacturing silicon wafer |
| JP2016-153488 | 2016-08-04 | ||
| PCT/JP2017/023606 WO2018025539A1 (en) | 2016-08-04 | 2017-06-27 | Method for cutting silicon ingot, method for manufacturing silicon wafer, and silicon wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109716486A CN109716486A (en) | 2019-05-03 |
| CN109716486B true CN109716486B (en) | 2024-01-09 |
Family
ID=61073740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780048352.6A Active CN109716486B (en) | 2016-08-04 | 2017-06-27 | Method for cutting silicon ingot, method for manufacturing silicon wafer, and silicon wafer |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP6642327B2 (en) |
| CN (1) | CN109716486B (en) |
| TW (1) | TW201812947A (en) |
| WO (1) | WO2018025539A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7103305B2 (en) * | 2019-05-29 | 2022-07-20 | 信越半導体株式会社 | How to cut the ingot |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11170169A (en) * | 1997-12-12 | 1999-06-29 | Toshiba Ceramics Co Ltd | Manufacturing method for semiconductor wafer and its device |
| JP2004237376A (en) * | 2003-02-04 | 2004-08-26 | Read Co Ltd | Single layer fixed abrasive grain wire saw, its manufacturing method and cutting method |
| CN1780901A (en) * | 2003-10-16 | 2006-05-31 | 三菱电机株式会社 | Slurry for slicing silicon ingot and method for slicing silicon ingot using same |
| JP2010074056A (en) * | 2008-09-22 | 2010-04-02 | Sumco Corp | Semiconductor wafer and method of manufacturing same |
| WO2011043177A1 (en) * | 2009-10-07 | 2011-04-14 | 株式会社Sumco | Method for cutting silicon ingot using wire saw, and wire saw |
| TW201204883A (en) * | 2010-07-21 | 2012-02-01 | Sumco Corp | Continuous casting method of silicon ingot |
| JP2015046474A (en) * | 2013-08-28 | 2015-03-12 | コマツＮｔｃ株式会社 | Method of manufacturing wafer and method for determining machining condition in wire saw |
-
2016
- 2016-08-04 JP JP2016153488A patent/JP6642327B2/en active Active
-
2017
- 2017-06-27 TW TW106121386A patent/TW201812947A/en unknown
- 2017-06-27 WO PCT/JP2017/023606 patent/WO2018025539A1/en active Application Filing
- 2017-06-27 CN CN201780048352.6A patent/CN109716486B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11170169A (en) * | 1997-12-12 | 1999-06-29 | Toshiba Ceramics Co Ltd | Manufacturing method for semiconductor wafer and its device |
| JP2004237376A (en) * | 2003-02-04 | 2004-08-26 | Read Co Ltd | Single layer fixed abrasive grain wire saw, its manufacturing method and cutting method |
| CN1780901A (en) * | 2003-10-16 | 2006-05-31 | 三菱电机株式会社 | Slurry for slicing silicon ingot and method for slicing silicon ingot using same |
| JP2010074056A (en) * | 2008-09-22 | 2010-04-02 | Sumco Corp | Semiconductor wafer and method of manufacturing same |
| WO2011043177A1 (en) * | 2009-10-07 | 2011-04-14 | 株式会社Sumco | Method for cutting silicon ingot using wire saw, and wire saw |
| TW201204883A (en) * | 2010-07-21 | 2012-02-01 | Sumco Corp | Continuous casting method of silicon ingot |
| JP2015046474A (en) * | 2013-08-28 | 2015-03-12 | コマツＮｔｃ株式会社 | Method of manufacturing wafer and method for determining machining condition in wire saw |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201812947A (en) | 2018-04-01 |
| JP2018022785A (en) | 2018-02-08 |
| JP6642327B2 (en) | 2020-02-05 |
| CN109716486A (en) | 2019-05-03 |
| WO2018025539A1 (en) | 2018-02-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6815352B1 (en) | Silicon focus ring and method for producing the same | |
| CN110079862B (en) | Silicon carbide single crystal substrate, silicon carbide epitaxial substrate, and methods for producing these | |
| KR101104635B1 (en) | Method for manufacturing epitaxial silicon wafer | |
| JP5910393B2 (en) | Method for manufacturing silicon carbide substrate | |
| WO2011021691A1 (en) | Method for producing epitaxial silicon wafer | |
| JP2011042536A (en) | Method for manufacturing epitaxial silicon wafer | |
| CN109716486B (en) | Method for cutting silicon ingot, method for manufacturing silicon wafer, and silicon wafer | |
| CN110140195B (en) | Method for polishing silicon wafer, method for manufacturing silicon wafer, and silicon wafer | |
| US7311775B2 (en) | Method for heat-treating silicon wafer and silicon wafer | |
| JP4912729B2 (en) | Outline processing method of silicon carbide single crystal ingot | |
| KR101303552B1 (en) | Method for chemically grinding a semiconductor wafer on both sides | |
| KR102466888B1 (en) | Method for processing single crystal silicon ingot to improve LLS ring/core pattern | |
| JP2006278701A (en) | Manufacturing method for semiconductor wafer | |
| US20220219287A1 (en) | Method for cutting polycrystalline silicon rod, method for manufacturing cut rod of polycrystalline silicon rod, method for manufacturing nugget of polycrystalline silicon rod, and polycrystalline silicon rod cutting device | |
| CN105849872B (en) | Dicing method | |
| JP2012114138A (en) | Epitaxial growth method of silicon wafer | |
| JP5578409B2 (en) | Semiconductor wafer manufacturing method | |
| JP2011044606A (en) | Method for manufacturing epitaxial silicon wafer | |
| JP6086167B2 (en) | Method for manufacturing silicon carbide substrate | |
| Маланич et al. | The influence of ethylene glycol on the chemical interaction of PbTe and Pb1–xSnxTe crystals with H2O2–HBr–ethylene glycol etching compositions | |
| JP2013084869A (en) | Silicon wafer cleaning method and silicon wafer manufacturing method using the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |