CN109671627A - Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier - Google Patents

Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier Download PDF

Info

Publication number
CN109671627A
CN109671627A CN201811580753.9A CN201811580753A CN109671627A CN 109671627 A CN109671627 A CN 109671627A CN 201811580753 A CN201811580753 A CN 201811580753A CN 109671627 A CN109671627 A CN 109671627A
Authority
CN
China
Prior art keywords
metal sulfide
transient metal
passivated
schottky
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811580753.9A
Other languages
Chinese (zh)
Inventor
陈杰智
马晓雷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong University
Original Assignee
Shandong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong University filed Critical Shandong University
Priority to CN201811580753.9A priority Critical patent/CN109671627A/en
Publication of CN109671627A publication Critical patent/CN109671627A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8126Thin film MESFET's

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A kind of interface processing method reducing silicon and transient metal sulfide semiconductor Schottky potential barrier, it is to be passivated processing in the surface of Si protium or fluorine element, then surface is carried out with the both ends of transient metal sulfide to contact, be barricaded as NIN type Schottky field-effect tube or PIP type Schottky field-effect tube.The energy difference at the conduction band bottom of the contact system after being passivated the surface Si with protium, fermi level and transient metal sulfide reduces, and reduces the Schottky barrier of system so as to be passivated the surface Si by protium;Secondly it is passivated the surface Si with fluorine element, p-type Schottky contacts can be become by original N-shaped Schottky contacts.This method selects traditional material silicon and transient metal sulfide to carry out surface contact, and is passivated processing to the surface Si by traditional passivation element hydrogen or fluorine, can reduce Si-MoS2The Schottky barrier of system, this, which is integrated into two-dimensional material in traditional silicon materials the following future microelectronics device, great directive significance.

Description

Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier
Technical field
The present invention relates to the interface processing methods of a kind of silicon and transient metal sulfide Schottky barrier, belong to electronic device Technical field.
Background technique
As traditional silicon channel metal-oxide-semiconductor is close to its miniature limit, need to substitute material in the rear silicon epoch Material.In past 10 years, carbon nanotube, graphene, the low-dimensional materials such as transient metal sulfide have good characteristic electron, each In kind two-dimensional material, it is considered with the thin transient metal sulfide semiconductor of fixed band gap (1-2eV) and atomic-level thickness It is the candidate material for being most hopeful alternative silicon channel.And the field effect transistor based on single layer transient metal sulfide is It manufactures and has made intensive studies.
When metal and semiconductor material contact, the semiconductor energy gap in interface is bent, and forms Schottky barrier.So And due to the fixation band gap of transient metal sulfide and lack suitable doping method, metal electrode and transition metal vulcanization High contact resistance and high Schottky barrier are formed between object, can significantly reduce the performance of transient metal sulfide transistor.Institute With, formed good N-shaped and p-type channel contact and reduce contact resistance be still transient metal sulfide contact it is heterogeneous integrated A major challenge.
Heterogeneous integrated this problem is contacted in order to solve transient metal sulfide, mainly studies different types of gold at present It is N-shaped contact that category and transient metal sulfide contact, most metals and transient metal sulfide, which contact intrinsic, although theoretically function The lower metal of function ratio and transient metal sulfide contact can reduce Schottky barrier, but since metal and transition metal vulcanize There are many interfacial states at the interface of object contact, Fermi's pinning is be easy to cause, with the metal and transient metal sulfide of different work functions Contact can not mostly form good N-shaped contact, and metal-transition metal sulfide systems Schottky barrier is relatively high, connects Electric shock resistance or it is bigger, and there is presently no research report metal and transient metal sulfide will form good p-type Xiao Special base potential barrier.
Summary of the invention
The present invention is higher for existing metal and transient metal sulfide contact Schottky barrier, Fermi caused by interfacial state Pinning problem provides a kind of reductions silicon and transition is golden on the achievable basis of actual semiconductor device processing technology Belong to the method for sulfide contact interface Schottky barrier.
The present invention reduces the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier, based on practical half The achievable processing technology of conductor device, using following technical scheme:
The surface of Si protium or fluorine element are passivated processing (making the unsaturated Si key bonding in surface), then with The both ends of transient metal sulfide carry out surface contact, are barricaded as NIN type Schottky field-effect tube or PIP type Schottky field-effect Pipe.
The silicon is Si (001), Si (110), Si (111) crystal face.
The transient metal sulfide is MoS2、MoSe2、MoTe2、WS2、WSe2Or WTe2
The surface of Si protium or fluorine element are passivated processing, are all passivated to the upper and lower surface of Si Processing is only passivated processing to the surface Si close to interface.
Heavy doping is carried out after the Si Passivation Treatment, doping concentration is at least up to 1 × 1022e/cm3.It in this way can be further Reduce the Schottky barrier of Si and transient metal sulfide surface contact system.Especially correspond to the surface contact of fluorine element passivation It is that after heavy doping Si, the Schottky barrier of system can drop to zero.
The Si carries out Si electron adulterated after protium is passivated.
The Si carries out hole doping after fluorine element is passivated, to Si.
Si is doped as electrode by the surface Si after protium Passivation Treatment, and transient metal sulfide is as ditch Road material, two sides and Si contact, form NIN type schottky barrier field effect transistor.Processing is not passivated with the surface Si Field-effect tube device is compared, Si electrode be passivated with hydrogen after field-effect tube, subthreshold value is lower, and on-state current is bigger, device performance It can significantly improve.
Si is carried out hole doping as electrode after fluorine element Passivation Treatment by the surface Si, and transient metal sulfide is made For channel material, two sides and Si contact form PIP type schottky barrier field effect transistor.
Discovery is calculated, the surface Si contacts after protium is passivated with transient metal sulfide, or forms N-shaped Schottky gesture It builds, it, can be with after the surface Si and the contact of transient metal sulfide surface through hydrogen passivation compared with the case where surface Si is not passivated Schottky barrier is substantially reduced, considers the influence of different crystal faces, Schottky barrier values drop to 0.16~0.21eV.
After the surface Si being passivated with fluorine and the contact of transient metal sulfide surface, discovery, the surface of the two are calculated Contact system becomes p-type Schottky contacts by original N-shaped Schottky contacts, and Schottky barrier is very low, especially Si (110) Schottky barrier is almost nil after crystal face and transient metal sulfide surface contact.
The present invention is based on traditional Si materials, are passivated the surface Si using protium or fluorine element, form Si and Transition Metal Sulfur Compound surface contacts system, compared with traditional metal-transition metal sulfide surface contacts system, with the Si and mistake after passivation After crossing metal sulfide contact, Fermi's pinning effect will not occur because of the reason of surface state, and silicon substrate two dimension may be implemented The relatively low Schottky barrier and low ohmic contact resistance of material.
The present invention is passivated processing in the surface of Si protium or fluorine element, silicon itself and transient metal sulfide Semiconductor contact is N-shaped Schottky barrier, and the contact system after the surface Si is passivated with protium, fermi level is closer to mistake Crossing the conduction band bottom of metal sulfide semiconductor, the energy difference at the conduction band bottom of fermi level and transient metal sulfide reduces, thus The surface Si can be passivated by protium reduces the Schottky barrier of system;Secondly it is passivated the surface Si with fluorine element, it can be by original The N-shaped Schottky contacts come become p-type Schottky contacts.
The present invention selects traditional material silicon and transient metal sulfide to carry out surface contact, and passes through traditional passivation element Hydrogen and fluorine are passivated processing to the surface Si, can reduce the Schottky gesture of Si and transient metal sulfide surface contact system It builds, and the transformation by N-shaped Schottky barrier to p-type Schottky barrier may be implemented by fluorine element, this is to future microelectronics Device, which is integrated into two-dimensional material in traditional silicon materials, great directive significance.
Detailed description of the invention
Fig. 1 is Si-MoS of the present invention2The atomic configuration schematic diagram of surface contact.
Fig. 2 is the interface system Schottky barrier variation schematic diagram after hydrogen, fluorine passivation silicon face.
Fig. 3 is Schottky field-effect tube schematic diagram in the present invention.
Fig. 4 is the original of Schottky field-effect tube of the silicon face through being formed after three kinds of different disposals with transient metal sulfide Minor structure figure.
Fig. 5 be according to the present invention in the n-type device that is formed of two kinds of Si surface passivation modes and p-type device in various grids electricity The variation of potential barrier under the conditions of pressure.
Specific embodiment
The method of present invention reduction silicon and transient metal sulfide semiconductor Schottky potential barrier is two tables up and down to Si Face, which is all passivated, is perhaps only passivated namely by protium or fluorine element by table that side Si close to semiconductor surface The unsaturated Si key bonding in face, surface passivating treatment are a kind of well known processes.Surface protium or the fluorine member of Si Element is passivated after processing, can be carried out surface contact with the both ends of transient metal sulfide, is barricaded as NIN type Schottky respectively Field-effect tube and PIP type Schottky field-effect tube.Si-MoS after protium is passivated2System will carry out electronics to Si and mix It is miscellaneous.Si-MoS after fluorine element is passivated2System will carry out hole doping to Si.
Below in conjunction with attached drawing by the description to specific embodiment, the method that present invention be described in more detail.
Interface system of the invention is the interface system of transient metal sulfide and the contact of the surface Si, transient metal sulfide Part is with MoS2For, silicon is placed on MoS2On, for Si as traditional material, doping techniques are mature, and it is light to can use the prior art The Si conductor of pine nut cash attribute carries out electron adulterated, doping concentration 1 × 10 to the part Si19e/cm3, the part Si is allowed to become one A conductor.Without (111) face Si of surface passivating treatment and MoS2N-shaped contact berrier, Schottky barrier are formed after the contact of surface About 0.6eV.And with other two different crystal faces, Si (001), (110) respectively and MoS2Contact calculates discovery crystal face To the influence very little of the result of Schottky barrier.
The unsaturated dangling bonds in the surface Si are used into protium, fluorine element Passivation Treatment respectively, it is full through protium and fluorine element Si later is respectively and MoS2Surface contact is carried out, discovery is calculated, the surface Si is after protium is passivated and MoS2Contact, still N-shaped Schottky barrier is formed, compared with the case where surface Si is not passivated, the surface Si and MoS through hydrogen passivation2After the contact of surface Schottky barrier can be substantially reduced, consider the influence of different crystal faces, Schottky barrier values drop to 0.16~0.21eV. for With fluorine be passivated the surface Si and MoS2After the contact of surface, discovery, Si-MoS are calculated2Surface contacts system by original N-shaped Xiao Te Ji contact becomes p-type Schottky contacts, and Schottky barrier is very low, especially Si (110) crystal face and MoS2Surface contact Schottky barrier is almost nil afterwards.
As shown in Figure 1, taking Si-MoS2Surface contact system, wherein Fig. 1 (a) with Si (111) face directly and MoS2It carries out Surface contact, the upper and lower surface of Si are not passivated processing, wherein Si and MoS2The distance between interface is 3.2 angstroms, at this time Minimum energy, system are most stable.Si-MoS in Fig. 1 (b)2Surface contacts system, and the upper and lower surface of Si is passivated with protium Processing.Si-MoS in Fig. 1 (c)2Surface contacts system, and the upper and lower surface of Si is passivated processing, MoS after passivation with fluorine element2Away from The shortest distance from protium or fluorine element is also 3.2 angstroms.By verifying, the upper and lower surface of Si is all passivated and is only passivated Close to interface the surface Si, the schottky barrier height that both passivating methods obtain be it is close, say, fill from the prior art After entering the gas containing protium or fluorine element, the upper and lower surface of Si can be all passivated, and be difficult control and only carried out in unilateral Si Passivation.
As shown in Fig. 2 (a), the Si and MoS of surface free processing2After contact, the fermi level of system is close to MoS2Conduction band Bottom illustrates Si-MoS2Surface contact system is N-shaped contact.Define MoS2Energy difference of the conduction band bottom apart from fermi level be system Schottky barrier height obtain Si-MoS by comparing the energy difference at conduction band bottom to fermi level2The Schottky barrier of contact It is 0.6eV.As shown in Fig. 2 (b), the surface of Si is passivated processing with protium, finds the fermi level of system toward MoS2's Conduction band bottom is mobile, and after hydrogen passivation, the Schottky barrier of system drops to 0.21eV, such as Fig. 2 from original 0.6eV for discovery (c) shown in, the surface of Si is passivated processing with fluorine element, finds the fermi level of system very close to MoS2Top of valence band, And system fermi level and MoS2Top of valence band energy difference it is very small, illustrate Si-MoS2Surface contacts system, the surface Si warp It crosses after fluorine element passivation, becomes p-type Schottky contacts, and the value of Schottky barrier by original N-shaped Schottky contacts It is very low.
Meanwhile the surface Si the case where being passivated with protium, the part Si is carried out electron adulterated (n-type doping), is found low dense Electron adulterated (the 1 × 10 of degree19e/cm3~1 × 1021e/cm3) Schottky barrier of system is influenced less, when the doping of electronics Concentration reaches 1 × 1022e/cm3(N-shaped heavy doping), the Schottky barrier of system is just begun to decline.Conversely, being carried out to the part Si empty (p-type doping) is adulterated in cave, finds the hole doping (1 × 10 of low concentration19e/cm3~1 × 1021e/cm3) to the Schottky of system Potential barrier influences less, when hole doping concentration reaches 1 × 1022e/cm3(p-type heavy doping), the Schottky barrier of system increases rapidly Add.
The case where surface Si is passivated with fluorine element, the part Si either n-type doping or p-type doping, doping concentration is to body The Schottky barrier of system influences less, when the part Si carries out p-type heavy doping, doping concentration 1 × 1022e/cm3When, the p-type of system Schottky barrier disappears substantially.
MoS2Other five kinds of transient metal sulfide (MoSe can also be used2,MoTe2,WS2,WSe2,WTe2), to this five Kind transient metal sulfide (MoSe2,MoTe2,WS2,WSe2,WTe2) also calculated, also, it was found that the surface Si-TMDs connects The fermi level of contact system forms N-shaped Schottky contacts close to the conduction band bottom of transient metal sulfide, and the surface Si is passivated by hydrogen Afterwards, conduction band bottom of the fermi level closer to transient metal sulfide of system is contacted, N-shaped Schottky potential drop is low.When the surface Si After carrying out fluorine element passivation, top of valence band of the fermi level close to transient metal sulfide of system is contacted, by original N-shaped Xiao Te Base contact becomes p-type Schottky contacts.The influence of Si difference crystal face, Si (001), Si (110), Si (111) crystalline substance are considered simultaneously Face is contacted with six kinds of transient metal sulfides respectively, when the surface Si is not passivated processing, (110) face Si and transition metal The Schottky barrier that sulfide surface contacts is relatively low, and Si (001), (111) face Si and transient metal sulfide surface connect The Schottky barrier obtained after touching is relatively high.And the surface Si is passivated after processing, although different Si crystal faces is to contact The influence of system Schottky barrier is little, but (110) face Si is still easy to get lower Schottky barrier.
Fig. 3 is Schottky field-effect tube schematic diagram, traditional metal/MoS2Fermi's pinning at contact surface leads to high Xiao Special base potential barrier, this schottky barrier height often influence the ability of regulation and control of grid, and high Schottky barrier frequently can lead to volume Outer contact resistance, to influence the performance of device.And Si and MoS2Contact is passivated the surface Si by protium and fluorine element, The Schottky barrier of contact surface can be reduced, often in Schottky field-effect tube, the Schottky barrier of contact is smaller, grid Regulating and controlling effect can be stronger.
Fig. 4 is silicon face after three kinds of different disposals, and Si is allowed to do electrode and MoS2The Xiao Te being barricaded as after two end in contact Base field-effect tube schematic diagram.Fig. 4 (a) is Si surface free Passivation Treatment, and Si is source electrode and drain electrode, MoS2It is channel material, Si And MoS2The both ends Schottky field-effect tube of taking surface contact method to be barricaded as, surface itself Si and MoS not handled2Surface N-shaped Schottky contacts after contact, to Si part carry out it is electron adulterated, allow Si formed good conductor, this Schottky field-effect tube It is NIN type field-effect tube.Fig. 4 (b) is to do source electrode and drain electrode later with the surface hydrogen Passivation Treatment Si, with MoS2Both ends carry out table Face contact just configuration Schottky field-effect tube, Si and MoS after hydrogen Passivation Treatment2N-shaped Xiao is remained after the contact of surface Te Ji contact, to Si part carry out it is electron adulterated, allow Si formed good conductor, this Schottky field-effect tube is NIN type field-effect Pipe.Fig. 4 (c) is that the surface Si carries out doing source electrode and drain electrode and MoS after fluorine Passivation Treatment2Both ends carry out surface contact build One Schottky field-effect tube, Si and MoS after fluorine Passivation Treatment2Surface contact is p-type Schottky contacts, to the part Si Hole doping is carried out, allows Si to form good conductor, this Schottky field-effect tube is PIP type field-effect tube.It is compared by calculating, Si The Asia of the device for the Schottky field-effect tube that Schottky field-effect tube obvious specific surface of the surface by protium passivation is not passivated Threshold value is lower, and the on-state current of device is bigger, it may be said that the bright surface Si is passivated through hydrogen and MoS2After contact, Schottky barrier drop Low, contact resistance becomes smaller, and device performance can improve.And the surface Si is after fluorine is passivated and MoS2The Schottky field-effect tube table of contact Reveal p-type electric-conducting characteristic, so Si and MoS after fluorine passivation2Surface contact is transformed into p-type by original N-shaped Schottky contacts Schottky contacts.
Fig. 5 be according to the present invention in the n-type device that is formed of two kinds of Si surface passivation modes and p-type device in various grids electricity The variation of potential barrier under the conditions of pressure.If Fig. 5 (a) is the N-shaped Schottky field-effect tube formed with the hydrogen passivation surface Si, in positive grid voltage Under the action of, the fermi level and MoS of system2Barrier height between conduction band bottom is weakened, and is conducive in carrier injection channel It is conducted, the electric current in channel increases;On the contrary, with grid voltage, the fermi level and MoS of system is weakened2Between conduction band bottom Barrier height is further pulled up, it is suppressed that carrier conducts in channel, and channel current reduces.The Si and MoS of fluorine passivation2Shape At be p-type contact Schottky field-effect tube, the majority carrier in channel is hole, as shown in Fig. 5 (b), in positively biased grid voltage Under conditions of, hole needs to overcome fermi level and MoS2The huge barrier height of top of valence band just can enter in channel, negative To under conditions of bias, hole needs to overcome fermi level and MoS2The barrier potential difference of top of valence band is small by drawing, and hole is injected into channel It is interior, break-over of device.

Claims (9)

1. a kind of interface processing method for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier, it is characterized in that:
The surface of Si protium or fluorine element are passivated processing, then carry out surface with the both ends of transient metal sulfide Contact, is barricaded as NIN type Schottky field-effect tube or PIP type Schottky field-effect tube.
2. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: the silicon is Si (001), Si (110), Si (111) crystal face.
3. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: the transient metal sulfide is MoS2、MoSe2、MoTe2、WS2、WSe2Or WTe2
4. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: the surface of Si protium or fluorine element are passivated processing, it is all to be carried out to the upper and lower surface of Si Passivation Treatment is only passivated processing to the surface Si close to interface.
5. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: carrying out heavy doping after the Si Passivation Treatment, doping concentration is at least up to 1 × 1022e/cm3
6. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: the Si after protium is passivated, carries out Si electron adulterated.
7. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: the Si carries out hole doping after fluorine element is passivated, to Si.
8. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: Si is carried out electron adulterated as electrode, transition metal vulcanization by the surface Si after protium Passivation Treatment Object forms NIN type schottky barrier field effect transistor as channel material, two sides and Si contact.
9. the interface processing side according to claim 1 for reducing silicon and transient metal sulfide semiconductor Schottky potential barrier Method, it is characterized in that: Si is carried out hole doping as electrode, transition metal vulcanization after fluorine element Passivation Treatment by the surface Si Object forms PIP type schottky barrier field effect transistor as channel material, two sides and Si contact.
CN201811580753.9A 2018-12-24 2018-12-24 Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier Pending CN109671627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811580753.9A CN109671627A (en) 2018-12-24 2018-12-24 Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811580753.9A CN109671627A (en) 2018-12-24 2018-12-24 Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier

Publications (1)

Publication Number Publication Date
CN109671627A true CN109671627A (en) 2019-04-23

Family

ID=66147137

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811580753.9A Pending CN109671627A (en) 2018-12-24 2018-12-24 Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier

Country Status (1)

Country Link
CN (1) CN109671627A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101290875A (en) * 2007-04-19 2008-10-22 德克萨斯大学体系董事会 Discrete silicon-containing substrate and device low temperature manufacture
CN105762222A (en) * 2015-06-30 2016-07-13 中国石油大学(华东) Pd/MoS2/SiO2/Si/SiO2/In multi-junction photo-detector and preparation method thereof
US20170133476A1 (en) * 2002-08-12 2017-05-11 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
CN108231817A (en) * 2018-01-29 2018-06-29 杭州紫元科技有限公司 A kind of low-power consumption charge coupling device based on two-dimensional material/insulating layer/semiconductor structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170133476A1 (en) * 2002-08-12 2017-05-11 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
CN101290875A (en) * 2007-04-19 2008-10-22 德克萨斯大学体系董事会 Discrete silicon-containing substrate and device low temperature manufacture
CN105762222A (en) * 2015-06-30 2016-07-13 中国石油大学(华东) Pd/MoS2/SiO2/Si/SiO2/In multi-junction photo-detector and preparation method thereof
CN108231817A (en) * 2018-01-29 2018-06-29 杭州紫元科技有限公司 A kind of low-power consumption charge coupling device based on two-dimensional material/insulating layer/semiconductor structure

Similar Documents

Publication Publication Date Title
Björk et al. Vertical surround-gated silicon nanowire impact ionization field-effect transistors
Chen et al. Symmetric U-shaped gate tunnel field-effect transistor
CN102947921B (en) Semiconductor device
Riel et al. InAs-Si heterojunction nanowire tunnel diodes and tunnel FETs
US20230223443A1 (en) Silicon carbide semiconductor device
WO2013055915A2 (en) Semiconductor devices having a recessed electrode structure
CN103268889A (en) Junction-free transverse tunneling field effect transistor
CN106941117B (en) Gallium nitride radical heterojunction current apertures device based on suspension superjunction and preparation method thereof
CN109119463A (en) A kind of lateral trench type MOSFET element and preparation method thereof
CN114823911A (en) Groove silicon carbide MOSFET integrated with high-speed freewheeling diode and preparation method
CN117476774B (en) Structure, manufacturing method and electronic equipment of vertical silicon carbide transistor
CN206250202U (en) A kind of enhanced GaN HEMT epitaxial material structures
CN117497601B (en) Structure, manufacturing method and electronic equipment of planar silicon carbide transistor
CN105957886B (en) A kind of silicon carbide bipolar junction transistor
Vadizadeh et al. Silicon on raised insulator field effect diode (SORI-FED) for alleviating scaling problem in FED
Zhang et al. Strong room-temperature negative transconductance in an axial Si/Ge hetero-nanowire tunneling field-effect transistor
CN109671627A (en) Reduce the interface processing method of silicon and transient metal sulfide semiconductor Schottky potential barrier
CN106057902A (en) High performance MOSFET and manufacturing method thereof
CN217037151U (en) Semiconductor power device
CN206672934U (en) The SiCJFET devices of integrated schottky diode
CN106449768B (en) A kind of JFET pipe
Zhang Simulation and fabrication of GaN-based vertical and lateral normally-off power transistors
Wang et al. Recessed-anode AlGaN/GaN diode with a high Baliga's FOM by combining a p-GaN cap layer and an anode-connected p-GaN buried layer
CN107068740A (en) Source ladder field plate vertical-type power transistor
Heo et al. Analysis of Multiple Fin-type Vertical GaN Power Transistors based on Bulk GaN Substrates

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190423