CN109656840A - A kind of device of data encrypting and deciphering, method, storage medium and data-storage system - Google Patents
A kind of device of data encrypting and deciphering, method, storage medium and data-storage system Download PDFInfo
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- CN109656840A CN109656840A CN201811573674.5A CN201811573674A CN109656840A CN 109656840 A CN109656840 A CN 109656840A CN 201811573674 A CN201811573674 A CN 201811573674A CN 109656840 A CN109656840 A CN 109656840A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
Abstract
The present invention relates to a kind of device of data encrypting and deciphering, method, storage medium and data-storage systems.The data encrypting and deciphering device includes: the data encryption device writing data and being encrypted to memory to be written, and to the data decryption apparatus that the ciphertext data read from memory are decrypted;Wherein, the encryption and decryption of data uses the symmetry algorithm based on more wheel operations;Data encryption device includes: to write key scrambler, carries out scrambling calculating to key is write based on write address, generates scrambling and writes key;And data encryptor is write, the round key that key is progress first round encryption is write to scramble, generates ciphertext data to data progress cryptographic calculation is write;Data decryption apparatus includes: to read key scrambler, carries out scrambling calculating to key is read based on read address, generates scrambling and reads key;Key preprocessor reads key based on scrambling, generates the round key for carrying out first round decryption;And data decryptor is read, the round key decrypted using the first round is decrypted operation to ciphertext data and generates clear data.
Description
Technical field
The invention belongs to the relevant information security fields of integrated circuit, are applied to data safety storage, data encryption and solution
It is close, provide a kind of protection mechanism applied to chip stores data safety.
Background technique
Currently, the main stream approach for such as DRAM memory data encryption or is adopted by way of fixed key scrambling
It is encrypted with symmetry algorithm CTR mod formula.The advantages of both cipher modes is that enciphering rate is fast, is not almost had to memory read/write performance
Have an impact;The disadvantage is that encryption intensity is inadequate, attacker is by known-plaintext and obtains ciphertext, it is easy to crack cipher mode, reach
To steal information and the purpose for distorting content.
Data storage, when carrying out data storage to such as DRAM, NVMFlash memory etc., according to memory itself
Feature, in write operation, write request and after writing DSR, controller can issue memory write operation order;It is reading
When operation, after read request issues, controller can issue memory read command, and after several clock cycle, memory returns to reading
According to.In the case, due to from memory read data and to decrypt the time used longer, therefore lead to the entirety for obtaining clear data
It is delayed longer.
Financial payment field mainly uses AES, SM4 algorithm for encryption data at present, is the mainstream choosing of current data safety
It selects, but this application is mainly used for data communication and network transmission using upper, on memory encryption, calculates still without using symmetrical
The technology of method encryption, the mode that can reach the security intensity of one-time pad key less use.
Summary of the invention
[subject to be solved by the invention]
As information security is in the increasingly extensive of the fields such as data processing, data storage, cloud computing and large-scale data center
Application, data encrypting and deciphering processing and storage encryption and decryption processing be also concerned and pay attention to.For example, DDR data encryption,
NVMFlash data encryption, such encryption protect data safety, from attacking and destroying.
In addition, encryption safe intensity and implementation complexity have substantial connection, such as AES, DES, SM4 (former wireless office of SMS4
Domain net algorithm standard rules) etc. symmetry algorithms be applied since its security intensity is higher.But then, data encrypting and deciphering is handled
Challenge is proposed to memory performance, performance loss also becomes the Tradeoff point whether user uses security function.It realizes high
Safe and high performance data storage is the innovative point place of this patent.
In addition, the key generation time is longer in symmetry algorithm higher using implementation complexity such as AES, DES, SM4,
Along with data storage read data used in the long period, can make the time used in entire reading data and the process of decryption into
One step lengthens.Shorten decryption time and the first technical problem to be solved by the present invention.
[for solving the technical solution of technical task]
The present invention relates to a kind of data encryption device writing data and being encrypted to memory to be written, feature exists
In, comprising: key scrambler will be written into the write address when memory based on write data, scramble to key
It calculates, generates the descrambling key for being encrypted to write data, and write data encryptor, scrambled using the key
The descrambling key that device generates, encrypts write data, generates ciphertext data;Wherein, write data encryption equipment
Write data are encrypted using symmetry algorithm.
In above-mentioned data encryption device, cipher key change is different with address information change, accomplishes that address one is close
Key increases the safety of data in this way.
In above-mentioned data encryption device, be also possible to the key scrambler to the address information of the write address into
Row hash transformation, and linear transformation or nonlinear transformation are carried out together with the key, to export the descrambling key.
It in above-mentioned data encryption device, will be scrambled together with key after address mapping, increase cracks difficulty.
In above-mentioned data encryption device, it is also possible to the symmetry algorithm that write data encryption equipment uses for base
In the symmetry algorithm of N wheel operation, the descrambling key generated using the key scrambler is described in the execution of first round round key
Encryption, wherein N is 2 integral multiple natural number;Write data encryption equipment uses the pipelining with M grades, flows at every grade
The N/M wheel operation in the symmetry algorithm is executed in water, wherein M is the approximate number of N.
In above-mentioned data encryption device, write data encryption equipment uses pipeline organization, promotes data throughput, mentions
High data-handling efficiency.
In above-mentioned data encryption device, it is also possible to, further includes: write address scrambler adds the write address
Calculating is disturbed, scrambling write address is generated, for making the ciphertext data that the memory be written according to the scrambling write address;It is described to write
Address scrambler carries out linear transformation or nonlinear transformation to the address information of the write address, writes ground to generate the scrambling
Location.
In above-mentioned data encryption device, data writing address is scrambled, upsets the physical address of write-in memory,
Increase attack difficulty.
In above-mentioned data encryption device, being also possible to descrambling key described in one group of the key scrambler generation can
For the different size of encryption for writing data block;Write data block can be the data block as unit of storing physical unit,
The data block being also possible to as unit of performance data block.
Above-mentioned data encryption device can encrypt different size of data block, more convenient when being encrypted.
This patent is related to a kind of data decryption apparatus that the ciphertext data read from memory are decrypted, and feature exists
In, comprising: key scrambler adds key based on the read address for reading the ciphertext data from the memory
Calculating is disturbed, the descrambling key for the ciphertext data to be decrypted is generated, reads data decryptor, is scrambled based on the key
The ciphertext data are decrypted in the descrambling key that device generates, and obtain clear data;Wherein, the reading data decryptor
The ciphertext data are decrypted using symmetry algorithm.
In above-mentioned data decryption apparatus, be also possible to the key scrambler to the address information of the read address into
Row hash transformation, and linear transformation or nonlinear transformation are carried out together with the key, to export the descrambling key.
In above-mentioned data decryption apparatus, being also possible to the ciphertext data is by the symmetrical calculation by taking turns operation based on N
Method encryption made of, wherein N be 2 integral multiple natural number;Notebook data decryption device also has key preprocessor, based on described
The descrambling key that key scrambler generates, the wheel generated for carrying out first round decryption operation to the ciphertext data are close
Key;The round key that operation is decrypted for carrying out the first round read data decryptor and the key preprocessor is utilized to generate,
The clear data is obtained after executing N wheel decryption operation.
In above-mentioned data decryption apparatus, the N wheel operation of key pretreated whole is completed before reading data and returning, no
Added influence is generated to reading to be delayed, improves the treatment effeciency of ciphertext data.
In above-mentioned data decryption apparatus, it is also possible to the key preprocessor and uses the assembly line skill with L grades
Art executes N/L in every grade of flowing water and takes turns operation, wherein L is the approximate number of N.
In above-mentioned data decryption apparatus, it is also possible to the reading data decryptor and uses the assembly line skill with K grades
Art executes N/K in every grade of flowing water and takes turns operation, wherein K is the approximate number of N.
In above-mentioned data decryption apparatus, it is also possible to, further includes: read address scrambler adds the read address
Calculating is disturbed, scrambling read address is generated, so that the ciphertext data are read according to the scrambling read address from the memory;It is described
Read address scrambler carries out linear transformation or nonlinear transformation to the address information of the read address, reads ground to generate the scrambling
Location.
In above-mentioned data decryption apparatus, the movement for being also possible to the key preprocessor is read with from the memory
The movement of the ciphertext data executes parallel out;The key preprocessor is read in ciphertext data to be decrypted from memory
Before or while, it completes described for carrying out the generation of the round key of first round decryption operation.
This patent is related to a kind of data encrypting and deciphering device, comprising: to the number of memory to be written writing data and being encrypted
It is filled according to encryption device, and to the data deciphering that the ciphertext data for having been carried out the encryption read from memory are decrypted
It sets;Wherein, the data encryption device and the data decryption apparatus use the symmetry algorithm based on N wheel operation, wherein N is 2
Integral multiple natural number;The data encryption device includes: to write key scrambler, to be written into described deposit based on write data
Write address when reservoir carries out scrambling calculating to key is write, generates the scrambling for being encrypted to write data and write key,
And data encryptor is write, it is close to write the wheel that key is progress first round encryption with the scrambling for writing the generation of key scrambler
Key carries out N wheel cryptographic calculation to write data and generates the ciphertext data;The data decryption apparatus includes: reading key
Scrambler is carried out scrambling calculating to key is read, is generated based on the read address for reading the ciphertext data from the memory
Key is read in scrambling for the ciphertext data to be decrypted, and key preprocessor is generated based on the reading key scrambler
The scrambling read key, generates the round key for carrying out first round decryption, and reading data decryptor, utilizes the key
Preprocessor generates described for carrying out the round key of first round decryption, to ciphertext data progress N wheel decryption operation
Clear data after generating decryption.
In above-mentioned data encrypting and deciphering device, write address scrambler scrambles data writing address, upsets write-in and deposits
The physical address of reservoir increases attack difficulty.Data encrypting and deciphering uses pipeline organization, promotes data throughput, improves number
According to treatment effeciency.The N wheel operation of key pretreated whole is completed before reading data return, and does not generate additional shadow to reading to be delayed
It rings, improves the treatment effeciency of ciphertext data.
In above-mentioned data encrypting and deciphering device, being also possible to the data encryption device further includes write address scrambler, right
The write address carries out scrambling calculating, scrambling write address is generated, for the ciphertext data to be written according to the scrambling write address
The memory;The write address scrambler carries out linear transformation or nonlinear transformation to the address information of the write address, comes
Generate the scrambling write address;The data decryption apparatus further includes read address scrambler, carries out scrambling meter to the read address
It calculates, scrambling read address is generated, so that the ciphertext data are read according to the scrambling read address from the memory;The reading ground
Location scrambler carries out linear transformation or nonlinear transformation to the address information of the read address, to generate the scrambling read address.
In above-mentioned data encrypting and deciphering device, it is also possible to the key preprocessor and uses the assembly line skill with L grades
Art executes N/L in every grade of flowing water and takes turns operation, wherein L is the approximate number of N;Write data encryption equipment uses the stream with M grades
Waterline technology executes N/M in every grade of flowing water and takes turns operation, wherein M is the approximate number of N;The reading data decryptor, which uses, has K
The pipelining of grade executes N/K in every grade of flowing water and takes turns operation, wherein K is the approximate number of N.
The present invention relates to a kind of data encrypting and deciphering devices, using the symmetry algorithm based on N wheel operation, to the plaintext inputted
Data are encrypted, or the ciphertext data inputted are decrypted, wherein N is 2 integral multiple natural number;The data add solution
Close device includes: key scrambler, based on the access address to memory that system is specified, carries out scrambling calculating to key and gives birth to
At descrambling key, key preprocessor is generated based on the descrambling key that the key scrambler generates for carrying out first
Wheel decryption operation round key and data encrypting and deciphering device, based on the key scrambler generate the descrambling key, for
The clear data inputted executes the N wheel operation, generates the ciphertext data, or generate based on the key preprocessor
It is described for carrying out the round key of first round decryption operation, execute the N for the ciphertext data that are inputted and take turns operation,
Generate the clear data.
In the data encrypting and deciphering device, data writing address is scrambled, and upsets the physical address of write-in memory, is increased
Add attack difficulty.Data encrypting and deciphering uses pipeline organization, promotes data throughput, improves data-handling efficiency.Key is pre-
The N wheel operation of the whole of processing is completed before reading data and returning, and is not generated added influence to reading to be delayed, is improved ciphertext data
Treatment effeciency.
In above-mentioned data encrypting and deciphering device, it is also possible to add the access address with write address scrambler
Disturb calculating, generate scrambling access address, for according to the address to ciphertext data described in the memory read/write;The address adds
It disturbs device and linear transformation or nonlinear transformation is carried out to the address information of the access address, to generate the scrambling access address.
In above-mentioned data encrypting and deciphering device, it is also possible to the key preprocessor and uses the assembly line skill with L grades
Art executes N/L in every grade of flowing water and takes turns operation, wherein L is the approximate number of N;The data encrypting and deciphering device uses the stream with M grades
Waterline technology executes N/M in every grade of flowing water and takes turns operation, wherein M is the approximate number of N.
In above-mentioned data encrypting and deciphering device, be also possible to the movement of the key preprocessor with from the memory
The movement for reading the ciphertext data carries out parallel;The key preprocessor is read in ciphertext data to be decrypted from memory
Before or while out, complete described for carrying out the generation of the round key of first round decryption operation.
In above-mentioned data encrypting and deciphering device, be also possible to one group described in descrambling key can be used for different size of data
The encryption of block;The data block can be the data block as unit of storing physical unit, be also possible to be with performance data block
The data block of unit.
In above-mentioned data encrypting and deciphering device, being also possible to the symmetry algorithm is any in DES, AES, SM4 algorithm
Kind.
The present invention relates to a kind of data-storage systems, comprising: data encrypting and deciphering device described in any of the above embodiments, Yi Jiyong
In the storage control to ciphertext data described in memory read/write.
In above-mentioned data-storage system, it is also possible to the data encrypting and deciphering device and is built in the storage control
Inside device, close to context port, or close to bottom port memory.
In above-mentioned data-storage system, it is also possible to add the data that data are encrypted of writing of memory to be written
Close process, and to the data decrypting process that the ciphertext data for having been carried out the encryption read from memory are decrypted;Its
In, the data encryption process and the data decrypting process use the symmetry algorithm based on N wheel operation, wherein N be 2 it is whole
Several times natural number;The data encryption process includes: to write key scrambling step, to be written into the storage based on write data
Write address when device carries out scrambling calculating to key is write, generates the scrambling for being encrypted to write data and write key, with
And data encryption step is write, writing key with the scrambling is the round key for carrying out first round encryption, carries out N wheel to write data
Cryptographic calculation and generate the ciphertext data;The data decrypting process includes: to read key scrambling step, based on for from described
Memory reads the read address of the ciphertext data, carries out scrambling calculating to key is read, generate for the ciphertext data into
Key is read in the scrambling of row decryption, and key pre-treatment step is read key based on the scrambling, generated for carrying out first round decryption
Round key, and read data decryption step, using described for carrying out the round key of first round decryption, to the ciphertext data into
Row N wheel decrypts operation and generates the clear data after decryption.
The present invention relates to a kind of storage medium, record has following data encrypting and deciphering program: the data encrypting and deciphering journey
Sequence is used to execute the data encryption process writing data and being encrypted to memory to be written, and to read from memory by into
The data decrypting process that the ciphertext data of the encryption of having gone are decrypted;Wherein, the data encryption process and the data
Decrypting process uses the symmetry algorithm based on N wheel operation, wherein N is 2 integral multiple natural number;The data encryption process packet
It includes: writing key scrambling step, the write address when memory is written into based on write data, is scrambled to key is write
It calculates, generates the scrambling for being encrypted to write data and write key, and write data encryption step, write with the scrambling
Key is the round key for carrying out first round encryption, carries out N wheel cryptographic calculation to write data and generates the ciphertext data;Institute
Stating data decrypting process includes: to read key scrambling step, based on the reading for reading the ciphertext data from the memory
Location carries out scrambling calculating to key is read, and generates the scrambling for the ciphertext data to be decrypted and reads key, key pretreatment
Step reads key based on the scrambling, generates the round key for carrying out first round decryption, and read data decryption step, benefit
With described for carrying out the round key of first round decryption, after generating decryption to ciphertext data progress N wheel decryption operation
Clear data.
[invention effect]
The present invention uses different keys in each encryption or decryption, and the key is with memory read/write
The difference of location and it is different, when using symmetry algorithm encryption and decryption data, can further promote the safety of memory encryption and decryption.
In addition, using pipelining in the implementation procedure of enciphering and deciphering algorithm of the invention, data greatly improved
Throughput.
In addition, the present invention uses decruption key precomputation technology, return is initiated request to using to memory read access
The calculating of key is decrypted in the time interval of data, to reduce in data decrypting process caused by the generation of decruption key
Overall time delay.
Detailed description of the invention
Fig. 1 is the explanatory diagram for showing data encryption device and data decryption apparatus of the invention.
Fig. 2 is by data encryption device and the integrated explanatory diagram of data decryption apparatus of the invention.
Fig. 3 is the figure being illustrated to the calculating process of encryption and decryption of the invention.
Fig. 4 is the figure that the pipelining used to the present invention is illustrated.
Specific embodiment
Before being specifically described, by taking SM4 algorithm as an example, simply SM4 algorithm is illustrated.SM4 algorithm is domestic
Important commercial cipher algorithm, wherein all there are more wheel nonlinear iterations to calculate, for example for enciphering and deciphering algorithm and key schedule
32 wheel nonlinear iterations calculate.As shown in (A) and (B) of Fig. 3, decipherment algorithm is similar with the implementation procedure of Encryption Algorithm, only
Round key is opposite using sequence in decipherment algorithm and Encryption Algorithm, that is, decryption round key is the backward of encryption round key.
Enciphering and deciphering algorithm is briefly introduced below:
As shown in (A) of Fig. 3, based on round key rK0...rK31 to as encrypted object one group of clear data (X0,
X1, X2, X3) carry out 32 wheel interative computations after, obtain data (X32, X33, X34, X35) and obtain ciphertext after replacement Treatment
Data (Y0, Y1, Y2, Y3), that is, (Y0, Y1, Y2, Y3)=(X35, X34, X33, X32).
In addition, when the ciphertext data are decrypted, backward uses round key, that is, by rK31 as shown in (B) of Fig. 3
As the first round round key of decrypting process, backward using round key rk31, rk30 ..., rk0 to ciphertext data (Y0, Y1,
Y2, Y3), i.e. (X35, X34, X33, X32) carry out 32 wheel interative computations, data (X3, X2, X1, X0) is obtained, by replacement Treatment
Afterwards, clear data (M0, M1, M2, M3) is obtained, that is,
(M0, M1, M2, M3)=(X3, X2, X1, X0).
Therefore decryption transformation is similar with enciphering transformation process, but the round key of decryption transformation and enciphering transformation makes
It is different with sequence.In encryption, round key is rk0 (round key 0) using sequence, and (wheel is close by rk1 (round key 1) ..., rk31
Key 31);In decryption, round key is rk31 (round key 31), rk30 (round key 30) ..., rk0 (round key using sequence
0)。
In addition, synthesis displacement T is an inverible transform, it is combined by nonlinear transformation τ and linear transformation L1, i.e. T1
()=L1 (τ ()).Nonlinear transformation τ is made of 4 parallel S boxes, and S box is the transformation of fixed bit output, is denoted as
Sbox(.).That is,
B=τ (A)=(Sbox (a0), Sbox (a1), Sbox (a2), Sbox (a3)).
A indicates operation input, the input of T transformation in corresponding diagram 3.The B output that T is converted in corresponding diagram 3 after L is converted.
Since the particular content of synthesis transformation T belongs to well-known technique, therefore description is omitted herein.
Round key expansion algorithm is briefly introduced below:
The round key of the first round in Encryption Algorithm is generated by descrambling key by round key expansion algorithm, and next round
Round key is generated by last round of round key by round key expansion algorithm;Similarly, the wheel of the first round in decipherment algorithm is close
Key is actually the last round key in Encryption Algorithm, and the round key of next round is close by taking turns by the last round of round key used
What key expansion algorithm generated.That is, in the algorithm, round key is also that each wheel operation with Encryption Algorithm synchronously calculates generation
's.Since the operation and generation of the round key also belong to well-known technique, therefore description is omitted herein.
It is for a better understanding of the present invention, by taking SM4 algorithm as an example, to be carried out to the encrypting and decrypting process of symmetry algorithm above
Brief description, but the explanation not indicates that symmetry algorithm of the present invention is defined in SM4 algorithm.AES, DES, SMS4 etc.
Other symmetry algorithms also include similar algorithm structure, and belong to well-known technique, therefore in this detailed description will be omitted.
In the following, detailed description of embodiments of the present invention referring to attached drawing.
Fig. 1 is the explanatory diagram for showing the data encrypting and deciphering device 100 of the embodiment of the present invention.The data encrypting and deciphering device 100
With write data encryption device 101 and read data decryption apparatus 102.Wherein, write data encryption device 101, to being written
The data of writing of memory 116 are encrypted;The reading data decryption apparatus 102, for the ciphertext number read from memory 116
According to being decrypted.
It includes: to write key scrambler 103,107 and of write address scrambler that the embodiment of the present invention, which writes data encryption device 101,
Write data encryptor 105.Writing data encryption device 101, there are three input signals: writing data, i.e., the plaintext number that encrypted
According to;The specified address that will be write data and memory is written of write address, i.e. system;And key, i.e., system it is specified for pair
Write the key that data are encrypted.Writing data encryption device 101, there are two output signals: ciphertext data, i.e., by writing data encryption
Device completes encrypted data to data are write;And scrambling write address, i.e., write address system specified by write address scrambler
After being scrambled according to scheduled algorithm, ciphertext data will be actually written into the address of memory.
It is described to write key scrambler 103, based on system specify by write data write-in memory when write address, to close
Key carries out scrambling calculating, generates new for the descrambling key writing data and being encrypted.The key scrambler 103 of writing will be defeated
The address information that enters carries out such as hash transformation, then carries out linear transformation or nonlinear transformation together with key and to export scrambling close
Key writes data for encrypting.Descrambling key will be different with address information change as a result, realize the key of address one.?
This, is not particularly limited to the scrambled algorithm of key progress is write, can according to need using arbitrary scrambling algorithms.
Write data encryption equipment 105 carries out scheduled transformation based on the descrambling key for writing the generation of key scrambler 103
Afterwards or directly as the first round round key for being encrypted to clear data come using, clear data is encrypted, it is raw
At ciphertext data.In order to promote encryption intensity, writing data encryptor can be used symmetry algorithm such as DES/AES/SM4 scheduling algorithm
Ecb mode.Symmetry algorithm structure is usually more wheel operations, if DES algorithm is 16 wheel operations, the wheel fortune of aes algorithm 10,12,14
It calculates, SM4 algorithm supports 32 wheel operations.In addition, writing data encryptor in the present embodiment using stream to promote data throughput
The encryption of a packet data can be performed in waterline technology, each clock cycle.
In addition, delay is written caused by cryptographic calculation in order to reduce, it is more using every grade of flowing water execution to write data encryptor 105
The method for taking turns operation.Fig. 4 is the figure that the pipelining used to the present invention is illustrated.In fig. 4 it is shown that 32 wheel SM4
Algorithm, every grade of flowing water execute the example of two-wheeled (round) operation.Specifically, in the first order flowing water operation of cryptographic calculation,
System deploys associated hardware resource etc., so that simultaneously for being handled using the preceding two-wheeled operation of round key rk0, rk1, the
After the completion of the operation of level-one flowing water, the trigger of the first level production line is triggered, the data then obtained for its operation result, then
The second level flowing water operation for using round key rk2, rk3 is executed, and so on, round key is used in the 16th level production line
Rk30, rk31, which are calculated, obtains data output.Practical every grade of flowing water executes how many wheel operations, and those skilled in the art can root
It is set according to the work dominant frequency and production technology etc. of writing data encryptor 105, such as meets timing requirements in calculation resources
Under the premise of, most bull wheel number can be supported to calculate, i.e., only level-one flowing water, 32 wheel operations of execution also can be set as needed 32 grades
Flowing water, every grade executes 1 wheel operation.
Summary will be handled above are as follows: write data encryptor 105 and carried out based on scrambling using by the symmetry algorithm of N wheel operation
It calculates, and using the pipelining with M grades, executes N/M in each stage and take turns operation, wherein N is 2 integral multiple natural number, M
It is the approximate number of N.
Referring to (A) of Fig. 3, the course of work of write data encryption equipment 105 is described in detail.Fig. 3 be with
For 32 wheel SM4 algorithms.By taking first round operation as an example, firstly, to be encrypted is write data according to defined rule in advance, example
Such as, divided according to every 128bit, by using 128bit be one group of X0, X1, X2, X3 marked off, tetra- groups of data as input, base
In by by key scrambler scrambling after descrambling key carry out as defined in transformation obtain the round key rK0 of the first round (can also
Without transformation, directly using descrambling key as the round key rK0 of the first round) carry out first round operation.Specifically, it will take turns close
Key rk0 and data X1, X2, X3 carry out the nonlinear operation of symbol " T " expression, by the result obtained by the nonlinear operation with
X0 carries out linear operation represented by symbol "+", obtains one group of new data X4, completes the operation of the first round.Then, then with
X1, X2, X3 and data X4The operation of next round is continued based on the round key rk1 of the second wheel for input.Specifically,
The nonlinear operation that round key rk1 and data X2, X3, X4 are carried out to symbol " T " expression, by what is obtained by the nonlinear operation
As a result linear operation represented by symbol "+" is carried out with X1, obtains one group of new data X5, to complete the operation of the second wheel.
Next again with X2, X3, X4 and data X5 for input, the round key rk2 based on next round continues the fortune of next round
It calculates.Such interative computation, until carry out 32 wheel operations after, generate (X32, X33, X34, X35), finally to it is generated (X32,
X33, X34, X35) replacement Treatment is carried out, finally obtain the ciphertext data (Y0, Y1, Y2, Y3) for memory to be written.
Wherein, in addition to the round key rK0 of the first round, the round key that the round key of each round is all based on previous round is advised
Obtained from fixed operation, for example, rK1 is to be obtained by rK0 by defined operation, rk2 is to be obtained by rK1 by regulation operation
Arrive ... ... and so on, last round key rK31 is to be obtained by rK30 by defined operation.Due to the process of algorithm above
Belong to well-known technique, therefore omits more detailed description herein.
In addition, the write address scrambler 107, the address information of the write address for specifying to system carries out for example linear
Transformation or nonlinear transformation and obtain a new address so that ciphertext data are actually written into storage according to the new address
Device upsets the object of write-in memory so that the practical address being written into of ciphertext data is different from the originally specified write address of system
Address is managed, attack difficulty is increased.
New key is generated it is found that scramble to key based on write address by above, to realize an address
One key, and conceal actual ciphertext data writing address.The security intensity of data protection is greatly strengthened as a result,.
In addition, 103 generated one groups of descrambling keys of key scrambler of writing for writing data encryption device of the invention can be used for protecting not
With the data block of size, so that the flexibility of data protection increases.
The scrambling write address of the ciphertext data and the output of write address scrambler of writing the output of data encryptor 105 is synchronized to export
Memory is written according to timing sequence process to storage control.
Even if also can it should be noted that write data encryption device 101 does not have write address scrambler 107
The encryption of realization data, therefore the essential features of the write address scrambler 107 and non-present invention, but a kind of preferred implementation
Mode.
Above writing writes key scrambler 103, writes data encryptor 105, write address possessed by data encryption device 101
Scrambler 107 is only to illustrate, however it is not limited to which the constituted mode and specific algorithm mentioned in text, those skilled in the art can of course
It is encrypted as needed using other Encryption Algorithm etc. in the case where understanding technical idea of the invention.
Next, illustrating the reading data decryption apparatus 102 of the present embodiment.Data decryption apparatus 102 is read to be used for from storage
The ciphertext data that device 116 is read are decrypted.
Referring to Fig.1, the reading data decryption apparatus 102 of the present embodiment includes reading key scrambler 104, reading key preprocessor
108, read address scrambler 106, reading data decryptor 110.
Reading data decryption apparatus 102, there are three input information: read address, i.e. system it is specified for from memory read to
The address of the ciphertext data of decryption;The specified key for reading data to be decrypted of key, i.e. system;And from memory
The ciphertext data to be decrypted read.
Reading data decryption apparatus 102, there are two output informations: scrambling read address specifies system by read address scrambler
Read address scrambled according to scheduled algorithm after, the practical address that ciphertext data are read from memory;And by reading
According to the clear data after decryptor decryption.
The read address reading key scrambler 104 and being provided based on system, the key provided system carry out scrambling calculating,
Generate the descrambling key for the ciphertext data to be decrypted.In one embodiment, reading key scrambler 104 can be with
The key scrambler 103 of writing being described above uses identical logical algorithm, that is, reads key scrambler 104 and is based on specifying with system
Encrypted stored data originally when the identical read address of write address address information, according to identical as key scrambler 103 is write
Logical algorithm, scrambling calculating is carried out to key identical with the key that uses when encryption, to obtain and write key scrambler
The 103 identical descrambling keys of descrambling key generated, the decryption for ciphertext data.It configures in this way, enables to system
The management of key and write address, read address is become simply, system resource can be saved.
When the N of the symmetry algorithm of N that system uses wheel operation is 1, it can be directly based upon and read the output of key scrambler 104
Operation is decrypted in descrambling key.Such as the reading data decryptor 110 utilizes the descrambling key, when executing and encrypting originally
Opposite inverse operation is encrypted, ciphertext data to be decrypted.
In addition, adding when system using such as SM4 algorithm based on the symmetry algorithm for taking turns operations more with data above-mentioned of writing
Close device 105 accordingly, reads data decryptor 110 and calculating also is decrypted using the symmetry algorithm based on N wheel operation, but due to reading
Last round key when used first round round key actually corresponds to encryption is decrypted in data decryptor 110, therefore needs
Precompute end round key rK31.Certainly, which is also possible to take turns at the end generated in data encryption process close
After key rK31 is saved, directly transfers and use in decryption.
In the present embodiment, the descrambling key next life provided by reading key preprocessor 108 based on reading key scrambler 104
At the round key rK31 for first round decryption operation.
By taking (B) of Fig. 3 as an example, the course of work for reading data decryptor 110 is briefly described.Fig. 3 is with 32 wheel SM4
For algorithm.It reads key preprocessor 108 and carries out 32 wheel operations based on the descrambling key that key scrambler 104 provides is read, obtain
To the first round key rK31 for ciphertext data to be decrypted.Then, add for what is exported according to read address scrambler 106
Read address is disturbed (that is, the read address specified to system carries out the ciphertext data obtained after scrambling transformation actually depositing in memory
Storage address) four groups of data X35, X34, X33, X32 reading from memory are by writing data encryptor 105 (that is, with originally being generated
Ciphertext data Y0, Y1, Y2, Y3 are corresponding), by the line that round key rK31 and data X34, X33, X32 are carried out to symbol " T " expression
Property operation, the result and X35 that then will be obtained again by the linear operation carry out nonlinear operation represented by "+", counted
According to X31, the operation of the first round is completed.Then continue the fortune of next round using the X31 and X34, X33, X32 and rK30 as object again
It calculates.Specifically, the linear operation that round key rK30 and data X33, X32, X31 are carried out to symbol " T " expression, then will pass through
The result and X34 that the linear operation obtains carry out nonlinear operation represented by "+", obtain data X30, to complete the second wheel
Operation.Then continue the operation of next round using the X30 and X33, X32, X31 and rK29 as object again.So iterative calculation
After 32 wheels, data (X3, X2, X1, X0) is obtained.Backward processing is carried out to the data (X3, X2, X1, X0), finally obtains plaintext number
According to (M0, M1, M2, M3).
Wherein, similar with ciphering process, in addition to the round key rK31 of the first round, the round key of each round is all based on previous
Obtained from the round key of wheel carries out defined operation, for example, rK30 is to be obtained by rK31 by defined operation, rk29 is
Obtained by rK30 by regulation operation ... ... and so on, last round key rK0 is to be obtained by rK1 by defined operation.
Since the process of algorithm above belongs to well-known technique, therefore more detailed description is omitted herein.
As described above, either in DES still in other symmetry algorithms such as SM4, it is every since the first round in encryption
Wheel requires a round key for this wheel encryption;And when decryption, and since the first round, every wheel requires a use
In the round key of this wheel decryption.By taking the symmetry algorithm of 32 wheel operations as an example, 32 round key rk0- are successively used in ciphering process
Rk31, and backward uses these round key, i.e. rk31-rk0 in decrypting process, that is, it is different from ciphering process, it is needed in decryption
The key for being equivalent to the last round key rK31 of ciphering process is first calculated, therefore obtains decrypting used first round round key need
Want the regular hour.It is raw due to the complexity of algorithm itself especially in the symmetry algorithm based on more wheel operations such as SM4 algorithm
Needing for 64 periods when needing for 32 periods at encryption round key, and generating decryption round key, (calculating a wheel operation with each cycle is
Example), which can consume the regular hour.
It is close in reading in the past in addition, the regular hour also can be expended when reading data from memory 116 known to previous
First round round key needed for calculating its decryption after literary data again, then the time needed for the two is added, and data deciphering is caused to prolong
When it is longer.
For the efficiency for improving data deciphering, the embodiment of the present invention, which is equipped with, reads key preprocessor, is reading ciphertext data
Meanwhile first round round key needed for as the reading key preprocessor calculating data deciphering, thus improve the effect of decryption processing
Rate shortens the delay of data deciphering.That is, the generation wheel that the reading key preprocessor 108 for reading data decryption apparatus 102 is carried out is close
Key movement with from memory reading ciphertext data movement carry out parallel, preferably read out from memory 116 it is to be decrypted
Before or while the movement of ciphertext data is completed, reads key preprocessor 108 and complete whole N wheel operations, obtain for ciphertext
The first round round key that data are decrypted.For memories such as DRAM, NandFlash, read access time of return is deposited according to difference
Reservoir has differences, as long as reading the hardware resource etc. needed for key pretreatment calculates according to the suitably distribution such as performance of memory,
So that it is before obtaining read ciphertext data or is completed at the same time the calculating of the first round round key for decryption.Specifically
For, read key preprocessor based on the descrambling key reading key scrambler 104 and providing, converted according to scheduled rule and
Obtain round key rK0 (or round key rK0 can also be then based on directly using descrambling key as round key rK0), according to
Defined operation obtains round key rK1 and obtains the first round round key for being decrypted after such iteration executes 32 wheels
rK31.It reads data decryptor 110 and is based on the foregoing decryption operation of round key rk31 progress.Due to the calculating of each round key
Belong to well-known technique, therefore details are not described herein.
In the present embodiment, as writing data encryptor 105 with what is be described above, in reading key preprocessor 108
Pipelining can be used, each cycle is supported to generate one group of decryption round key, to promote data throughput, adapt to one-time pad key
Requirement.That is, reading key preprocessor can be used the pipelining with K grades, N/K is executed in each stage and takes turns operation,
Wherein, N is 2 integral multiple natural number, and K is the approximate number of N.In addition, reading data decryptor also can be used the assembly line skill with L grades
Art executes N/L in each stage and takes turns operation, wherein N is 2 integral multiple natural number, and L is the approximate number of N.Here, writing data encryptor
105 pipeline series, the pipeline series for reading key preprocessor 108 and the pipeline series for reading data decryptor 110
It may be the same or different.The pipeline series of preferred write data encryptor 105 and the assembly line for reading data decryptor 110
Series is identical.Those skilled in the art can be according to the work dominant frequency and life read key preprocessor 108, read data decryptor 110
Production. art etc. is set, such as under the premise of calculation resources meet timing requirements, and most bull wheel number can be supported to calculate, that is, only had
Level-one flowing water, execute SM4 algorithm all 32 takes turns operation, also can be set as needed 32 grades of flowing water, and every grade only carries out 1 wheel fortune
It calculates.
The round key reading data decryptor 110 and being generated using key preprocessor 108, to the ciphertext state of input
Operation is decrypted in the progress of ciphertext data as shown in (B) of Fig. 3, and output is in plain text.
In addition, reading data decryption apparatus 102 has read address scrambler 106, it is used to read ciphertext to what system provided
The read address of data carries out scrambling calculating according to the algorithm of regulation, generates scrambling read address, so that real according to the scrambling read address
Border reads ciphertext data from memory 116.In one embodiment, the read address scrambler 106 of data decryption apparatus 102 is read
Scrambling algorithms can be identical as the write address scrambler 107 of data encryption device 101 is write, that is, write address scrambler 107 is by predetermined
Scrambling write address is generated after the write address scrambling that algorithm specifies system, so that ciphertext data are by practical according to the scrambling write address
Memory is written, and when the ciphertext data are read out and be decrypted, read address scrambler 106 system is specified with work as
The just read address of write address system when encryption, is scrambled according to algorithm identical with write address scrambler 107, to obtain
Scrambling read address identical with scrambling write address when ciphertext data are actually written into memory originally, i.e. ciphertext data are storing
Actual storage address in device, thereby, it is possible to accurately read the ciphertext data.It configures in this way, enables to system pair
The management of write address and read address becomes that simply, system resource can be saved.
Storage control 114 is used to control the read and write access to memory, generates the control signal for being directed to memory interface
Deng access of the adaptation to memory 116.
Writing data encryption device 101 and reading data decryption apparatus 102 in data encrypting and deciphering device 100 of the invention uses
Symmetrical enciphering and deciphering algorithm, and different address corresponds to different keys, thus stores to the data of DRAM, Nand Flash memorizer
Implement protection.
It in the above description, is that explanation writes data encryption device 101 and reads data decryption apparatus 102 respectively, the two can
To be respectively set in different chip or equipment, but the two also can integrate and be integrated, and fill as a data encrypting and deciphering
It sets to use.At this point, being filled if making to write writing key scrambler 103 and reading data deciphering in data encryption device 101 as previously described
It sets reading key scrambler 104 in 102 and uses identical scrambling algorithms, then the two can be independently arranged, can also be by
A device or module are shared, such as is arranged to time-multiplexed mode.In addition, write address scrambler ought be made as described above
107 and read address scrambler 106 using identical scrambling algorithms when, the two can be independently arranged, can also be with shared one
A device or module, such as it is arranged to time-multiplexed mode.
Fig. 2 shows a variations of such data encrypting and deciphering device.Data encrypting and deciphering device shown in Fig. 2
In 200, writing key scrambler 103 and reading key scrambler 104 in Fig. 1 is shared as key scrambler 204, by write address
Scrambler 107 and read address scrambler 106, which share, becomes address scrambler 206, will write data encryptor 105 and reads data deciphering
Device 110, which shares, becomes data encrypting and deciphering device 210, and has two link roads from key scrambler 204 to data encrypting and deciphering device 210
Diameter, that is, pass straight through to the first path of data encrypting and deciphering device 210 from key scrambler 204, and be connected to from key scrambler 204
Key preprocessor 208, then it is connected to from key preprocessor 208 second path of data encrypting and deciphering device 210.
When to writing data and encrypting, it is controlled such that first path is effective, the scrambling that key scrambler 204 exports
Key is provided directly to data encrypting and deciphering device 210, carries out foregoing data encryption processing;And to from memory 116
When the ciphertext data of reading are decrypted, it is controlled such that the second path is effective, the descrambling key that key scrambler 204 exports
It is provided to key preprocessor 208, executes the foregoing processing for generating the first round round key for decryption, the generation
For decryption first round round key be exported to data encrypting and deciphering device 210, carry out at foregoing ciphertext data deciphering
Reason.
In example deformed above, two link roads are provided between key scrambler 204 and data encrypting and deciphering device 210
Diameter switches connection path according to encrypting different with the process of decryption.In another variation, can also only it be arranged above-mentioned
Second path, but in data encryption to be carried out, so that key preprocessor is for example executed vacancy reason, i.e., key scrambler 204 is defeated
Descrambling key out is not directly output to data encrypting and deciphering device 210 with carrying out any processing by key preprocessor 208;Another party
Face is controlled such that key preprocessor 208 effectively works, executes aforementioned in the decryption processing of ciphertext data to be carried out
Generation for decryption first round round key processing.
In addition, embodiments of the present invention are also possible to a kind of data encryption storage system comprising: it is above-mentioned to write data
Encryption device, and for the memory for being write the encrypted ciphertext data of data encryption device by this to be written.
In addition, embodiments of the present invention can also be a kind of storing data decryption system comprising: it is stored with aforementioned
The memory and reading data decryption apparatus above-mentioned for writing the encrypted ciphertext data of data encryption device, for ciphertext
Data are decrypted.
In addition, embodiments of the present invention can also be a kind of data-storage system, comprising: data encrypting and deciphering dress above-mentioned
It sets, for storing the memory of ciphertext data, and controls the storage control of the read-write of the memory.
In addition, embodiments of the present invention can also be a kind of data ciphering method, data are write to memory to be written
Encrypted comprising: write key scrambling step, based on by write data write-in memory when write address, to key carry out
Scrambling calculates, and generates new for the descrambling key writing data and being encrypted;And data encryption step is write, it is close using scrambling
Key is encrypted to data are write, and generates ciphertext data.
In addition, data ciphering method as described above of the invention, is also possible to, further includes: write address scrambling step, it is right
Write address carries out scrambling calculating, generates scrambling write address and ciphertext data write step, according to scrambling write address by ciphertext number
According to write-in memory.
In addition, embodiments of the present invention can also be a kind of data encryption/decryption method comprising: to memory to be written
The data encryption process writing data and being encrypted, and to the ciphertext data for having been carried out the encryption read from memory into
The data decrypting process of row decryption;Wherein, the data encryption process and the data decrypting process are used based on N wheel operation
Symmetry algorithm, wherein N is 2 integral multiple natural number;The data encryption process includes: to write key scrambling step, based on described
The write address that data are write when being written into the memory carries out scrambling calculating to key is write, generates for write data
Key is write in the scrambling encrypted, and writes data encryption step, and writing key with the scrambling is the wheel for carrying out first round encryption
Key carries out N wheel cryptographic calculation to write data and generates the ciphertext data;The data decrypting process includes: that reading is close
Key scrambling step carries out scrambling calculating to key is read based on the read address for reading the ciphertext data from the memory,
It generating the scrambling for the ciphertext data to be decrypted and reads key, key pre-treatment step reads key based on the scrambling,
The round key for carrying out first round decryption is generated, and reads data decryption step, using described for carrying out first round decryption
Round key, to the ciphertext data carry out N wheel decryption operation and generate decryption after clear data.
In addition, embodiments of the present invention can also be following data decryption method, it is used to add to by aforementioned data
The ciphertext data that decryption method has encrypted are decrypted, comprising: read address scrambling step, to identical as write address when encrypting originally
Read address, carry out scrambling calculating according to algorithm identical with write address scrambling step, generate scrambling read address;Ciphertext data are read
Step is taken, reads ciphertext data from memory according to scrambling read address;Key scrambling step is read, read address is based on, key is pressed
It is calculated according to algorithm identical with key scrambling step was write originally, the decryption generated for ciphertext data to be decrypted is close
Key;And data decryption step is read, using decruption key, the ciphertext data that ciphertext data reading step is read out are executed and worked as
The opposite inverse operation of the encryption of data encryption step is write, just to be decrypted.
In addition, data decryption method as described above of the invention can use base in the reading data decryption step
The key is scrambled in the symmetry algorithm of N wheel operation, and using the pipelining with L grades, is executed in each stage
N/L takes turns operation, wherein N is 2 integral multiple natural number, and L is the approximate number of N.
In addition, data decryption method as described above of the invention can also have key pre-treatment step, the key
Pre-treatment step and the ciphertext data reading step carry out parallel, and before the completion of ciphertext data reading step or
Meanwhile reading key scrambling step and completing all N wheel operations, the first round wheel obtained for ciphertext data to be decrypted is close
Key.
Data encryption device, reading data decryption apparatus and data encrypting and deciphering device, data are write disclosed in this patent adds solution
Decryption method can be used for multiple memorizers, and memory feature is the write request of write access and to write data time sequence compact, and read access is read
Request and reading returned data have certain time interval, by that can save from reading using reading key pretreatment is carried out this period
Total time required for ciphertext data to ciphertext data.
Data encrypting and deciphering device of the present invention can also be integrated into inside storage control, close to context end
Mouthful, or near-bottom port memory is leaned on, constitute data-storage system.Another way is data encrypting and deciphering of the present invention
Device can also be set to outside storage control, be docked with storage control, and data-storage system is constituted.It is of the present invention
Memory can be hard disk, DDR memory, the various adaptable memories such as NVMFlash memory, DRAM.
In data encrypting and deciphering device of the invention, Encryption Algorithm and decipherment algorithm are conciliate suitable for all symmetric encipherment algorithms
Close algorithm.Write that data encryptor, to read data decryptor, the pipelining used in key preprocessor and algorithm wheel number poor
Different, working frequency, physics realization are different and variant, and pipeline series for example can be N, N/2, N/4 series etc., and (N is algorithm
Take turns number).
The reading key scrambler in the present invention and to write key scrambler descrambling key generated be based on writing ground
Location and generate, data protection can be carried out using different descrambling key for different write addresses, a group key can be used for protecting
Protect the data block of arbitrary size.
Key preconditioning technique in the present invention can be adapted for arriving using standalone module in read ciphertext data
Before, complete the usage scenario that first round decryption round key generates.
More than, referring to above embodiment, the present invention is described, but the present invention is not limited to above-mentioned each embodiment party
Formula, is appropriately combined or replaces for the structure of each embodiment and be also contained within the present invention.In addition, being based on this field
The knowledge the case where sequence of the combination of each embodiment or processing capable of suitably being adapted or various design alterations
Deng deformation be appended to each embodiment, be added such embodiment deformed can also be contained in the scope of the present invention it
It is interior.
Claims (25)
1. a kind of data encryption device writing data and being encrypted to memory to be written characterized by comprising
Key scrambler, the write address when memory will be written into based on write data, carry out scrambling calculating to key,
The descrambling key for being encrypted to write data is generated, and
Data encryptor is write, the descrambling key generated using the key scrambler encrypts write data, raw
At ciphertext data;
Wherein, write data encryption equipment encrypts write data using symmetry algorithm.
2. data encryption device as described in claim 1, which is characterized in that
The key scrambler carries out hash transformation to the address information of the write address, and carries out linearly together with the key
Transformation or nonlinear transformation, to export the descrambling key.
3. data encryption device as described in claim 1, which is characterized in that
The symmetry algorithm that write data encryption equipment uses is scrambled for the symmetry algorithm for being taken turns operation based on N with the key
The descrambling key that device generates is that first round round key executes the encryption, wherein N is 2 integral multiple natural number;
Write data encryption equipment uses the pipelining with M grades, is executed in the symmetry algorithm in every grade of flowing water
N/M takes turns operation, wherein M is the approximate number of N.
4. data encryption device as described in claim 1, which is characterized in that further include:
Write address scrambler carries out scrambling calculating to the write address, generates scrambling write address, for make the ciphertext data by
The memory is written according to the scrambling write address;
The write address scrambler carries out linear transformation or nonlinear transformation to the address information of the write address, described to generate
Scramble write address.
5. such as described in any item data encryption devices of Claims 1-4, which is characterized in that
Descrambling key described in one group of the key scrambler generation can be used for the different size of encryption for writing data block;
Write data block can be the data block as unit of storing physical unit, be also possible to as unit of performance data block
Data block.
6. a kind of data decryption apparatus that the ciphertext data read from memory are decrypted characterized by comprising
Key scrambler carries out scrambling meter to key based on the read address for reading the ciphertext data from the memory
It calculates, generates the descrambling key for the ciphertext data to be decrypted,
Data decryptor is read, the ciphertext data are decrypted in the descrambling key generated based on the key scrambler,
Obtain clear data;
Wherein, the reading data decryptor is decrypted the ciphertext data using symmetry algorithm.
7. data decryption apparatus as claimed in claim 6, which is characterized in that
The key scrambler carries out hash transformation to the address information of the read address, and carries out linearly together with the key
Transformation or nonlinear transformation, to export the descrambling key.
8. data decryption apparatus as claimed in claim 6, which is characterized in that
The ciphertext data are made of by taking turns the symmetry algorithm encryption of operation based on N, and the integral multiple that wherein N is 2 is natural
Number;
Notebook data decryption device also has key preprocessor, raw based on the descrambling key that the key scrambler generates
At the round key for the ciphertext data to be carried out with first round decryption operation;
The round key that operation is decrypted for carrying out the first round read data decryptor and the key preprocessor is utilized to generate,
The clear data is obtained after executing N wheel decryption operation.
9. data decryption apparatus as claimed in claim 8, which is characterized in that
The key preprocessor uses the pipelining with L grades, and N/L is executed in every grade of flowing water and takes turns operation, wherein L
It is the approximate number of N.
10. data decryption apparatus as claimed in claim 8, which is characterized in that
The data decryptor of reading uses the pipelining with K grades, and N/K is executed in every grade of flowing water and takes turns operation, wherein K
It is the approximate number of N.
11. data decryption apparatus as claimed in claim 6, which is characterized in that further include:
Read address scrambler carries out scrambling calculating to the read address, scrambling read address is generated, so that the ciphertext data are pressed
It is read according to the scrambling read address from the memory;
The read address scrambler carries out linear transformation or nonlinear transformation to the address information of the read address, described to generate
Scramble read address.
12. the data decryption apparatus as described in claim 8 or 11, which is characterized in that
The movement of the key preprocessor executes parallel with the movement for reading the ciphertext data from the memory;
The key preprocessor before or while ciphertext data to be decrypted are read from memory, complete it is described for into
The row first round decrypts the generation of the round key of operation.
13. a kind of data encrypting and deciphering device characterized by comprising
To the data encryption device of memory to be written writing data and being encrypted, and
The data decryption apparatus that the ciphertext data for having been carried out the encryption read from memory are decrypted;
Wherein, the data encryption device and the data decryption apparatus use the symmetry algorithm based on N wheel operation, wherein N is
2 integral multiple natural number;
The data encryption device includes:
Key scrambler is write, the write address when memory is written into based on write data, is scrambled to key is write
It calculates, generates the scrambling for being encrypted to write data and write key, and
Data encryptor is write, it is close to write the wheel that key is progress first round encryption with the scrambling for writing the generation of key scrambler
Key carries out N wheel cryptographic calculation to write data and generates the ciphertext data;
The data decryption apparatus includes:
Key scrambler is read, based on the read address for reading the ciphertext data from the memory, is added to key is read
Calculating is disturbed, the scrambling for the ciphertext data to be decrypted is generated and reads key,
Key preprocessor, the scrambling generated based on the reading key scrambler are read key, generated for carrying out the first round
The round key of decryption, and
Data decryptor is read, it is right using the round key for being used to carry out first round decryption described in key preprocessor generation
The ciphertext data carry out the decryption operation of N wheel and generate the clear data after decryption.
14. data encrypting and deciphering device as claimed in claim 13, which is characterized in that
The data encryption device further includes write address scrambler, carries out scrambling calculating to the write address, generates scrambling and writes ground
Location, for making the ciphertext data that the memory be written according to the scrambling write address;
The write address scrambler carries out linear transformation or nonlinear transformation to the address information of the write address, described to generate
Scramble write address;
The data decryption apparatus further includes read address scrambler, carries out scrambling calculating to the read address, generates scrambling and reads ground
Location, so that the ciphertext data are read according to the scrambling read address from the memory;
The read address scrambler carries out linear transformation or nonlinear transformation to the address information of the read address, described to generate
Scramble read address.
15. data encrypting and deciphering device according to claim 13 or 14, which is characterized in that
The key preprocessor uses the pipelining with L grades, and N/L is executed in every grade of flowing water and takes turns operation, wherein L
It is the approximate number of N;
Write data encryption equipment uses the pipelining with M grades, and N/M is executed in every grade of flowing water and takes turns operation, wherein M
It is the approximate number of N;
The data decryptor of reading uses the pipelining with K grades, and N/K is executed in every grade of flowing water and takes turns operation, wherein K
It is the approximate number of N.
16. a kind of data encrypting and deciphering device, which is characterized in that
Using the symmetry algorithm based on N wheel operation, the clear data inputted is encrypted, or to the ciphertext data inputted
It is decrypted, wherein N is 2 integral multiple natural number;
The data encrypting and deciphering device includes:
Key scrambler is carried out scrambling calculating to key and is generated scrambling based on the access address to memory that system is specified
Key,
Key preprocessor is generated based on the descrambling key that the key scrambler generates for carrying out first round decryption
The round key of operation, and
Data encrypting and deciphering device is held based on the descrambling key that the key scrambler generates for the clear data inputted
The row N takes turns operation, generates the ciphertext data, or based on the key preprocessor generate described in for carrying out first
The round key of wheel decryption operation, executes the N for the ciphertext data inputted and takes turns operation, generate the clear data.
17. data encrypting and deciphering device as claimed in claim 16, which is characterized in that
Write address scrambler carries out scrambling calculating to the access address, generates scrambling access address, for according to the address to
Ciphertext data described in the memory read/write;
The address scrambler carries out linear transformation or nonlinear transformation to the address information of the access address, described to generate
Scramble access address.
18. the data encrypting and deciphering device as described in claim 16 or 17, which is characterized in that
The key preprocessor uses the pipelining with L grades, and N/L is executed in every grade of flowing water and takes turns operation, wherein L
It is the approximate number of N;
The data encrypting and deciphering device uses the pipelining with M grades, and N/M is executed in every grade of flowing water and takes turns operation, wherein M
It is the approximate number of N.
19. the data encrypting and deciphering device as described in claim 13 or 16, which is characterized in that
The movement of the key preprocessor carries out parallel with the movement for reading the ciphertext data from the memory;
The key preprocessor before or while ciphertext data to be decrypted are read from memory, complete it is described for into
The row first round decrypts the generation of the round key of operation.
20. the data encrypting and deciphering device as described in claim 13 or 16, which is characterized in that
Descrambling key described in one group can be used for the encryption of different size of data block;
The data block can be the data block as unit of storing physical unit, be also possible to as unit of performance data block
Data block.
21. the data encrypting and deciphering device as described in claim 13 or 16, which is characterized in that
The symmetry algorithm is any one of DES, AES, SM4 algorithm.
22. a kind of data-storage system characterized by comprising
Such as described in any item data encrypting and deciphering devices of claim 13 to 19, and
For the storage control to ciphertext data described in memory read/write.
23. data-storage system as claimed in claim 21, which is characterized in that
The data encrypting and deciphering device is built in inside the storage control, close to context port, or close to
Bottom port memory.
24. a kind of data encryption/decryption method characterized by comprising
To the data encryption process of memory to be written writing data and being encrypted, and
The data decrypting process that the ciphertext data for having been carried out the encryption read from memory are decrypted;
Wherein, the data encryption process and the data decrypting process use the symmetry algorithm based on N wheel operation, wherein N is
2 integral multiple natural number;
The data encryption process includes:
Key scrambling step is write, the write address when memory is written into based on write data, is added to key is write
Calculating is disturbed, the scrambling for being encrypted to write data is generated and writes key, and
Data encryption step is write, writing key with the scrambling is the round key for carrying out first round encryption, carries out N to write data
It takes turns cryptographic calculation and generates the ciphertext data;
The data decrypting process includes:
Key scrambling step is read, based on the read address for reading the ciphertext data from the memory, is carried out to key is read
Scrambling calculates, and generates the scrambling for the ciphertext data to be decrypted and reads key,
Key pre-treatment step reads key based on the scrambling, generates the round key for carrying out first round decryption, and
Data decryption step is read, using described for carrying out the round key of first round decryption, N wheel solution is carried out to the ciphertext data
Close operation and generate decryption after clear data.
25. a kind of storage medium, record has following data encrypting and deciphering program:
The data encrypting and deciphering program is used to execute the data encryption process writing data and being encrypted to memory to be written, and
The data decrypting process that the ciphertext data for having been carried out the encryption read from memory are decrypted;
Wherein, the data encryption process and the data decrypting process use the symmetry algorithm based on N wheel operation, wherein N is
2 integral multiple natural number;
The data encryption process includes:
Key scrambling step is write, the write address when memory is written into based on write data, is added to key is write
Calculating is disturbed, the scrambling for being encrypted to write data is generated and writes key, and
Data encryption step is write, writing key with the scrambling is the round key for carrying out first round encryption, carries out N to write data
It takes turns cryptographic calculation and generates the ciphertext data;
The data decrypting process includes:
Key scrambling step is read, based on the read address for reading the ciphertext data from the memory, is carried out to key is read
Scrambling calculates, and generates the scrambling for the ciphertext data to be decrypted and reads key,
Key pre-treatment step reads key based on the scrambling, generates the round key for carrying out first round decryption, and
Data decryption step is read, using described for carrying out the round key of first round decryption, N wheel solution is carried out to the ciphertext data
Close operation and generate decryption after clear data.
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