CN109583059B - Three-dimensional integrated system-level component service life calculation method and device - Google Patents
Three-dimensional integrated system-level component service life calculation method and device Download PDFInfo
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Abstract
The invention discloses a method and a device for calculating the service life of a three-dimensional integrated system-level component, wherein the method comprises the following steps: acquiring input information required by a failure physical model of the three-dimensional integrated system-level component; numbering each component of the three-dimensional integrated system-level assembly; numbering each failure mechanism of each component of the assembly; calculating the time before failure of each failure mechanism of the component based on a failure physical model; generating a time matrix before failure based on the time before failure of each failure mechanism and the number of each failure mechanism of each component; determining a life matrix of the component according to the time matrix before failure; and calculating the service life of the component based on the competition failure theory and the service life matrix. According to the method, the service life matrix is obtained by evaluating the service life of each component in the component, and the service life of the three-dimensional system-in-package component is evaluated based on a competition theory, so that the service life of the three-dimensional system-in-package component is accurately and reliably evaluated.
Description
Technical Field
The invention belongs to the technical field of spacecraft component service life evaluation, and particularly relates to a three-dimensional integrated system-level component service life calculation method and device.
Background
The application requirements of miniaturization, light weight, multiple functions and high performance promote the generation and development of three-dimensional integrated system-level components, and the development of microelectronic design and manufacturing technology leads the maturity and reliability of the three-dimensional integrated system-level components to be increased day by day, so that the three-dimensional integrated system-level components are widely applied to various fields of aviation, aerospace, weapons and the like at present. The three-dimensional integrated system-level assembly integrates various chips and components with different functions, and the complicated structure and process of the three-dimensional integrated system-level assembly, such as large-span high-density bonding wires, flip chip bonding, silicon through holes and the like, can bring about a severe reliability problem. However, at present, there is no mature three-dimensional integrated system-level component reliability evaluation method, and an effective reliability evaluation method needs to be proposed urgently.
In the current engineering practice, the reliability of electronic products is estimated mainly according to GJB/Z299C-2006 handbook for estimating the reliability of electronic equipment, wherein the estimation models of the working failure rates of most components are in the form of multiplication of a series of pi coefficients such as the basic failure rate lambdab and pi E, pi Q and the like, the parameters are obtained by table lookup basically, scientific basis is seriously lacked, and the estimation result has lower reliability. The plain text regulations of the united states army stopped using the reliability prediction manual for reliability prediction as early as 1996, and replaced it with a physical approach to failure.
The failure physics method is mainly used for predicting the time before failure of a basic unit of an electronic component under certain stress due to a certain failure mechanism, and the service life of the three-dimensional integrated system-level assembly which works under a complex stress condition and has multiple failure mechanisms cannot be predicted only according to the failure physics method. Evaluating the lifetime of three-dimensional integrated system-level components, it is necessary to take into account all stress conditions in the working environment and the failure mechanisms that may be involved, in order to obtain a predicted result with a higher degree of confidence.
Disclosure of Invention
The invention solves the technical problems that: the method comprises the steps of evaluating the service life of each component in the three-dimensional integrated system-level assembly to obtain a service life matrix, and evaluating the service life of the three-dimensional system-level assembly based on a competition theory, so that the service life of the three-dimensional system-level assembly is accurately and reliably evaluated.
In order to solve the technical problem, the invention discloses a method for calculating the service life of a three-dimensional integrated system-level component, wherein the method comprises the following steps: acquiring input information required by a failure physical model of the three-dimensional integrated system-level component; numbering each component of the three-dimensional integrated system-level assembly; numbering each failure mechanism of each of the components of the three-dimensional integrated system-level assembly; calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level component based on the failure physical model; generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the number of each failure mechanism of each component; determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure; and calculating the service life of the three-dimensional integrated system-level assembly based on a competitive failure theory and the service life matrix.
Preferably, the input information includes: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
Preferably, the step of numbering the components of the three-dimensional integrated system-level assembly comprises: numbering all chips in the three-dimensional integrated system-level assembly as C 1 、C 2 、……、C l (ii) a Numbering all interconnect structures in the three-dimensional integrated system-level assembly as I 1 、I 2 、……、I m (ii) a Numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n (ii) a Wherein the three-dimensional integrated system-level assembly comprises: the chip package comprises a plurality of chips, a plurality of interconnection structures and a plurality of packaging bodies.
Preferably, the step of numbering the failure mechanisms of each of the components of the three-dimensional integrated system-level assembly comprises: chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 ) (ii) a Interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered as: (I) 11 、I 12 )、……、(I m1 、I m2 ) (ii) a Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered as: (P) 11 、P 12 )、……、(P m1 、P m2 )。
Preferably, the time-to-failure matrix is:
wherein the first letter T of TC, TI, TP represents time, and the data contained in the parenthesis in the pre-failure time matrix is considered as an element; infinity indicates the missing failure mechanism.
Correspondingly, the invention also discloses a device for calculating the service life of the three-dimensional integrated system-level assembly, wherein the device comprises: the acquisition module is used for acquiring input information required by the failure physical model of the three-dimensional integrated system-level component; a first numbering module for numbering components of the three-dimensional integrated system-level assembly; a second numbering module for numbering each failure mechanism of each component of the three-dimensional integrated system-level assembly; the first calculation module is used for calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level assembly based on the failure physical model; a generation module for generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the serial number of each failure mechanism of each component; the determining module is used for determining a service life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure; and the second calculation module is used for calculating the service life of the three-dimensional integrated system-level assembly based on a competitive failure theory and the service life matrix.
Preferably, the input information includes: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
Preferably, the first numbering module includes: a first sub-module for numbering all chips in the three-dimensional integrated system-level assembly as C 1 、C 2 、……、C l (ii) a A second submodule for numbering all interconnect structures in the three-dimensional integrated system-level assembly as I respectively 1 、I 2 、……、I m (ii) a A third submodule for numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n (ii) a Wherein the three-dimensional integrated system-level assembly comprises: a plurality of chips, a plurality of interconnect structures and a plurality ofAnd (5) packaging the body.
Preferably, the second numbering module comprises: chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 ) (ii) a Interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered as: (I) 11 、I 12 )、……、(I m1 、I m2 ) (ii) a Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered as: (P) 11 、P 12 )、……、(P m1 、P m2 )。
Preferably, the time before failure matrix is:
wherein the first letter T of TC, TI, TP represents time, and the data contained in the parenthesis in the pre-failure time matrix is considered as an element; infinity indicates the missing failure mechanism.
The invention has the following advantages:
the embodiment of the invention discloses a three-dimensional integrated system-level component service life calculating method, which comprises the steps of collecting input information required by a three-dimensional integrated system-level component failure physical model; numbering each component of the three-dimensional integrated system-level assembly; numbering failure mechanisms of components of the three-dimensional integrated system-level assembly; calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level component based on the failure physical model; generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the number of each failure mechanism of each component; determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure; based on the competitive failure theory and the life matrix, the life of the three-dimensional integrated system-level assembly is calculated, and the life of the three-dimensional system-level assembly can be accurately and reliably evaluated.
Drawings
Fig. 1 is a flowchart of a method for calculating a lifetime of a three-dimensional integrated system-level component according to an embodiment of the present invention;
FIG. 2 is a flow chart of another method for calculating the lifetime of a three-dimensional integrated system-level component according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a three-dimensional integrated system-level component lifetime calculation apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Referring to fig. 1, a flowchart illustrating steps of a method for calculating a lifetime of a three-dimensional integrated system-level component according to an embodiment of the present invention is shown.
The three-dimensional integrated system-level component service life calculation method provided by the embodiment of the invention comprises the following steps of:
step 101: and acquiring input information required by the failure physical model of the three-dimensional integrated system-level component.
The input information required by the failure physical model generally comprises material information and stress profile information; the material information comprises the components, physical and chemical properties and the like of the material, and is mainly obtained from a product manual or obtained by scanning electron microscope and energy spectrum analysis; the life section stress information comprises temperature stress, electric stress, vibration stress and the like, and the life section describes the environmental conditions of the product in actual work. The required input information may be different for different failure physical models, and the input information required by the physical model related to the three-dimensional integrated system-level component life evaluation may include: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
Step 102: the components of the three-dimensional integrated system-level assembly are numbered.
The components of the three-dimensional integrated system-level assembly are roughly divided into three types: the chip comprises a plurality of chips, an interconnection structure and a plurality of packaging bodies. The chip refers to a silicon chip of an active device such as an Application Specific Integrated Circuit (ASIC), a FLASH memory, a Static Random Access Memory (SRAM), etc., the interconnection structure refers to a structure for realizing mechanical and electrical interconnection between the chip and a substrate such as a bonding lead, a micro bump, a welding layer, etc., and the package refers to a resistance-capacitance sense in a three-dimensional Integrated system-level component and a component package.
When numbering the components, all chips in the three-dimensional integrated system-level assembly can be numbered as C respectively 1 、C 2 、……、C l (ii) a Numbering all interconnect structures in the three-dimensional integrated system-level assembly as I 1 、I 2 、……、I m (ii) a Numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n 。
Step 103: the failure mechanisms of the components of the three-dimensional integrated system-level assembly are numbered.
The numbering may be developed according to the numbering of the various components of the three-dimensional integrated system-level assembly: failure mechanisms of the chip include time dependent breakdown (TDDB), metallization Electromigration (EM), hot Carrier Injection (HCI); failure mechanisms of the interconnection structure comprise bonding lead bending fatigue and micro-bump thermal fatigue; the failure mechanism of the packaging body comprises vibration failure of the packaging body and thermal fatigue of the packaging body.
Chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 ) (ii) a To interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered as: (I) 11 、I 12 )、……、(I m1 、I m2 ) (ii) a Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered as: (P) 11 、P 12 )、……、(P m1 、P m2 )
Step 104: and calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level assembly based on the failure physical model.
The physical model of failure corresponding to each failure mechanism is shown in table one:
the physical model corresponding to the time-dependent breakdown failure mechanism of the chip is mainly based on the model E, and the application scenario is that when the thickness of the gate oxide layer is more than 4nm, the electric field intensity is low (<10 MV/cm), the cause of the breakdown over time is Si-SiO 2 Increased field strength at the interface, the breaking of thermal bonds. Increasing the field strength can decrease the activation energy and thus increase the reaction rate exponentially. The formula for the time before failure for model E is as follows:
TTF＝A 0 *exp(-γ(T)E ox )*exp(E a /kT)
in the above formula, A 0 Is constant, depending on the material and process; γ is a field acceleration parameter in cm/MV, depending on temperature, γ (T) = a/kT, where a is the effective dipole moment of the molecule; e ox An electric field applied externally to the dielectric medium in MV/cm units; e a Is the apparent activation energy, usually expressed in electron volts eV; k is the Boltzmann constant; t is the Kelvin temperature; a is generally taken
The physical model form corresponding to the electromigration failure mechanism of the chip metallization layer is as follows:
TTF＝A 0 *(J-J crit ) -n *exp(E aa /kT)
in the formula, A 0 Is constant, depending on the material and process; j is the applied current density; j. the design is a square crit Is the current density threshold below which electromigration does not occur, typically 3000A/cm for Cu 2 (ii) a n is a current density index, and for Cu, 1.1-2 is taken; e aa Is an apparent activation energy, usually expressed in electron volts eV, of 0.85 to 0.95eV for Cu; k is the Boltzmann constant; t is the Kelvin temperature.
The physical models corresponding to the chip hot carrier injection failure mechanism are divided into an N-channel model and a P-channel model, wherein the N-channel model is based on an Eying model as follows:
TTF＝B*(I sub ) -N *exp(E aa /kT)
in the above formula, B is a constant, and is related to doping distribution, sidewall spacing dimension, etc.; I.C. A sub Is the peak substrate current during operation, in units of μ Α; n is a dimensionless constant, and is 2-4; e aa Is an apparent activation energy, usually expressed in electron volts eV, and usually taken to be-0.2 to 0.4eV; k is the Boltzmann constant; t is the Kelvin temperature.
When the channel length L >0.25 μm, the P-channel model is expressed as follows:
TTF＝B*(I g ) -M *exp(E aa /kT)
in the above formula, B is a constant, and is related to doping distribution, sidewall spacing dimension, etc.; i is g Is the peak gate current during operation; m is a dimensionless constant, and is 2-4; e aa Is the apparent activation energy, usually expressed in electron volts eV, and usually taken from-0.1 to-0.2 eV; k is the boltzmann constant; t is the Kelvin temperature.
When the channel length L <0.25 μm, the P-channel model is expressed as follows:
TTF＝B*(I sub ) -N *exp(E aa /kT)
in the above formula, B is a constant, and is related to doping distribution, sidewall spacing dimension, etc.; I.C. A sub Is V G ＝V D Substrate current in time; n is a dimensionless constant, and is 2-4; e aa Is an apparent activation energy, usually expressed in electron volts eV, and usually taken to be 0.1 to 0.4eV; k is the Boltzmann constant; t is the Kelvin temperature.
The physical bonding wire bending fatigue failure model is based on a coffee-Manson model, the model form is as follows, and N is the number of cycles before failure:
in the above formula, C w For the tensile fatigue coefficient of the lead material, al lead is generally selected3.8e35；m w The tensile fatigue index of a lead material is 3 for an Al lead generally; e w Is the elastic modulus of the lead material, and has a unit of Pa; r is the cross-sectional radius of the lead in mm; d is half of the span of the bonding wire and the unit is mm; l is half of the length of the bonding wire and is in mm; alpha is alpha s Is the coefficient of thermal expansion of the substrate material, in K -1 ；α w Is the coefficient of thermal expansion of the lead material, in K -1 (ii) a Δ T is the temperature variation range in K.
The number of cycles before failure, N, is multiplied by the time elapsed for one cycle, t, to obtain the lifetime in units of h.
The physical model of the thermal fatigue failure of the micro-convex points is based on a coffee-Manson model, and the model form is as follows:
in the above formula, Δ γ is the shaping shear strain due to thermal mismatch; epsilon f The fatigue ductility factor (2 epsilon for 63/37 tin-lead solder, 60/40 tin-lead solder and eutectic alloy) f 0.65); c is fatigue ductility index; t is sj Is the average temperature of the package, unit: DEG C; t is t D Half-period temperature retention time is expressed in min; f is an empirical correction factor that takes into account the idealized assumptions (F values vary from 0.5 to 1.5, with typical values around 1); h is the height of the micro-convex points, and the unit is mm; delta alpha is the difference of the thermal expansion coefficients of the substrate and the chip; delta T is the difference between the highest temperature and the lowest temperature, and the unit is; l is D The distance between the welding point and the central point is in mm, and the calculation formula is as follows:
in the above formula, X is the length of the micro-bump array, and the unit is mm; and Y is the width of the micro-bump array in mm.
Number of cycles before failure N f The lifetime can be found in h by multiplying by the time t over one cycle.
The physical model of the thermal fatigue failure of the packaging body is based on a coffee-Manson model, in which,
N f ＝A 0 *(1/Δε p ) B
in the above formula, A0 is a constant depending on the material characteristics; delta epsilon p Is the plastic strain range during thermal cycling; b is an empirically determined index. Since the plastic strain has the following relationship with the temperature variation range Δ T:
Δε p ＝(ΔT-ΔT 0 ) a
in the above formula, a is an empirical constant and is related to materials and structures; wherein Δ T 0 Is introduced because not all of the temperature-dependent stress is converted into plastic strain, some of which are elastic strain, Δ T 0 It represents the portion of the temperature that causes elastic strain. Therefore, by combining the two formulas, a physical model of the thermal fatigue failure of the packaging body can be obtained:
N f ＝C 0 *(ΔT-ΔT 0 ) -q
in the above formula, C 0 Is a material-related constant, and Δ T is the device package body temperature variation range; delta T 0 Is the range of temperature change that causes elastic strain; q is a thermal fatigue index, which is empirically obtained.
Number of cycles before failure N f The lifetime can be found in h by multiplying by the time t over one cycle.
The physical model of the package body vibration fatigue failure is based on a coffee-Manson model, and the model form is as follows:
in the above formula, b is a solder vibration fatigue factor, generally 0.156, and is taken for different solders according to the result of the S-N curve of the vibration test; b, taking the minimum value as unit in to obtain the side length of the PCB board installed on the three-dimensional integrated system-level assembly; l is the length of the three-dimensional integrated system-level assembly, and the maximum value is taken as the unit in; h is the thickness of the PCB plate, unit in; c is an interconnection type dependent constant, taken 1.5 for BGA and 2.25 for QFN; PSD is the first order natural frequency f at the random vibratory power spectral density n (in Hz) in g2/Hz; a is the length of the PCB, b is the width of the PCB, and the unit is in; (X, Y) is the location of the three-dimensional integrated system-level components on the PCB board.
Dividing the number of cycles before failure N by the first order natural frequency f n The lifetime in seconds can be obtained.
Step 105: and generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the number of each failure mechanism of each component.
Formed time before failure matrix M MTTF As follows:
in the above formula, the first letter T of TC, TI, TP identifies the time to distinguish from the failure mechanism number; the data included in the parenthesis in the matrix is regarded as one element; because the numbers of l, m and n are different, in order to make the number of elements in each row of the matrix identical, an infinite position is added in a vacant position; since some structures do not have all failure mechanisms present at the same time, for the missing failure mechanisms, they are also filled up with ∞, and therefore ∞ represents the missing failure mechanisms.
Step 106: and determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure.
The theory of competitive failure is that all components in one system are regarded as a series structure, as long as one component fails first, the whole system fails, and the actual three-dimensional integrated system-level assembly conforms to the requirementTheory of competitive failure: generally, the three-dimensional integrated system-level assembly does not have a redundant backup unit, and as long as any one component, such as a chip, a welding point and a packaging body, fails, the whole assembly fails. According to the theory of competitive failure, a time matrix M before failure is taken MTTF The smallest of the time before failure of each element (e.g., TC) 1 ＝min(TC 11 ,TC 12 ,TC 13 ) Will fail time matrix M) MTTF Into a lifetime matrix T
In the formula, TC 1 Is (TC) 11 、TC 12 、TC 13 ) I.e. chip C due to time dependent breakdown (TDDB), electromigration of Metallization (EM), hot Carrier Injection (HCI) 1 The earliest time before failure, the other elements in the matrix are similarly available.
Step 107: and calculating the service life of the three-dimensional integrated system-level assembly based on the competitive failure theory and the service life matrix.
The smallest time before failure in the lifetime matrix is most likely to be the lifetime of the three-dimensional integrated system-level component, and the part corresponding to the smallest time before failure is a weak part, so that the failure mechanism causing the failure of the three-dimensional integrated system-level component is the earliest failure mechanism of the weak part. Thus, the lifetime t of the three-dimensional integrated system-level assembly SiP Is obtained by the following formula:
in the above formula, if t is finally found SiP ＝TC 1 Then, this indicates chip C 1 Is a weak part of the three-dimensional integrated system-level assembly; and due to TC 1 ＝min(TC 11 ,TC 12 ,TC 13 ) If TC is present 1 ＝TC 11 Then, this indicates chip C 1 Time-lapse breakdown of (1) is a failure mechanism that leads to failure of a three-dimensional integrated system-level component.
According to the three-dimensional integrated system-level component service life calculation method provided by the embodiment of the invention, input information required by a three-dimensional integrated system-level component failure physical model is acquired; numbering each component of the three-dimensional integrated system-level assembly; numbering each failure mechanism of each component of the three-dimensional integrated system-level assembly; calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level component based on the failure physical model; generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the number of each failure mechanism of each component; determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure; based on the competitive failure theory and the life matrix, the life of the three-dimensional integrated system-level assembly is calculated, and the life of the three-dimensional system-level assembly can be accurately and reliably evaluated.
Referring to fig. 2, the method for calculating the lifetime of a three-dimensional integrated system-level component according to the present invention is described in detail with reference to specific embodiments.
Case (2): three-dimensional integrated system-level assembly for certain spacecraft
The relevant information and application environment of the three-dimensional integrated system-level component for a certain spacecraft are as follows:
(1) Three-dimensional integrated system-level components for a spacecraft: the device is composed of an ASIC chip, a FLASH chip and an SRAM chip; the ASIC is mechanically and electrically interconnected with the substrate in a flip-chip welding mode, the FLASH and the SRAM are mechanically interconnected with the substrate through welding materials, and the electrical interconnection is realized through bonding wires. The external package size of the three-dimensional integrated system-level assembly for the spacecraft is 50mm multiplied by 7mm, and the package type is a quad flat non-lead package (QFN). The information of the position, the power consumption and the like of each chip is shown in a second table.
| Chip and method for manufacturing the same | ASIC | FLASH | SRAM |
| Length X Width X height (mm) | 9×9×0.4 | 7×5×0.4 | 13.5×11×0.4 |
| Interconnection mode | Flip chip bonding | Bonding wire + solder bonding | Bonding wire + solder bonding |
| Interconnect material | SnPb | Au-Al+SnPb | Au-Al+SnPb |
| Dissipation power (W) | 1 | 0.2 | 0.4 |
(2) The application environment is as follows: the three-dimensional integrated system-level assembly for a certain spacecraft is arranged on a PCB board of 200mm multiplied by 350mm multiplied by 4mm, and the positions on the plane are (135, 110); in general, the ambient temperature is stable at around 25 ℃.
Step 201: and collecting information required by the service life evaluation of the three-dimensional integrated system-level assembly.
The three-dimensional integrated system-level component comprises an ASIC (application specific integrated circuit), a FLASH and an SRAM (static random access memory), each chip has three failure mechanisms of time dependent breakdown (TDDB), metallization layer Electromigration (EM) and Hot Carrier Injection (HCI), and the parameter information of a physical model of the chip failure is shown in a third table; the interconnection structure of the ASIC is a micro-bump and only comprises a micro-bump thermal fatigue failure mechanism, the interconnection structures of the FLASH and SRAM chips are provided with a solder layer and a bonding lead, the interconnection structures comprise a bonding lead bending fatigue failure mechanism, and the parameter information of the physical model of the interconnection structure failure is shown in the fourth table; the whole three-dimensional integrated system-level assembly only has one package type of QFN, the failure mechanism of the three-dimensional integrated system-level assembly comprises package body vibration failure and package body thermal fatigue, and the package body failure physical model parameter information is shown in the table III, the table IV and the table V.
Physical model parameters for table three-chip failure
TABLE FOUR INTERCONNECT STRUCTURE FAILURE PHYSICAL MODEL PARAMETERS
TABLE V physical model parameters for package failure
Step 202: the components of the three-dimensional integrated system-level assembly are numbered.
The chip ASIC, FLASH and SRAM are respectively numbered as C 1 、C 2 、C 3 (ii) a The interconnection structures of the chips are respectively numbered as I 1 、I 2 、I 3 (ii) a Number the package as P 1 ；
Step 203: the failure mechanisms involved in the three-dimensional integrated system-level assembly are numbered.
Numbering according to three-dimensional integrated system-level assembly componentsAnd spreading the divided numbers: the failure mechanism number of the ASIC chip is (C) 11 、C 12 、C 13 ) Respectively corresponding to time dependent breakdown (TDDB), electromigration (EM) of metallization layer, and Hot Carrier Injection (HCI); the failure mechanism number of the FLASH chip is (C) 21 、C 22 、C 23 ) (ii) a The failure mechanism number of the SRAM chip is (C) 31 、C 32 、C 33 ) (ii) a The failure mechanism number of the interconnection structure of the ASIC and the substrate is I 12 Only the micro-convex points fail due to thermal fatigue; the failure mechanism number of the interconnecting structure of the FLASH and the substrate is I 21 Bending fatigue of the bonding wire; the failure mechanism number of the SRAM and substrate interconnection structure is I 31 Bending fatigue of the bonding wire; the failure mechanism of the three-dimensional integrated system-level component package is numbered as (P) 11 、P 12 )；
Step 204: and calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level assembly based on the failure physical model to form a time before failure matrix.
Formed time before failure matrix M MTTF As shown below, the units of all elements in the matrix are years:
step 205: according to a time matrix M before failure MTTF And obtaining a life matrix T of the three-dimensional integrated system-level assembly based on a competitive failure theory.
Derived from the lifetime matrix T, the shortest lifetime is 2.99 years, chip C 2 I.e., FLASH failure, the failure mechanism is C 21 I.e. time-lapse breakdown.
Step 206: based on a competitive failure theory, the service life matrix T of the three-dimensional integrated system-level assembly is utilized to evaluate the service life of the three-dimensional integrated system-level assembly and find weak parts.
The smallest time before failure in the lifetime matrix is most likely to be the lifetime of the three-dimensional integrated system-level component, and the part corresponding to the smallest time before failure is a weak part, so that the failure mechanism causing the failure of the three-dimensional integrated system-level component is the earliest failure mechanism of the weak part. Therefore, the temperature of the molten metal is controlled,
t SiP ＝2.99(year)
namely, the final evaluation result of the service life of the three-dimensional integrated system-level assembly is 2.99 years, the weak part is a FLASH chip, and the failure mechanism is time-lapse breakdown.
According to the three-dimensional integrated system-level component service life calculating method provided by the embodiment of the invention, the service life of each component in the three-dimensional integrated system-level component for spaceflight is evaluated to obtain the service life matrix, the service life of the three-dimensional system-level packaging component for spaceflight is evaluated based on the competition theory, and the service life of the three-dimensional system-level packaging component for spaceflight can be accurately and reliably evaluated. In addition, the method can be used for screening weak parts in the three-dimensional system-in-package assembly for aerospace, and is convenient for a person skilled in the art to specifically solve the problems existing in the weak parts.
Referring to fig. 3, a schematic structural diagram of a three-dimensional integrated system-level component lifetime calculation apparatus according to an embodiment of the present invention is shown.
The three-dimensional integrated system-level component service life calculating device provided by the embodiment of the invention comprises: the acquisition module 301 is used for acquiring input information required by a three-dimensional integrated system-level component failure physical model; a first numbering module 302 for numbering components of the three-dimensional integrated system-level assembly; a second numbering module 303, configured to number failure mechanisms of the components of the three-dimensional integrated system-level assembly; a first calculation module 304, configured to calculate time before failure of each failure mechanism of the three-dimensional integrated system-level component based on the failure physical model; a generating module 305, configured to generate a time-before-failure matrix based on the time-before-failure of each failure mechanism and the serial number of each failure mechanism of each component; a determining module 306, configured to determine a lifetime matrix of the three-dimensional integrated system-level component according to the time-before-failure matrix; a second calculating module 307, configured to calculate the lifetime of the three-dimensional integrated system-level component based on the contention-based failure theory and the lifetime matrix.
Optionally, the input information includes: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
Optionally, the first numbering module includes: a first submodule for numbering all chips in the three-dimensional integrated system-level assembly as C 1 、C 2 、……、C l (ii) a A second submodule for numbering all interconnect structures in the three-dimensional integrated system-level assembly as I 1 、I 2 、……、I m (ii) a A third submodule for numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n (ii) a Wherein the three-dimensional integrated system-level assembly comprises: a plurality of chips, a plurality of interconnect structures, and a plurality of packages.
Optionally, the second numbering module includes: chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 ) (ii) a To interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered as: (I) 11 、I 12 )、……、(I m1 、I m2 ) (ii) a Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered: (P) 11 、P 12 )、……、(P m1 、P m2 )。
Optionally, the time matrix before failure is:
wherein the first letter T of TC, TI, TP represents time, and the data contained in the parenthesis in the pre-failure time matrix is considered as an element; infinity indicates the missing failure mechanism.
Optionally, the lifetime matrix is as follows:
wherein T represents a lifetime matrix, TC 1 Is (TC) 11 、TC 12 、TC 13 ) The chip C caused by time dependent breakdown (TDDB), electromigration (EM) of metallization layer, and Hot Carrier Injection (HCI) 1 The earliest time before failure, the other elements in the matrix are similarly available.
According to the three-dimensional integrated system-level component service life calculating device provided by the embodiment of the invention, input information required by a three-dimensional integrated system-level component failure physical model is acquired; numbering each component of the three-dimensional integrated system-level assembly; numbering failure mechanisms of components of the three-dimensional integrated system-level assembly; calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level assembly based on the failure physical model; generating a time matrix before failure based on the time before failure of each failure mechanism and the number of each failure mechanism of each component; determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure; based on the competitive failure theory and the life matrix, the life of the three-dimensional integrated system-level assembly is calculated, and the life of the three-dimensional system-level assembly can be accurately and reliably evaluated.
For the device embodiment, since it corresponds to the device embodiment, the description is relatively simple, and for the relevant points, refer to the description of the method embodiment section.
The embodiments in the present description are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
While the invention has been described with reference to specific preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.
Those skilled in the art will appreciate that the details of the invention not described in detail in this specification are well within the skill of those in the art.
Claims (10)
1. A three-dimensional integrated system-level component life calculation method is characterized by comprising the following steps:
acquiring input information required by a failure physical model of the three-dimensional integrated system-level component;
numbering each component of the three-dimensional integrated system-level assembly;
numbering each failure mechanism of each of the components of the three-dimensional integrated system-level assembly;
calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level component based on the failure physical model;
generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the serial number of each failure mechanism of each component;
determining a life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure;
and calculating the service life of the three-dimensional integrated system-level assembly based on a competitive failure theory and the service life matrix.
2. The three-dimensional integrated system-level component life calculation method of claim 1, wherein the input information comprises: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
3. The method of claim 2, wherein the step of numbering components of the three-dimensional integrated system-level component comprises:
numbering all chips in the three-dimensional integrated system-level assembly as C 1 、C 2 、……、C l ；
Numbering all interconnect structures in the three-dimensional integrated system-level assembly as I 1 、I 2 、……、I m ；
Numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n ；
Wherein the three-dimensional integrated system-level assembly comprises: the chip package comprises a plurality of chips, a plurality of interconnection structures and a plurality of packaging bodies.
4. The method of claim 3, wherein the step of numbering failure mechanisms of each of the components of the three-dimensional integrated system-level assembly comprises:
chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 ) (ii) a To interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered: (I) 11 、I 12 )、……、(I m1 、I m2 ) (ii) a Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered: (P) 11 、P 12 )、……、(P m1 、P m2 )。
5. The method of claim 4, wherein the time-to-failure matrix is:
wherein the first letter T of TC, TI, TP represents time, and the data included in the small parentheses in the time before failure matrix is regarded as one element; infinity indicates the missing failure mechanism.
6. A three-dimensional integrated system-level component life computing apparatus, comprising:
the acquisition module is used for acquiring input information required by the failure physical model of the three-dimensional integrated system-level component;
a first numbering module for numbering components of the three-dimensional integrated system-level assembly;
a second numbering module for numbering each failure mechanism of each of the components of the three-dimensional integrated system-level assembly;
the first calculation module is used for calculating the time before failure of each failure mechanism of the three-dimensional integrated system-level assembly based on the failure physical model;
a generation module for generating a time-before-failure matrix based on the time-before-failure of each failure mechanism and the serial number of each failure mechanism of each component;
the determining module is used for determining a service life matrix of the three-dimensional integrated system-level assembly according to the time matrix before failure;
and the second calculation module is used for calculating the service life of the three-dimensional integrated system-level assembly based on a competitive failure theory and the service life matrix.
7. The three-dimensional integrated system-level component lifetime calculation apparatus of claim 6, wherein said input information comprises: at least one of time-lapse breakdown information, metallization layer electromigration information, hot carrier injection information, bonding wire bending fatigue information, micro-bump thermal fatigue information, package vibration failure information, and package thermal fatigue information.
8. The three-dimensional integrated system-level component life computing device of claim 7, wherein the first numbering module comprises:
a first submodule for numbering all chips in the three-dimensional integrated system-level assembly respectivelyIs C 1 、C 2 、……、C l ；
A second submodule for numbering all interconnect structures in the three-dimensional integrated system-level assembly as I 1 、I 2 、……、I m ；
A third submodule for numbering all the packages in the three-dimensional integrated system-level assembly as P 1 、P 2 、……、P n ；
Wherein the three-dimensional integrated system-level components comprise: the chip package comprises a plurality of chips, a plurality of interconnection structures and a plurality of packaging bodies.
9. The three-dimensional integrated system-level component lifetime calculation apparatus of claim 8, wherein said second numbering module comprises:
chip C 1 ～C I The three failure mechanisms of (a) are numbered respectively: (C) 11 、C 12 、C 13 )、……、(C I1 、C I2 、C I3 )；
Interconnect structure I 1 ～I m The three failure mechanisms of (a) are numbered: (I) 11 、I 12 )、……、(I m1 、I m2 )；
Packaging body P 1 ～P n The three failure mechanisms of (a) are numbered as: (P) 11 、P 12 )、……、(P m1 、P m2 )。
10. The three-dimensional integrated system-level component life computing device of claim 9, wherein the time-before-failure matrix is:
wherein the first letter T of TC, TI, TP represents time, and the data included in the small parentheses in the time before failure matrix is regarded as one element; infinity indicates the missing failure mechanism.
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