CN109495225A - The indicating means and device of channel architecture - Google Patents
The indicating means and device of channel architecture Download PDFInfo
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- CN109495225A CN109495225A CN201710814329.5A CN201710814329A CN109495225A CN 109495225 A CN109495225 A CN 109495225A CN 201710814329 A CN201710814329 A CN 201710814329A CN 109495225 A CN109495225 A CN 109495225A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/0091—Signaling for the administration of the divided path
- H04L5/0094—Indication of how sub-channels of the path are allocated
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W24/00—Supervisory, monitoring or testing arrangements
- H04W24/02—Arrangements for optimising operational condition
Abstract
The application proposes the indicating means and device of channel architecture, is related to the communications field, which comprises determine the indicating mode of channel architecture；The information of at least one of: the configuration parameter of one or more channel architecture types, one or more kinds of channel architectures is indicated to terminal according to the indicating mode.Base station configures slot range of structures in which can be convenient, and indicates slot structural information with signaling overheads as small as possible, utmostly saves SFI indication signaling expense；While saving SFI indication signaling expense, realize signaling overheads with candidate slot range of structures adaptively changing.
Description
Technical field
The present invention relates to the communications fields, and in particular to the indicating means and device of channel architecture.
Background technique
Before LTE (Long Term Evolution, long term evolution) R12, TDD (Time Division
Duplexing, time division duplex) under standard, does not support dynamic subframe to configure, TDD subframe is semi-statically configured in broadcast signaling and is matched
It sets, in the LTE R12 stage, in eIMTA (enhanced Interference Mitigation and Traffic
Adaptation enhances interference management and traffic adaptation) research trends TDD sub-frame configuration under subject under discussion, eventually by utilizing
DCI (the Downlink of PDCCH (Physical Downlink Control Channel, Physical Downlink Control Channel)
Control Information, Downlink Control Information) format 1C indicates that dynamic subframe configures, primary instruction at least can be right
A radio frames are answered, and inside a subframe, does not support downlink, uplink OFDM (Orthogonal Frequency
Division Multiplexing, orthogonal frequency division multiplexing) number of symbols dynamic change.
In 5G (5th-Generation, the 5th third-generation mobile communication technology), SFI (slot format related
Information, time slot format relevant information) it can be indicated in Group-common PDCCH, if SFI instruction includes institute
Possible structure, it is excessive for communication overhead.
Summary of the invention
The present invention provides a kind of multi-channel serial data reconstruction method and device, can effectively solve data by multi-pass
The problem that road needs additional throughput, alignment of data effect bad when restoring after serially sending.
In order to achieve the above-mentioned object of the invention, the technical solution adopted by the present invention is as follows:
In a first aspect, the present invention provides a kind of indicating means of channel architecture, comprising:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
Preferably, indicate that one or more channel architecture types include: to terminal
By explicit or implicitly indicate one or more kinds of channel architecture types to terminal.
Preferably, by implicitly indicating that one or more kinds of channel architecture types include: to indicate to terminal to terminal
One or more kinds of channel architectures configure range.
Preferably, it determines that the indicating mode of channel architecture is comprised determining that and indicates channel by way of at least one of
Structure type:
System is predefined, semi-static instruction, dynamic instruction.
Preferably, when the indicating mode for determining channel architecture type is semi-static instruction, pass through remaining minimum system information
RMSI or system information block SIB or radio resource control RRC signaling indicate channel architecture type to terminal.
Preferably, when the indicating mode for determining channel architecture type is dynamic instruction, pass through Physical Downlink Control Channel
PDCCH signaling indicates channel architecture type to terminal.
Preferably, by physical downlink control channel PDCCH signaling to terminal indicate channel architecture type include with down toward
It is one of few:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
Preferably, the channel architecture type includes one or more of type:
Support the channel architecture type of downlink transfer domain variation；
Support the channel architecture type of uplink domain variation；
Support the channel architecture type of unknown domain variation；
Downlink transfer domain is leading channel architecture type；
Uplink domain is leading channel architecture type；
Unknown domain is leading channel architecture type；
The channel architecture type of downlink transfer domain dynamic instruction；
The channel architecture type of uplink domain dynamic instruction；
The channel architecture type of unknown domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and the variation of uplink domain；
Downlink transfer domain and uplink domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and uplink domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and unknown domain variation；
Support the channel architecture type in uplink domain and unknown domain variation；
Downlink transfer domain and unknown domain are leading channel architecture type；
Uplink domain and unknown domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and unknown domain dynamic instruction；
The channel architecture type in uplink domain and unknown domain dynamic instruction.
Preferably, indicate that one or more channel architecture types include: to terminal
Based on channel architecture type pattern set, channel architecture type drawing indexing is indicated.
Preferably, it determines that the indicating mode of channel architecture is comprised determining that and indicates channel by way of at least one of
The configuration parameter of structure:
System is predefined, semi-static instruction, dynamic instruction.
Preferably, when the indicating mode for determining the configuration parameter of channel architecture is semi-static instruction, pass through remaining minimum system
System information RMSI or system information block SIB or radio resource control RRC signaling indicate the configuration parameter of channel architecture to terminal.
Preferably, it when the indicating mode for determining the configuration parameter of channel architecture is dynamic instruction, is controlled by physical down
Configuration parameter of the channel PDCCH signaling to terminal instruction channel architecture.
Preferably, include to the configuration parameter of terminal instruction channel architecture by physical downlink control channel PDCCH signaling
At least one of:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
Preferably, the configuration parameter of the channel architecture includes one or more of type:
The channel architecture type of support；
The time-domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The time-domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The frequency domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The frequency domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The configuration of channel architecture type pattern set；
The valid time domain range of channel architecture type；
Effective frequency domain of channel architecture type；
In channel architecture type pattern set, the valid time domain range of each pattern；
In channel architecture type pattern set, the valid time domain range of each element of each pattern；
In channel architecture type pattern set, element number that each pattern includes.
Preferably, the time-domain position includes one or more below: Radio Frame Number, sub-frame number, time slot sequence
Number, orthogonal frequency division multiplex OFDM symbol serial number；The time domain length includes one or more below: radio frames number, son
Frame number, number of time slot, OFDM symbol number.
Preferably, the frequency domain position includes one or more below: carrier wave serial number, fractional bandwidth BWP serial number, money
Source block group RBG serial number, Physical Resource Block PRB serial number；The frequency domain includes one or more below: carrier number,
BWP number, RBG number, PRB number.
Preferably, the valid time domain range, including one or more below: one or more slot, OFDM symbols
Number, subframe, radio frames.
Preferably, the pattern set of the channel architecture type, including a variety of channel architecture type patterns, every kind of channel knot
Include one or more identical or different elements in structure type pattern.
Preferably, the element is channel architecture type.
Second aspect, the present invention also provides a kind of indicating means of channel architecture, comprising:
It is indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
Preferably, the channel architecture instruction in the domain SFI includes one or more channel architecture indexes.
When preferably, comprising a channel architecture index, the index indicates the channel of the support indicated in base station
Index under structure type；
When comprising multiple channel architectures index, the multiple index is corresponding in turn to the channel knot of base station instruction in order
Element one by one in structure type pattern.
The third aspect, the present invention also provides a kind of instruction devices of channel architecture, comprising:
Determining module is set as determining the indicating mode of channel architecture；
Indicating module is set as the information according to the indicating mode to terminal instruction at least one of:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
Fourth aspect, the present invention also provides a kind of instruction devices of channel architecture, comprising:
Information module is set as being indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
5th aspect, the present invention also provides a kind of instruction devices of channel architecture, comprising: memory and processor；
The memory, for saving executable instruction；
The processor, the executable instruction saved for executing the memory, proceeds as follows:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
6th aspect, the present invention also provides a kind of computer readable storage medium, the computer readable storage medium is deposited
Computer executable instructions are contained, when the computer executable instructions, are proceeded as follows:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
Compared to the prior art the present invention, has the following beneficial effects:
Technical solution of the present invention, base station indicate corresponding channel architecture type and/or channel architecture type to terminal
Configuration parameter and/or channel architecture configure range, and base station configures slot range of structures in which can be convenient, with signaling as small as possible
Expense indicates slot structural information, utmostly saves SFI indication signaling expense；While saving SFI indication signaling expense,
Realize signaling overheads with candidate slot range of structures adaptively changing.The slot range of structures that terminal is configured according to base station,
SFI overhead bit is solved, blind examination is facilitated.By way of multistage instruction, realization once indicates a variety of slot structure integrated modes, side
Just base station flexibly changes slot structure.
Detailed description of the invention
Fig. 1 is the flow chart of the indicating means of the channel architecture of the embodiment of the present invention；
Fig. 2 is the structural schematic diagram of the instruction device of the channel architecture of the embodiment of the present invention.
Specific embodiment
To keep goal of the invention of the invention, technical scheme and beneficial effects more clear, with reference to the accompanying drawing to this
The embodiment of invention is illustrated, it should be noted that in the absence of conflict, in the embodiment and embodiment in the application
Feature can mutual any combination.
New generation of wireless communication system has already been through and introduces Group-common (group shares) PDCCH, the category information
For notifying several information to one group of user, wherein SFI (slot format related information, time slot format phase
Close information) clearly required and indicated in Group-common PDCCH, can be indicated in SFI " DL ", " UL ",
" Unknown " these three types, by taking a slot includes 14 OFDM symbols as an example, it is possible that a slot is up to 3^14 kind
Structure needs 23 bits, this expense pair for the SFI instruction of a slot if SFI instruction includes all possible structure
It is excessive in communication system, and be likely to It is not necessary to, another problem in need of consideration is the instruction of multiple slot,
The possible structure of multiple slot is identical, it is also possible to which structure is different, such as the structure of a n slot of secondary instruction, then needs n*23 ratio
Special so big expense, it is therefore desirable to which on the one hand the carefully corresponding slot structure of design SFI considers acceptable expense, another
From the aspect of demand to structure.
As shown in Figure 1, the embodiment of the present invention provides a kind of indicating means of channel architecture, it is applied to base station, comprising:
S101, the indicating mode for determining channel architecture；
S102, the information for indicating at least one of to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
Wherein, indicate that one or more channel architecture types include: to terminal
By explicit or implicitly indicate one or more kinds of channel architecture types to terminal.
By implicitly to terminal indicate one or more kinds of channel architecture types include: to terminal indicate it is a kind of or
A variety of channel architectures configure range.
Configuration range described in the embodiment of the present invention is the value range of one or more parameters in the configuration parameter.
Determine that the indicating mode of channel architecture type comprises determining that the side by least one of in the embodiment of the present invention
Formula indicates channel architecture type:
System is predefined, semi-static instruction, dynamic instruction.
When the indicating mode for determining channel architecture type in the embodiment of the present invention is semi-static instruction, pass through remaining minimum system
System information RMSI (Remaining Minimum System Information) or system information block SIB or wireless heterogeneous networks
RRC signaling indicates channel architecture type to terminal.
When the indicating mode for determining channel architecture type is dynamic instruction, pass through physical downlink control channel PDCCH signaling
Channel architecture type is indicated to terminal.
The indicating mode of channel architecture type includes three kinds of forms in the embodiment of the present invention, and the standardization that system is becheduled for is solid
It is fixed or semi-static determination or dynamic instruction.If it is semi-static determination, SIB can be passed through by base station
(System Information Block, system information block) or RRC (Radio Resource Control, radio resource control
System) signal deployment can be by PDCCH dynamic instruction to terminal if it is dynamic instruction to terminal.
Indicate that channel architecture type includes at least one of to terminal by physical downlink control channel PDCCH signaling:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
The channel architecture type includes one or more of type:
Support the channel architecture type of downlink transfer domain variation；
Support the channel architecture type of uplink domain variation；
Support the channel architecture type of unknown domain variation；
Downlink transfer domain is leading channel architecture type；
Uplink domain is leading channel architecture type；
Unknown domain is leading channel architecture type；
The channel architecture type of downlink transfer domain dynamic instruction；
The channel architecture type of uplink domain dynamic instruction；
The channel architecture type of unknown domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and the variation of uplink domain；
Downlink transfer domain and uplink domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and uplink domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and unknown domain variation；
Support the channel architecture type in uplink domain and unknown domain variation；
Downlink transfer domain and unknown domain are leading channel architecture type；
Uplink domain and unknown domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and unknown domain dynamic instruction；
The channel architecture type in uplink domain and unknown domain dynamic instruction.
Leading expression number of symbols in the embodiment of the present invention is more, the time domain that occupies the majority and/or frequency resource element.
The instruction of the channel architecture type can be base station to terminal and pass through semi-static instruction or dynamic instruction.
Indicate that one or more channel architecture types include: to terminal
Based on channel architecture type pattern set, channel architecture type drawing indexing is indicated.
It determines that the indicating mode of channel architecture is comprised determining that and indicates matching for channel architecture by way of at least one of
Set parameter:
System is predefined, semi-static instruction, dynamic instruction.
When the indicating mode for determining the configuration parameter of channel architecture is semi-static instruction, pass through remaining minimum system information
RMSI or system information block SIB or radio resource control RRC signaling indicate the configuration parameter of channel architecture to terminal.
When the indicating mode for determining the configuration parameter of channel architecture is dynamic instruction, pass through Physical Downlink Control Channel
Configuration parameter of the PDCCH signaling to terminal instruction channel architecture.
By physical downlink control channel PDCCH signaling to terminal indicate channel architecture configuration parameter include it is following at least
One of:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
The configuration parameter of the channel architecture type includes one or more of type:
The channel architecture type of support；
The time-domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The time-domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The frequency domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The frequency domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The configuration of channel architecture type pattern set；
The valid time domain range of channel architecture type；
Effective frequency domain of channel architecture type；
In channel architecture type pattern set, the valid time domain range of each pattern；
In channel architecture type pattern set, the valid time domain range of each element of each pattern；
In channel architecture type pattern set, element number that each pattern includes.
One of configuration parameter of channel architecture type described in the embodiment of the present invention is a variety of, can be using standardization
Mode determine, or from base station to terminal pass through RMSI or SIB or the semi-static instruction of RRC signaling.It can also be from base station to end
End passes through PDCCH dynamic instruction.
The time-domain position includes one or more below: Radio Frame Number, sub-frame number, slot s lot serial number,
Orthogonal frequency division multiplex OFDM symbol serial number；The time domain length includes one or more below: radio frames number, number of sub frames
Mesh, slot s lot number, orthogonal frequency division multiplex OFDM number of symbols.
The frequency domain position includes one or more below: carrier wave serial number, fractional bandwidth BWP (Bandwidth
Part) serial number, resource block group RBG (Resource block group) serial number, Physical Resource Block PRB (Physical
Resource block) serial number；The frequency domain includes one or more below: carrier number, BWP number, RBG number
Mesh, PRB number.
The valid time domain range, including one or more below: one or more slot, OFDM symbol, subframe,
Radio frames.
The pattern set of the channel architecture type, including a variety of channel architecture type patterns, every kind of channel architecture type
It include one or more identical or different elements in pattern.
The element is channel architecture type.
The indicating means of the channel structure information of the embodiment of the present invention, base station can configure the one or more of SFI instruction
Slot structure or range of structures, the possible a variety of slot types of base station instruction, different slot types or difference slot type
The corresponding different slot range of structures of combination.Base station can be indicated in SFI in one or more slot range of structures
Specific slot structure.It can be determined by standardized way, be perhaps semi-statically configured by base station to terminal or dynamically be referred to by base station
Show to terminal.
The corresponding overhead bit of SFI can be determined by the slot range of structures in the embodiment of the present invention.Correspondence is different
The slot range of structures, the corresponding overhead bit of SFI can be same or different.
The embodiment of the present invention also provides a kind of indicating means of channel architecture, is applied to terminal, comprising:
It is indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
Preferably, the channel architecture instruction in the domain SFI includes one or more channel architecture indexes.
When indexing comprising 1 channel architecture, the index indicates the channel architecture class of the support indicated in base station
Index under type；
When comprising multiple channel architectures index, the multiple index is corresponding in turn to the channel of base station instruction in order
Element one by one in structure type pattern.
As shown in Fig. 2, the embodiment of the present invention also provides a kind of instruction device of channel architecture, comprising:
Determining module is set as determining the indicating mode of channel architecture；
Indicating module is set as the information according to the indicating mode to terminal instruction at least one of:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
The indicating module indicates that one or more channel architecture types include: to terminal
By explicit or implicitly indicate one or more kinds of channel architecture types to terminal.
The indicating module is by implicitly indicating that one or more kinds of channel architecture types include: to terminal to terminal
Indicate that one or more kinds of channel architectures configure range.
The determining module determines the indicating mode of channel architecture to comprise determining that by way of at least one of and indicates
Channel architecture type:
System is predefined, semi-static instruction, dynamic instruction.
When the determining module determines that the indicating mode of channel architecture type is semi-static instruction, the indicating module passes through
Remaining minimum system information RMSI or system information block SIB or radio resource control RRC signaling indicate channel architecture class to terminal
Type.
When the determining module determines that the indicating mode of channel architecture type is dynamic instruction, the indicating module passes through object
It manages down control channel PDCCH signaling and indicates channel architecture type to terminal.
The indicating module by physical downlink control channel PDCCH signaling to terminal indicate channel architecture type include with
It is at least one lower:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
The indicating module indicates that one or more channel architecture types include: to terminal
Based on channel architecture type pattern set, channel architecture type drawing indexing is indicated.
The determining module determines the indicating mode of channel architecture to comprise determining that by way of at least one of and indicates
The configuration parameter of channel architecture:
System is predefined, semi-static instruction, dynamic instruction.
When the determining module determines that the indicating mode of the configuration parameter of channel architecture is semi-static instruction, the instruction mould
Block indicates channel to terminal by residue minimum system information RMSI or system information block SIB or radio resource control RRC signaling
The configuration parameter of structure.
When the determining module determines that the indicating mode of the configuration parameter of channel architecture is dynamic instruction, the indicating module
The configuration parameter of channel architecture is indicated to terminal by physical downlink control channel PDCCH signaling.
The indicating module indicates the configuration parameter of channel architecture by physical downlink control channel PDCCH signaling to terminal
Including at least one of:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
The embodiment of the present invention also provides a kind of instruction device of channel architecture, comprising:
Information module is set as being indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
The embodiment of the present invention also provides a kind of instruction device of channel architecture, comprising: memory and processor；
The memory, for saving executable instruction；
The processor, the executable instruction saved for executing the memory, proceeds as follows:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
The embodiment of the present invention also provides a kind of computer readable storage medium, and the computer-readable recording medium storage has
Computer executable instructions are proceeded as follows when the computer executable instructions:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
Embodiment 1
All possible slot structure is divided into multiple types, specifically can at least be divided into Types Below:
Type1:DL-focal slot or it is DL-centric slot or is DL-alterable slot
Specific slot structure are as follows: [x DL+k Unknown+ (14-k-x) UL].
If slot includes 14 OFDM symbols, a slot under type1 includes: first x DL symbol, then k
A Unknown symbol, last 14-k-x UL symbol.
The value range of wherein DL number of symbols x, x value is standardization fixation or semi-static determination, if it is semi-static
It determines, terminal can be allocated to by SIB or RRC signaling by base station.Specifically can be set 1,2,3,4,5,6,7,8,9,
10,11,12,13,14 } or { 7,8,9,10,11,12,13,14 } or the two set subsets.
X value specific size is some value in its value range by SFI dynamic instruction.
Wherein Unknown number of symbols k, when x is less than 14, k value is to standardize fixed or semi-static determination, if it is
Semi-static determination can be allocated to terminal by SIB or RRC signaling by base station.Specific k value can be any whole in 0--14
Number.In order to guarantee that total number of symbols is 14 in slot, when x is 14, k 0.
Wherein UL number of symbols 14-k-x can determine UL number of symbols according to 14-k-x after k value, x value has been determined.
In order to guarantee that UL number of symbols is an integer more than or equal to 0, when 14-k-x is less than 0, UL number of symbols is one specific
Value, the particular value can be 0.
Such as it is 1 that base station, which is semi-statically configured k value by RRC signaling, and the value range of x is semi-statically configured by RRC signaling
For [7,14], then different x values is corresponded to, there is slot structure shown in table 1, wherein D indicates that " DL " symbol, Un indicate " Unknown "
Symbol, U indicate " UL " symbol.
Table 1:Type1 example
Type2:UL-focal slot or it is UL-centric slot or is UL-alterable slot
Specific slot structure are as follows: [(14-m-x) DL+m Unknown+x UL].
If slot includes 14 OFDM symbols, a slot under type2 includes: first 14-m-x DL symbol,
Then m Unknown symbol, last x UL symbol.
The value range of wherein UL number of symbols x, x value is standardization fixation or semi-static determination, if it is semi-static
It determines, terminal can be allocated to by SIB or RRC signaling by base station.Specifically can be set 1,2,3,4,5,6,7,8,9,
10,11,12,13,14 } or { 7,8,9,10,11,12,13,14 } or two set a subsets.
X value specific size is some value in its value range by SFI dynamic instruction.
Wherein Unknown number of symbols m, when x is less than 14, m value is to standardize fixed or semi-static determination, if it is
Semi-static determination can be allocated to terminal by SIB or RRC signaling by base station.Specific m value can be any whole in 0--14
Number.In order to guarantee that total number of symbols is 14 in slot, when x is 14, m 0.
Wherein DL number of symbols 14-m-x can determine UL number of symbols according to 14-m-x after m value, x value has been determined.
In order to guarantee that DL number of symbols is an integer more than or equal to 0, when 14-m-x is less than 0, DL number of symbols is one specific
Value, the particular value can be 0.
Such as it is 1 that base station, which is semi-statically configured m value by RRC signaling, and the value range of x is semi-statically configured by RRC signaling
For [7,14], then different x values is corresponded to, there is slot structure shown in table 2, wherein D indicates that " DL " symbol, Un indicate " Unknown "
Symbol, U indicate " UL " symbol.
Table 2:Type2 example
Type3:Unknown-focal slot or it is Unknown-centric slot or is Unknown-
alterable slot
Specific slot structure are as follows: [(14-n-x) DL+x Unknown+n UL].
If slot includes 14 OFDM symbols, a slot under type3 includes: first 14-n-x DL symbol,
Then x Unknown symbol, last n UL symbol.
The value range of wherein Unknown number of symbols x, x value is standardization fixation or semi-static determination, if it is half
Static state determines, can be allocated to terminal by SIB or RRC signaling by base station.Specifically can be set 1,2,3,4,5,6,7,8,
9,10,11,12,13,14 } or { 7,8,9,10,11,12,13,14 } or the two set subsets.
X value specific size is some value in its value range by SFI dynamic instruction.
Wherein UL number of symbols n, when x is less than 14, n value is to standardize fixed or semi-static determination, quiet if it is half
State determines, can be allocated to terminal by SIB or RRC signaling by base station.Specific n value can be the arbitrary integer in 0--14.For
Total number of symbols is 14 in guarantee slot, when x is 14, n 0.
Wherein DL number of symbols 14-n-x can determine DL number of symbols according to 14-n-x after n value, x value has been determined.
In order to guarantee that DL number of symbols is an integer more than or equal to 0, when 14-n-x is less than 0, DL number of symbols is one specific
Value, the particular value can be 0.
Such as it is 1 that base station, which is semi-statically configured n value by RRC signaling, and the value range of x is semi-statically configured by RRC signaling
For [7,14], then different x values is corresponded to, there is slot structure shown in table 3, wherein D indicates that " DL " symbol, Un indicate " Unknown "
Symbol, U indicate " UL " symbol.
Table 3:Type3 example
Type4:DL/ULtransmission-focal slot or be DL/UL transmission-centric
Slot or be DL/UL transmission-alterable slot
Specific slot structure are as follows: [x1DL+p Unknown+x2UL].
If slot includes 14 OFDM symbols, a slot under type4 includes: first x1 DL symbol, then p
A Unknown symbol, last x2 UL symbol.
The value range of wherein DL number of symbols x1, x1 value is to standardize fixed or semi-static determination, quiet if it is half
State determines, can be allocated to terminal by SIB or RRC signaling by base station.Specifically can be set 1,2,3,4,5,6,7,8,9,
10,11,12,13,14 } or { 7,8,9,10,11,12,13,14 } or the two set subsets.
X1 value specific size is some value in its value range by SFI dynamic instruction.
Wherein Unknown number of symbols p, p value are that standardization is fixed or semi-static determination, if it is semi-static determination,
Terminal can be allocated to by SIB or RRC signaling by base station.Specific p value can be the arbitrary integer in 0--14.
The value range of wherein UL number of symbols x2, x2 value is to standardize fixed or semi-static determination, quiet if it is half
State determines, can be allocated to terminal by SIB or RRC signaling by base station.Specifically can be set 1,2,3,4,5,6,7,8,9,
10,11,12,13,14 } or { 1,2,3,4,5,6,7 } or the two set subsets.
Such as it is 1 that base station, which is semi-statically configured p value by RRC signaling, and the value range of x1 is semi-statically configured by RRC signaling
For [7,14], then different p values is corresponded to, there is slot structure shown in table 4, wherein D indicates that " DL " symbol, Un indicate " Unknown "
Symbol, U indicate " UL " symbol.
Table 4:Type4 example
Except above four seed type, other types can also be divided.
Embodiment 2
Base station can be semi-statically configured the dynamic range of slot structure based on slot type, for different dynamics
Variation range, the SFI expense needed is different, when being semi-statically configured dynamic instruction slot structure in the range of multiple slot types
When, the SFI expense needed is larger；When being semi-statically configured a dynamic instruction slot structure in the range of slot type, need
The SFI expense wanted is smaller.
By taking the first three slot type (type1, type2, type3) for including in embodiment 1 as an example, if packet in type1
Include 8 kinds of slot structures in type2 containing 8 kinds of slot structures, include 7 kinds of slot structures in type3, then can be with according to base station
Following be semi-statically configured is done by RMSI or SIB or RRC signaling:
Configuration 1: the slot type of type1 is only supported；
Configuration 2: the slot type of type2 is only supported；
Configuration 3: the slot type of type3 is only supported；
Configuration 4: the slot type of type1, type2 are supported；
Configuration 5: the slot type of type1, type3 are supported；
Configuration 6: the slot type of type2, type3 are supported；
Configuration 7: the slot type of type1, type2, type3 are supported.
A kind of slot type, which needs 3 bits, to be indicated for 1, SFI of configuration.
A kind of slot type, which needs 3 bits, to be indicated for 2, SFI of configuration.
A kind of slot type, which needs 3 bits, to be indicated for 3, SFI of configuration.
A kind of slot type, which needs 4 bits, to be indicated for 4, SFI of configuration.The structure of this 4 bit has the following two kinds composition side
Formula:
Mode 1:1 bit is type1 or type2 for distinguishing the slot structure currently indicated as type identification, 3
Bit indication corresponds to certain slot structure under type；
Mode 2: indicating all 8+8=16 kind slot structural unions under type1 and type2, is not necessarily to type identification ratio
It is special.
A kind of slot type, which needs 4 bits, to be indicated for 5, SFI of configuration.4 bit architecture similar configurations 4.
A kind of slot type, which needs 4 bits, to be indicated for 6, SFI of configuration.4 bit architecture similar configurations 4.
A kind of slot type, which needs 5 bits, to be indicated for 7, SFI of configuration.The structure of this 5 bit has the following two kinds composition side
Formula:
Mode 1:2 bit is type1, type2 for distinguishing the slot structure currently indicated as type identification, or
Type3,3 bit indications correspond to certain slot structure under type；
Mode 2: indicating all 8+8+7=23 kind slot structural unions under type1, type2 and type3, is not necessarily to class
Type identification bit.
Embodiment 3
If needing to indicate a variety of slot structures in a SFI, configurable multistage indicating mode can be used,
The first order is designated as slot type, and the second level is designated as the specific slot structure under corresponding slot type.
By taking the preceding 3 kinds of slot types (type1, type2, type3) for including in embodiment 1 as an example.
In such a way that standardization or base station are semi-statically configured, the slot structure number for including in a SFI, base are determined
Standing can be semi-statically configured by MIB or RMSI or SIB or RRC signaling.Assuming that the slot structure number for including in a SFI
It is 2, then indicates type belonging to 2 slot structures in first order instruction, then specifically indicates in the instruction of the second level right
Which kind of answer in type, specially slot structure.
The first order is indicated, includes following three kinds of modes:
The mode that mode 1: standardizing or base station is semi-statically configured determines the type pattern that system is supported, specific such as table 5
It is shown；
Mode 2: using similar bitmap mode, indicate respectively that 2 seed types, system can be quiet using SIB or RRC signaling half
State configures candidate type range, specific as shown in table 6.
Table 5: type pattern
| Pattern Index | Pattern |
| 0 | [type1 type1] |
| 1 | [type2 type2] |
| 2 | [type3 type3] |
| 3 | [type1 type2] |
| 4 | [type1 type3] |
| 5 | [type2 type3] |
Table 6: similar bitmap mode type indicates
| Candidate type | Type instruction |
| [type1] | / |
| [type2] | / |
| [type3] | / |
| [type1 type2] | 2 bits, every 1 seed type of bit indication |
| [type2 type3] | 2 bits, every 1 seed type of bit indication |
| [type1 type2 type3] | 4 bits, every 2 bit indication, 1 seed type |
Base station can the effective slot number of semi-static or dynamic configuration, can be 2 slot indicating in first order instruction
Effective slot number is respectively configured in type (can be identical type or different types), or effective for their unified configurations
Slot number can be configured if be semi-statically configured by RMSI or SIB or RRC signaling；If dynamic configuration, in SFI
It is middle to need additional overhead bit.Such as configuring effective slot number is 5, then it represents that the 1st indicated in first order instruction
Slot type, in continuous 5 slot effectively, the 2nd slot type indicated in first order instruction, next continuous 5
In a slot effectively.Such as configuring effective slot number is { 4,3 }, then it represents that the 1st slot class indicated in first order instruction
Type, in continuous 4 slot effectively, the 2nd slot type indicated in first order instruction, in next continuous 3 slot
It is interior effective.
The second level is indicated, comprising 2 specific slot structure instructions, in 2 kinds of slot types for indicating first order instruction
Specific slot structure includes 8 kinds of slot structures in type2 in type1 if including 8 kinds of slot structures, includes 7 kinds in type3
Slot structure, then second level instruction includes 3+3=6 bit, 23 bits respectively correspond 2 slot classes in first order instruction
Specific slot structure in type.
Base station can also be semi-statically configured frequency domain, such as the configuration first order and/or the second level indicate corresponding frequency domain
Range is specific one or the corresponding whole system bandwidth of multiple carrier waves, it should be pointed out that is which carrier wave；Or configuration first
Grade and/or the second level indicate that corresponding frequency domain is specific one or the corresponding bandwidth model of multiple BWP under certain carrier waves
Which which enclose, it should be pointed out that be carrier wave, BWP；Or configuration first and/or the second level indicate that corresponding frequency domain is certain
The specific RBG or PRB under certain BWP under a little carrier waves need to indicate to be which carrier wave, which BWP, which RBG or which
PRB。
Although disclosed embodiment is as above, its content is only to facilitate understand technical side of the invention
Case and the embodiment used, are not intended to limit the present invention.Any those skilled in the art to which this invention pertains, not
Under the premise of being detached from disclosed core technology scheme, any modification and change can be made in form and details in implementation
Change, but protection scope defined by the present invention, the range that the appended claims that must still be subject to limits.
Claims (26)
1. a kind of indicating means of channel architecture characterized by comprising
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
2. indicating means as described in claim 1, it is characterised in that: indicate one or more channel architecture type packets to terminal
It includes:
By explicit or implicitly indicate one or more kinds of channel architecture types to terminal.
3. indicating means as claimed in claim 2, it is characterised in that: by implicitly indicating the one or more to terminal
Channel architecture type includes: to indicate one or more kinds of channel architecture configuration ranges to terminal.
4. indicating means as described in claim 1, it is characterised in that: it is logical to determine that the indicating mode of channel architecture comprises determining that
The mode for crossing at least one of indicates channel architecture type:
System is predefined, semi-static instruction, dynamic instruction.
5. indicating means as claimed in claim 4, it is characterised in that: determine that the indicating mode of channel architecture type is semi-static
When instruction, indicated by remaining minimum system information RMSI or system information block SIB or radio resource control RRC signaling to terminal
Channel architecture type.
6. indicating means as claimed in claim 4, it is characterised in that: the indicating mode for determining channel architecture type is dynamically to refer to
When showing, channel architecture type is indicated to terminal by physical downlink control channel PDCCH signaling.
7. indicating means as claimed in claim 6, it is characterised in that: by physical downlink control channel PDCCH signaling to end
End instruction channel architecture type includes at least one of:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
8. indicating means as described in claim 1, it is characterised in that: the channel architecture type includes one or more of
Type:
Support the channel architecture type of downlink transfer domain variation；
Support the channel architecture type of uplink domain variation；
Support the channel architecture type of unknown domain variation；
Downlink transfer domain is leading channel architecture type；
Uplink domain is leading channel architecture type；
Unknown domain is leading channel architecture type；
The channel architecture type of downlink transfer domain dynamic instruction；
The channel architecture type of uplink domain dynamic instruction；
The channel architecture type of unknown domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and the variation of uplink domain；
Downlink transfer domain and uplink domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and uplink domain dynamic instruction；
Support the channel architecture type in downlink transfer domain and unknown domain variation；
Support the channel architecture type in uplink domain and unknown domain variation；
Downlink transfer domain and unknown domain are leading channel architecture type；
Uplink domain and unknown domain are leading channel architecture type；
The channel architecture type in downlink transfer domain and unknown domain dynamic instruction；
The channel architecture type in uplink domain and unknown domain dynamic instruction.
9. indicating means as described in claim 1, it is characterised in that: indicate one or more channel architecture type packets to terminal
It includes:
Based on channel architecture type pattern set, channel architecture type drawing indexing is indicated.
10. indicating means as described in claim 1, it is characterised in that: it is logical to determine that the indicating mode of channel architecture comprises determining that
The mode for crossing at least one of indicates the configuration parameter of channel architecture:
System is predefined, semi-static instruction, dynamic instruction.
11. indicating means as claimed in claim 10, it is characterised in that: determine the indicating mode of the configuration parameter of channel architecture
When for semi-static instruction, by remaining minimum system information RMSI or system information block SIB or radio resource control RRC signaling to
The configuration parameter of terminal instruction channel architecture.
12. indicating means as claimed in claim 10, it is characterised in that: determine the indicating mode of the configuration parameter of channel architecture
When for dynamic instruction, the configuration parameter of channel architecture is indicated to terminal by physical downlink control channel PDCCH signaling.
13. indicating means as claimed in claim 12, it is characterised in that: by physical downlink control channel PDCCH signaling to
Terminal indicates that the configuration parameter of channel architecture includes at least one of:
It is indicated in the time slot format relevant information SFI that group shares PDCCH；
It is indicated in sharing PDCCH；
It is indicated in terminal-specific PDCCH；
It is indicated in the non-domain SFI that group shares PDCCH.
14. indicating means as described in claim 1, it is characterised in that: the configuration parameter of the channel architecture includes with next
Kind or multiple types:
The channel architecture type of support；
The time-domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The time-domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The frequency domain position of variable domain and/or the configuration range of length under a kind of channel architecture type；
The frequency domain position in non-variable domain and/or the configuration of length under a kind of channel architecture type；
The configuration of channel architecture type pattern set；
The valid time domain range of channel architecture type；
Effective frequency domain of channel architecture type；
In channel architecture type pattern set, the valid time domain range of each pattern；
In channel architecture type pattern set, the valid time domain range of each element of each pattern；
In channel architecture type pattern set, element number that each pattern includes.
15. indicating means as claimed in claim 14, it is characterised in that: the time-domain position includes one below or more
: Radio Frame Number, sub-frame number, slot index, orthogonal frequency division multiplex OFDM symbol serial number；The time domain length includes following
One or more: radio frames number, number of subframes, number of time slot, OFDM symbol number.
16. indicating means as claimed in claim 14, it is characterised in that: the frequency domain position includes one below or more
: carrier wave serial number, fractional bandwidth BWP serial number, resource block group RBG serial number, Physical Resource Block PRB serial number；The frequency domain packet
Include one or more below: carrier number, BWP number, RBG number, PRB number.
17. indicating means as claimed in claim 14, it is characterised in that: the valid time domain range, including one below
It is or multinomial: one or more slot, OFDM symbol, subframe, radio frames.
18. indicating means as claimed in claim 14, it is characterised in that: the pattern set of the channel architecture type, including
A variety of channel architecture type patterns include one or more identical or different elements in every kind of channel architecture type pattern.
19. indicating means as claimed in claim 14, it is characterised in that: the element is channel architecture type.
20. a kind of indicating means of channel architecture characterized by comprising
It is indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
21. indicating means as claimed in claim 20, it is characterised in that: the channel architecture instruction in the domain SFI, includes one
A or multiple channel architecture indexes.
22. indicating means as claimed in claim 21, it is characterised in that:
When indexing comprising a channel architecture, the index is indicated under the channel architecture type for the support that base station indicates
Index；
When comprising multiple channel architectures index, the multiple index is corresponding in turn to the channel architecture class of base station instruction in order
Element one by one in type pattern.
23. a kind of instruction device of channel architecture characterized by comprising
Determining module is set as determining the indicating mode of channel architecture；
Indicating module is set as the information according to the indicating mode to terminal instruction at least one of:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
24. a kind of instruction device of channel architecture characterized by comprising
Information module is set as being indicated to determine channel structure information according to one or more of:
The instruction of channel architecture type；
The configuration parameter of channel architecture indicates；
Channel architecture instruction in the domain SFI.
25. a kind of instruction device of channel architecture characterized by comprising memory and processor；
The memory, for saving executable instruction；
The processor, the executable instruction saved for executing the memory, proceeds as follows:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
26. a kind of computer readable storage medium, which is characterized in that the computer-readable recording medium storage has computer can
It executes instruction, when the computer executable instructions, proceeds as follows:
Determine the indicating mode of channel architecture；
The information of at least one of is indicated to terminal according to the indicating mode:
The configuration parameter of one or more channel architecture types, one or more kinds of channel architectures.
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