CN109471663B - Method and device for executing single chip microcomputer program - Google Patents
Method and device for executing single chip microcomputer program Download PDFInfo
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- CN109471663B CN109471663B CN201811279756.9A CN201811279756A CN109471663B CN 109471663 B CN109471663 B CN 109471663B CN 201811279756 A CN201811279756 A CN 201811279756A CN 109471663 B CN109471663 B CN 109471663B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
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Abstract
The invention provides a method and a device for executing a singlechip program, wherein the method comprises the following steps: under the condition of starting the operation of the singlechip, starting a timer in the singlechip to time the target time of a delay program included in the singlechip, wherein the delay program is a program which is set to delay the operation of the target time; under the condition that the timing time reaches the target time, converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification; under the condition that the delay program is to be operated, detecting whether the identification information stored in the timer is a second identification; and executing a time delay program under the condition that the identification information is detected to be the second identification. The invention solves the problem of lower execution efficiency of the singlechip program in the related technology, thereby achieving the effect of improving the execution efficiency of the singlechip program.
Description
Technical Field
The invention relates to the field of computers, in particular to a method and a device for executing a single chip microcomputer program.
Background
In the design of a single chip microcomputer program, a time delay is often used for processing some programs. Generally, a cyclic mode is often adopted to generate a delay effect. This approach is suitable for simple programming, but does not allow other programs to be executed during the loop delay. The performance of the single chip microcomputer is seriously wasted in the running process of the program. And with the increase of functions, the program of the single chip microcomputer becomes more complex, and the program running efficiency becomes lower.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a method and a device for executing a singlechip program, which at least solve the problem of low execution efficiency of the singlechip program in the related technology.
According to an embodiment of the present invention, there is provided a method for executing a single chip microcomputer program, including: under the condition of starting the operation of a single chip microcomputer, starting a timer in the single chip microcomputer to time the target time of a delay program included in the single chip microcomputer, wherein the delay program is a program set to delay the operation of the target time; under the condition that the timing time reaches the target time, converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification; under the condition that the time delay program is to be operated, detecting whether the identification information stored in the timer is the second identification; and executing the time delay program under the condition that the identification information is detected to be the second identification.
Optionally, in a case that it is detected that the identification information is the second identification, the method further includes: while executing the delay procedure, converting the identification information stored in the timer from the second identification to the first identification.
Optionally, the time-delay program includes one or more programs, the timer is configured to store the one or more programs and identification information having a corresponding relationship, where detecting whether the identification information stored in the timer is the second identification includes: acquiring a target program to be executed from the one or more programs; acquiring target identification information corresponding to the target program from the one or more programs and the identification information which have the corresponding relation; and detecting whether the target identification information stored in the timer is the second identification.
Optionally, starting the timer in the single chip microcomputer to time the target time of the delay program included in the single chip microcomputer includes: determining the ratio of the target time to a target time interval as a target detection frequency, wherein the target time interval is a time interval for detecting the timer; recording, by the timer, a number of times detection is performed on the timer; and determining that the timing time reaches the target time under the condition that the number of times of detection of the timer reaches the target detection number of times.
According to another embodiment of the present invention, there is provided an execution apparatus of a single chip microcomputer program, including: the timing module is used for starting a timer in the single chip microcomputer to time a target time of a delay program included in the single chip microcomputer under the condition that the single chip microcomputer is started to operate, wherein the delay program is a program which is set to delay the operation of the target time; the first conversion module is used for converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification when the timing time reaches the target time; a detection module, configured to detect whether the identifier information stored in the timer is the second identifier when the delay program is to be executed; and the execution module is used for executing the time delay program under the condition that the identification information is detected to be the second identification.
Optionally, in a case that it is detected that the identification information is the second identification, the apparatus further includes: a second conversion module, configured to convert the identification information stored in the timer from the second identifier to the first identifier while executing the delay procedure.
Optionally, the time-delay program includes one or more programs, and the timer is configured to store the one or more programs and the identification information having a correspondence relationship, where the detection module includes: a first acquisition unit configured to acquire a target program to be executed from the one or more programs; a second acquisition unit configured to acquire target identification information corresponding to the target program from the one or more programs and the identification information having a correspondence relationship; a detecting unit, configured to detect whether the target identification information stored in the timer is the second identification.
Optionally, the timing module comprises: a first determining unit, configured to determine a ratio of the target time to a target time interval as a target detection number, where the target time interval is a time interval for detecting the timer; a recording unit configured to record, by the timer, the number of times detection is performed on the timer; and the second determining unit is used for determining that the timing time reaches the target time under the condition that the number of times of detection of the timer reaches the target detection number of times.
According to a further embodiment of the present invention, there is also provided a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.
According to yet another embodiment of the present invention, there is also provided an electronic device, including a memory in which a computer program is stored and a processor configured to execute the computer program to perform the steps in any of the above method embodiments.
According to the invention, under the condition of starting the operation of the singlechip, the timer in the singlechip is started to time the target time of the delay program included in the singlechip, wherein the delay program is a program which is set to delay the operation of the target time; under the condition that the timing time reaches the target time, converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification; under the condition that the delay program is to be operated, detecting whether the identification information stored in the timer is a second identification; and under the condition that the identification information is detected to be the second identification, executing a delay program, timing the delay time of the program needing to be delayed to operate by utilizing a timer in the single chip microcomputer, setting the identification information corresponding to the delay program in the timer, when the delay program needs to operate, only detecting whether the identification information in the timer is converted into the second identification for indicating that the timing time reaches the target time needing to be delayed, and if the identification information is converted into the second identification, executing the delay program. The single chip microcomputer does not need to adopt a cyclic delay program, and can continue to execute other programs when the timing time of the delay program does not reach the target time, so that the execution of other programs is not influenced. Therefore, the problem of low execution efficiency of the singlechip program in the related technology can be solved, and the effect of improving the execution efficiency of the singlechip program is achieved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
fig. 1 is a block diagram of a hardware structure of a mobile terminal of a method for executing a single-chip microcomputer program according to an embodiment of the present invention;
fig. 2 is a flowchart of an execution method of a one-chip microcomputer program according to an embodiment of the present invention;
fig. 3 is a block diagram of a configuration of an execution device of a one-chip microcomputer program according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a method for executing a single-chip microcomputer program according to an alternative embodiment of the present invention.
Detailed Description
The invention will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
The method provided by the first embodiment of the present application may be executed in a mobile terminal, a computer terminal, or a similar computing device. Taking an example of the operation on a mobile terminal, fig. 1 is a hardware structure block diagram of the mobile terminal of an execution method of a single chip microcomputer program according to an embodiment of the present invention. As shown in fig. 1, the mobile terminal 10 may include one or more (only one shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, and optionally may also include a transmission device 106 for communication functions and an input-output device 108. It will be understood by those skilled in the art that the structure shown in fig. 1 is only an illustration, and does not limit the structure of the mobile terminal. For example, the mobile terminal 10 may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.
The memory 104 may be used to store a computer program, for example, a software program and a module of an application software, such as a computer program corresponding to the execution method of the single chip microcomputer program in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, so as to implement the above-mentioned method. The memory 104 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory located remotely from the processor 102, which may be connected to the mobile terminal 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used for receiving or transmitting data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the mobile terminal 10. In one example, the transmission device 106 includes a Network adapter (NIC), which can be connected to other Network devices through a base station so as to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.
In this embodiment, an execution method of a single chip microcomputer program is provided, and fig. 2 is a flowchart of the execution method of the single chip microcomputer program according to the embodiment of the present invention, as shown in fig. 2, the flowchart includes the following steps:
step S202, under the condition of starting the operation of the single chip microcomputer, starting a timer in the single chip microcomputer to time the target time of a delay program included in the single chip microcomputer, wherein the delay program is a program set to delay the operation of the target time;
step S204, when the timing time reaches the target time, the identification information corresponding to the delay program stored in the timer is converted from the first identification to the second identification;
step S206, under the condition that the time delay program is to be operated, whether the identification information stored in the timer is a second identification is detected;
in step S208, when the identification information is detected as the second identification, a delay procedure is executed.
Through the steps, the timer in the single chip microcomputer is used for timing the delay time of the program needing to be delayed to run, the identification information corresponding to the delay program is set in the timer, when the delay program needs to run, whether the identification information in the timer is converted into the second identification used for indicating that the timing time reaches the target time needing to be delayed is detected, and if the identification information is converted into the second identification, the delay program is executed. The single chip microcomputer does not need to adopt a cyclic delay program, and can continue to execute other programs when the timing time of the delay program does not reach the target time, so that the execution of other programs is not influenced. Therefore, the problem of low execution efficiency of the singlechip program in the related technology can be solved, and the effect of improving the execution efficiency of the singlechip program is achieved.
Optionally, in a case where it is detected that the identification information is the second identification, the identification information stored in the timer is converted from the second identification to the first identification while the delay procedure is executed. The resetting of the identification information is realized, so that the timer can continue to time the delay time of the delay program.
Optionally, the time-delay program includes one or more programs, and the timer is configured to store the one or more programs and the identification information having a corresponding relationship, where in step S206, the target program to be executed is obtained from the one or more programs; acquiring target identification information corresponding to a target program from one or more programs and identification information having a corresponding relationship; and detecting whether the target identification information stored in the timer is the second identification.
Optionally, in this embodiment, there may be one or more delay programs that need to be executed in a delayed manner, setting identification information and a target time for each delay program in the timer, and timing the delay time of each delay program respectively, if a new delay program needs to be added, only adding new identification information in the timer, and then judging corresponding identification information in the main program to run the corresponding delay program.
Optionally, the precision of the timer is adjusted by setting a target time interval of the detection timer, a ratio of the target time to be delayed by the delay program to the target time interval is the minimum number of times of the timer to be detected when the delay program meets the delay requirement, the detection number of times of the timer is recorded by the timer, and whether the timing time reaches the target time is determined by judging whether the detection number of times of the timer reaches the target detection number of times. For example: in the step S202, a ratio of a target time to a target time interval is determined as the target detection number, where the target time interval is a time interval for detecting the timer; recording the number of times of detection performed on the timer through the timer; and under the condition that the number of times of detection of the timer reaches the target detection number of times, determining that the timing time reaches the target time.
Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
In this embodiment, an execution device of a single chip microcomputer program is also provided, and the device is used to implement the foregoing embodiments and preferred embodiments, and the description of which has been already made is omitted. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 3 is a block diagram of an execution device of a single chip microcomputer program according to an embodiment of the present invention, and as shown in fig. 3, the device includes:
the timing module 32 is used for starting a timer in the single chip microcomputer to time the target time of a delay program included in the single chip microcomputer under the condition that the single chip microcomputer is started to operate, wherein the delay program is a program set to delay the target time to operate;
a first conversion module 34, configured to convert, when the counted time reaches the target time, identification information corresponding to the delay program stored in the timer from the first identification to the second identification;
the detecting module 36 is configured to detect whether the identifier information stored in the timer is a second identifier under the condition that the delay program is to be executed;
and an executing module 38, configured to execute the delay procedure in case that the identification information is detected as the second identification.
By the device, the timer in the single chip microcomputer is used for timing the delay time of the program needing to be delayed to run, the identification information corresponding to the delay program is set in the timer, when the delay program needs to run, whether the identification information in the timer is converted into the second identification used for indicating that the timing time reaches the target time needing to be delayed is detected, and if the identification information is converted into the second identification, the delay program is executed. The single chip microcomputer does not need to adopt a cyclic delay program, and can continue to execute other programs when the timing time of the delay program does not reach the target time, so that the execution of other programs is not influenced. Therefore, the problem of low execution efficiency of the singlechip program in the related technology can be solved, and the effect of improving the execution efficiency of the singlechip program is achieved.
Optionally, in a case that the identification information is detected to be the second identification, the apparatus further includes:
and the second conversion module is used for converting the identification information stored in the timer from the second identification to the first identification while executing the delay program.
Optionally, the time-delay program includes one or more programs, and the timer is configured to store the one or more programs and the identification information having a correspondence relationship, where the detection module includes:
a first acquisition unit configured to acquire a target program to be executed from one or more programs;
a second acquisition unit configured to acquire target identification information corresponding to the target program from the one or more programs and the identification information having the correspondence relationship;
and the detection unit is used for detecting whether the target identification information stored in the timer is the second identification.
Optionally, in this embodiment, there may be one or more delay programs that need to be executed in a delayed manner, setting identification information and a target time for each delay program in the timer, and timing the delay time of each delay program respectively, if a new delay program needs to be added, only adding new identification information in the timer, and then judging corresponding identification information in the main program to run the corresponding delay program.
Optionally, the timing module comprises:
the device comprises a first determining unit, a second determining unit and a third determining unit, wherein the first determining unit is used for determining the ratio of target time to target time interval as the target detection times, and the target time interval is the time interval for detecting the timer;
a recording unit for recording, by a timer, the number of times detection is performed on the timer;
and the second determining unit is used for determining that the timing time reaches the target time under the condition that the number of times of detection of the timer reaches the target detection number of times.
Optionally, in this embodiment, the precision of the timer is adjusted by setting a target time interval of the detection timer, a ratio of the target time to be delayed by the delay program to the target time interval is the minimum number of times that the timer needs to be detected when the delay program meets the delay requirement, the detection number of times of the timer is recorded by the timer, and whether the detection number of times of the timer reaches the target detection number of times is determined to determine whether the timing time reaches the target time.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
Reference will now be made in detail to the alternative embodiments of the present invention.
An optional embodiment of the present invention provides an execution method of a single chip microcomputer program, where a reference time (equivalent to the target time interval) is set based on a timer of the single chip microcomputer, all delay flags (equivalent to the flag information) are placed in the timer to be activated uniformly, it is determined in a program main body whether the set delay flag is set to execute a corresponding program, and after the operation is completed, a reset flag waits for the next activation operation of the delay flag. If new delay needs to be added, only new delay marks are added in the timer, and then the corresponding marks are judged in the main program to run the corresponding programs. By using the method, the singlechip does not have excessive waste of resources in the operation process, the program design is relatively simple, the program complexity is reduced, and the program operation efficiency is improved.
Fig. 4 is a schematic diagram of an execution method of a single chip microcomputer program according to an alternative embodiment of the present invention, and as shown in fig. 4, a single chip microcomputer setting register is initialized first, and then a timer is enabled for executing a timing function, and the precision can be set by itself according to requirements. And performing necessary setting of other functions. Thus, the basic setting of the singlechip is completed.
Secondly, writing a timer program, as shown in fig. 4, recording the times of entering the timer by using T1ms1 and T1ms2, judging the times of entering to obtain corresponding delay time, delaying for 1S when the time reaches 1000, and clearing the counting mark for recounting. The T1S flag (corresponding to the second flag described above) is set for execution of the program for which T1S identifies the corresponding program. And so on, more delay time can be added.
The delay marks such as T1S, T2S and the like in the main program are judged for executing the corresponding programs. At the same time, the delay flags (corresponding to the first flag) such as T1S and T2S are reset, and the timer starts to count again. Other programs can also continue to run in the main program.
The method aims to solve the problem of serious waste of the performance of the single chip microcomputer caused by time delay, reduce the complexity of the program design of the single chip microcomputer and improve the program operation efficiency. The optional embodiment provides a pseudo real-time multifunctional singlechip program design method based on a timer. By adopting the execution method of the single chip microcomputer program, the single chip microcomputer has high resource utilization rate, clear program structure, lower design complexity and higher program operation efficiency.
Embodiments of the present invention also provide a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.
Alternatively, in the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:
s1, under the condition that the single chip microcomputer is started to operate, a timer in the single chip microcomputer is started to time the target time of a delay program included in the single chip microcomputer, wherein the delay program is a program set to delay the target time to operate;
s2, when the timing time reaches the target time, the identification information corresponding to the delay program stored in the timer is converted from the first identification to the second identification;
s3, detecting whether the identification information stored in the timer is a second identification under the condition that the delay program is to be operated;
s4, when the identification information is detected as the second identification, a delay procedure is executed.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
Embodiments of the present invention also provide an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the steps of any of the above method embodiments.
Optionally, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Optionally, in this embodiment, the processor may be configured to execute the following steps by a computer program:
s1, under the condition that the single chip microcomputer is started to operate, a timer in the single chip microcomputer is started to time the target time of a delay program included in the single chip microcomputer, wherein the delay program is a program set to delay the target time to operate;
s2, when the timing time reaches the target time, the identification information corresponding to the delay program stored in the timer is converted from the first identification to the second identification;
s3, detecting whether the identification information stored in the timer is a second identification under the condition that the delay program is to be operated;
s4, when the identification information is detected as the second identification, a delay procedure is executed.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the principle of the present invention should be included in the protection scope of the present invention.
Claims (4)
1. An execution method of a singlechip program is characterized by comprising the following steps:
under the condition of starting the operation of a single chip microcomputer, starting a timer in the single chip microcomputer to time the target time of a delay program included in the single chip microcomputer, wherein the delay program is a program set to delay the operation of the target time;
under the condition that the timing time reaches the target time, converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification;
under the condition that the time delay program is to be operated, detecting whether the identification information stored in the timer is the second identification;
executing the delay program under the condition that the identification information is detected to be the second identification;
starting a timer in the single chip microcomputer to time the target time of a delay program included in the single chip microcomputer comprises the following steps:
determining the ratio of the target time to a target time interval as a target detection frequency, wherein the target time interval is a time interval for detecting the timer;
recording, by the timer, a number of times detection is performed on the timer;
determining that the timing time reaches the target time under the condition that the number of times of detection of the timer reaches the target detection number of times;
in the case that it is detected that the identification information is the second identification, the method further includes: while executing the delay procedure, converting the identification information stored in the timer from the second identification to the first identification;
the delay program includes one or more programs, the timer is configured to store the one or more programs and identification information having a correspondence, where detecting whether the identification information stored in the timer is the second identification includes: acquiring a target program to be executed from the one or more programs; acquiring target identification information corresponding to the target program from the one or more programs and the identification information which have the corresponding relation; and detecting whether the target identification information stored in the timer is the second identification.
2. An executive device of a single chip microcomputer program is characterized by comprising:
the timing module is used for starting a timer in the single chip microcomputer to time a target time of a delay program included in the single chip microcomputer under the condition that the single chip microcomputer is started to operate, wherein the delay program is a program which is set to delay the operation of the target time;
the first conversion module is used for converting the identification information corresponding to the delay program stored in the timer from a first identification to a second identification when the timing time reaches the target time;
a detection module, configured to detect whether the identifier information stored in the timer is the second identifier when the delay program is to be executed;
the execution module is used for executing the time delay program under the condition that the identification information is detected to be the second identification;
the timing module includes:
a first determining unit, configured to determine a ratio of the target time to a target time interval as a target detection number, where the target time interval is a time interval for detecting the timer;
a recording unit configured to record, by the timer, the number of times detection is performed on the timer;
a second determination unit configured to determine that the counted time reaches the target time when the number of times of detection performed on the timer reaches the target detection number of times;
in the case that the identification information is detected to be the second identification, the apparatus further includes: a second conversion module, configured to convert the identification information stored in the timer from the second identifier to the first identifier while executing the delay procedure;
the delay program comprises one or more programs, the timer is used for storing the one or more programs and the identification information with corresponding relations, and the detection module comprises: a first acquisition unit configured to acquire a target program to be executed from the one or more programs; a second acquisition unit configured to acquire target identification information corresponding to the target program from the one or more programs and the identification information having a correspondence relationship; a detecting unit, configured to detect whether the target identification information stored in the timer is the second identification.
3. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method as claimed in claim 1 when executed.
4. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of claim 1.
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