CN109460296B - Resource allocation method and device of processor and storage medium - Google Patents

Resource allocation method and device of processor and storage medium Download PDF

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Publication number
CN109460296B
CN109460296B CN201811236176.1A CN201811236176A CN109460296B CN 109460296 B CN109460296 B CN 109460296B CN 201811236176 A CN201811236176 A CN 201811236176A CN 109460296 B CN109460296 B CN 109460296B
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execution statement
statement
execution
hardware
syntax tree
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CN109460296A (en
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江树浩
李家军
龚施俊
鄢贵海
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Zhongke Yuanshu (beijing) Technology Co Ltd
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Zhongke Yuanshu (beijing) Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5022Mechanisms to release resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

The invention discloses a resource allocation method, a device and a storage medium of a processor, wherein the method comprises the following steps: determining initial hardware resources; reading and analyzing the execution statement, and establishing an abstract syntax tree aiming at the execution statement; counting hardware resource requirements according to the abstract syntax tree; and distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources. The embodiment of the invention can simplify the hardware design difficulty and reduce the hardware overhead, the processor area, the power consumption and the like.

Description

Resource allocation method and device of processor and storage medium
Technical Field
The present invention relates to computer technologies, and in particular, to a resource allocation method, device and computer-readable storage medium.
Background
The hardware resources of the processor are limited, and the system needs to allocate a reasonable amount of resources to each task before the task running on the upper layer starts to execute, so as to avoid resource waste or shortage. For a general-purpose processor, due to the design of generality, out-of-order execution and the like, the processor needs to design a special resource allocation unit for each type of basic hardware unit (such as a floating point number calculation unit and an integer calculation unit) and implement the resource allocation unit in hardware.
The special processor is designed for a specific field, the hardware resources and the quantity of the special processor are more limited, and if a reasonable resource distribution system is lacked, the special processor is more easily blocked to cause the reduction of the system performance.
How to simplify hardware design difficulty for resource allocation and improve dedicated processor resource allocation performance has not been proposed yet.
Disclosure of Invention
In view of the foregoing, the present invention is directed to a resource allocation method, apparatus and computer-readable storage medium.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
the embodiment of the invention provides a resource allocation method, which comprises the following steps:
determining initial hardware resources;
reading and analyzing the execution statement, and establishing an abstract syntax tree aiming at the execution statement;
counting hardware resource requirements according to the abstract syntax tree; and
and distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources.
In the foregoing solution, the step of determining an abstract syntax tree for an execution statement according to an analysis result includes:
reading the execution statement in a character string mode, analyzing the execution statement according to the context-free grammar, and establishing an abstract syntax tree aiming at the execution statement.
In the above scheme, the execution statement includes a nested statement;
correspondingly, the step of analyzing the execution statement according to the context-free grammar and establishing an abstract syntax tree for the execution statement comprises:
determining whether the execution statement contains a nested part, and establishing a temporary variable corresponding to the independent part by taking the nested part as an independent statement when determining that the execution statement contains the nested part;
and establishing an abstract syntax tree aiming at the execution statement by taking the temporary variable as the original nesting part in the execution statement.
In the above scheme, the abstract syntax tree is traversed from the root node of the abstract syntax tree with breadth first;
and according to the data type stored in the traversed node, counting the hardware resource requirements required by the execution statement.
In the above scheme, whether the initial hardware resources have enough hardware resources is queried according to the hardware resource requirements; when determining that enough hardware resources exist, allocating corresponding target hardware resources to execute the statement;
after the allocating the corresponding target hardware resource, the method further includes: and releasing the target hardware resource after the execution of the execution statement is determined to be completed.
In the foregoing solution, the determining an abstract syntax tree for an execution statement according to an analysis result includes: dividing the execution statement to obtain at least one meta execution statement; determining an abstract syntax tree corresponding to the at least one meta-execution statement;
after determining the abstract syntax tree for the execution statement according to the analysis result, the method further includes: constructing an execution statement vector; the constructing of the execution statement vector includes: counting hardware resource requirements according to the abstract syntax tree corresponding to the at least one meta-execution statement, and constructing an execution statement vector; the executing statement vector includes at least: at least one meta-execution statement, and matching states and hardware resource requirements of the meta-execution statement;
the allocating corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources includes: and allocating a target hardware resource corresponding to each meta execution statement in at least one meta execution statement in the execution statement vector according to the execution statement vector and the hardware initial resource.
An embodiment of the present invention provides a resource allocation apparatus, where the apparatus includes: the system comprises a first processing module, a second processing module and a third processing module; wherein the content of the first and second substances,
the first processing module is used for determining hardware initial resources;
the second processing module is used for reading and analyzing the execution statement and establishing an abstract syntax tree aiming at the execution statement;
the third processing module is used for counting hardware resource requirements according to the abstract syntax tree; and distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources.
In the above scheme, the execution statement includes a nested statement;
correspondingly, the second processing module is further configured to: detecting whether the execution statement contains a nested part or not, and establishing a temporary variable corresponding to the independent part by taking the nested part as an independent statement when determining that the execution statement contains the nested part; and establishing an abstract syntax tree aiming at the execution statement by taking the temporary variable as the original nesting part in the execution statement.
An embodiment of the present invention provides a resource allocation apparatus, where the apparatus includes: a processor and a memory for storing a computer program capable of running on the processor; wherein the processor is configured to execute the steps of any one of the resource allocation methods when the computer program is run.
An embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of any one of the resource allocation methods described above.
The resource allocation method, the device and the computer readable storage medium provided by the embodiment of the invention determine the initial resources of hardware; acquiring an execution statement, analyzing the execution statement, and determining an abstract syntax tree for the execution statement according to an analysis result; counting hardware resource requirements according to the abstract syntax tree; and distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources. In the embodiment of the invention, the resource allocation of the special processor is defined by software, the hardware resource allocation of the special processor is realized by operations such as task abstraction, resource demand statistics, resource matching, resource release and the like, the hardware design difficulty is simplified, and the hardware overhead, the processor area, the power consumption and the like are reduced.
Drawings
Fig. 1 is a schematic flowchart of a hardware resource allocation method according to an embodiment of the present invention;
fig. 2 is a schematic flowchart of another hardware resource allocation method according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an abstract syntax tree of a basic statement according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a structure of an abstract syntax tree containing nested statements according to an embodiment of the present invention;
FIG. 5 is a flow chart illustrating an implementation of resource demand statistics according to an embodiment of the present invention;
fig. 6 is a flowchart illustrating an implementation of resource matching according to an embodiment of the present invention;
fig. 7 is a flowchart of an implementation of resource release according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a hardware resource allocation system according to an embodiment of the present invention;
fig. 9 is a schematic flow chart illustrating an implementation of a software-defined hardware resource allocation apparatus according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a hardware resource allocation apparatus according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another hardware resource allocation apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the following embodiments and accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
It should be noted that the figures and description omit representation and description of components and processes that are not relevant to the present invention and that are known to those of ordinary skill in the art for the sake of clarity.
In addition, it should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components.
The special processor is different from the general processor, namely the special processor executes a specific task type, and the control logic is simpler, so that a special resource allocation unit is not needed to be realized on hardware like the general processor. The concept of software definition has proven to be a relatively efficient design methodology in some specific areas. Such as Software Defined Networking (SDN), Software Defined Radio (SDR), etc., but there has not been any use for processor resource allocation.
The invention provides a resource allocation method and device based on software definition and oriented to a special processor. The present invention will be described in detail with reference to examples.
Fig. 1 is a schematic flowchart of a hardware resource allocation method according to an embodiment of the present invention, where the method is applied to a special processor, and the method is used to allocate hardware resources to the special processor. As shown in fig. 1, the method comprises the steps of:
and step S101, determining hardware initial resources.
Specifically, the step S101 may include: the hardware resources currently available (allocatable) by the special-purpose processor are acquired as hardware initial resources. The available hardware resources may include: buffers, FIFOs (first in first out), computing units, etc., but the present invention is not limited thereto.
In an embodiment of the present invention, the hardware initial resource information may be recorded by using a hardware resource table.
And step S102, reading and analyzing the execution statement, and establishing an abstract syntax tree aiming at the execution statement.
This step is a task abstraction operation step. For example, the execution statement may be read in the form of a string, and the execution statement may be analyzed according to the context-free grammar to build an abstract syntax tree for the execution statement.
In an embodiment of the present invention, for the case that there is nesting in the execution statement, the nested part (i.e. the inner nested statement) in the execution statement may be selected as an independent statement, and a temporary variable may be suggested for the independent statement. That is, in this case, the step of analyzing the execution statement and creating the abstract syntax tree for the execution statement includes: when the execution statement is analyzed to determine that the execution statement contains the nested part, the nested part is used as an independent statement, a temporary variable corresponding to the independent statement is established to replace the original nested part (namely, an inner-layer nested statement), and thus an abstract syntax tree for the execution statement is established.
That is to say, in this embodiment, when there is nesting between execution statements, the nested execution statements are expanded (that is, the inner-layer nested statement is taken as an independent statement, and a temporary variable is proposed for the independent statement), which has an advantage that the granularity of the execution statements can be minimized, and the minimum execution granularity can allocate the execution statements to resources as much as possible, so that the statements are executed as early as possible, and the time for which the resources are idle is reduced.
The abstract syntax trees may be used to parse the original program and record execution statements, each tree representing a meta execution statement. The abstract syntax tree records the logic and necessary data for each meta-execution statement. In the embodiment of the invention, the abstract syntax tree supports nested expansion operation and traversal statistical operation.
The operation of expanding the nested execution statements as described above may also be considered a split operation on the execution statements. In some embodiments of the present invention, the step of building an abstract syntax tree for the execution statement may further comprise: and dividing the execution statement to obtain a meta execution statement, so as to establish an abstract syntax tree corresponding to the meta execution statement.
In the preferred embodiment of the present invention, the divided meta execution statements may be arranged and stored in an execution order, for example, in the form of a vector, where each element in the vector represents a meta execution statement, and the vector may be referred to as an execution statement vector.
And step S103, counting the hardware resource requirements according to the abstract syntax tree.
Specifically, the step may include: and traversing the abstract syntax tree, and counting the hardware resource requirements required by the execution statement according to the data type corresponding to the traversed node.
As an example, in this step, the abstract syntax tree may be traversed breadth-first starting from the root node of the abstract syntax tree; and counting the quantity of various hardware resources related in the execution statement according to the data type stored in the traversed node, thereby counting the hardware resource requirements required by the execution statement. For example, if a node stores the operation symbol "+", the addition unit of the execution statement will add 1.
In an embodiment of the present invention, the resource requirement statistics operation further includes: after the resource requirement of each execution statement is counted, the resource requirement may be added to the execution statement vector generated in step S102.
And step S104, distributing corresponding hardware resources for the execution statement according to the hardware resource requirements and the hardware initial resources.
This step is also referred to as a resource matching step. Specifically, the step may include: determining whether the initial hardware resources have enough hardware resources according to the hardware resource requirements of the execution statements; and when the sufficient hardware resources are determined, allocating the hardware resources corresponding to the hardware resource requirements to the execution statements, or allocating or matching the corresponding hardware resources for the execution statements. Based on the allocated resources, meta-execution statements may be executed.
In the case of recording the hardware state by using the hardware resource table, after allocating the hardware resource to the execution statement, the hardware resource state information in the resource table is updated accordingly.
In the case of recording the execution statement in the form of an execution statement vector, this step S104 may include: and allocating the hardware resource corresponding to each element execution statement in the execution statement vector according to the execution statement vector and the hardware initial resource.
The execution statement vector may further have a flag bit to indicate an execution state or a matching state of the statement element, where the execution state may include: unmatched, matched, completed. At this point, each element in the execution statement vector includes at least the following information: meta-execution statements, hardware resource requirements of meta-execution statements, and execution states.
In an embodiment of the invention, the execution statement vector is used for resource matching and recording occupied resources. The execution statement is generated through the task abstract operation, the information of the quantity of the added required resources is counted through the resource demand, and then the resource occupation information, such as the resource ID, is added through the resource matching operation. The execution statement vector can be provided with a flag bit to indicate the execution state of the statement element, and the execution state comprises: unmatched, matched, completed.
In this embodiment of the present invention, after allocating corresponding hardware resources for the execution statement, the hardware resource allocation method may further include: and after the execution of the execution statement is determined to be finished, releasing the hardware resources occupied by the execution statement.
Compared with the prior art, the method and the device have the advantages that the resource allocation of the special processor is defined through software, the hardware resource allocation of the special processor is realized through operations such as task abstraction, resource demand statistics, resource matching and resource release, the hardware design difficulty is simplified, and the hardware overhead, the processor area and the power consumption are reduced.
Fig. 2 is a flowchart illustrating a hardware resource allocation method according to another embodiment of the present invention. As shown in fig. 2, the method comprises the steps of:
step S201, hardware resource initialization.
Specifically, the step may include: and establishing a hardware resource table, counting the available hardware resources of the special processor, initializing the number of the available hardware resources in the condition of all idle states, and recording the number in the hardware resource table.
Available hardware resources include, for example: buffers, FIFOs, compute units, etc., but the invention is not limited thereto.
Table 1 shows an example of a hardware resource table provided in the embodiment of the present invention, in table 1, a resource state of 1 indicates that a hardware resource is in an idle state, and a resource state of 0 indicates that a hardware resource is in a busy state. The naming and values of the resources in the table are only exemplary, and other naming methods are also within the scope of the present invention.
TABLE 1 examples of hardware resource tables
As can be seen from table 1, the hardware resource table is used to record the usage of the hardware resources, the hardware resource table is initialized to all the hardware resources at the initial stage, and dynamically changes according to the execution of the program statements during the program execution process, and the hardware resource table mainly stores the number of various hardware resources, the resource ID, and the resource status.
Step S202, reading and analyzing the execution statements, and establishing an abstract syntax tree for each execution statement.
The step is a task abstract operation process. Specifically, the step S202 may include: reading the execution statement in a character string mode, analyzing the statement according to the context-free grammar, and establishing an abstract syntax tree corresponding to the execution statement.
Here, for the case where there is nesting in the execution statements, the nested statements need to be expanded first, so that the granularity of the execution statements can be minimized, and the minimum execution granularity can enable the execution statements to be allocated to resources as much as possible, enable the execution statements to be executed as early as possible, and reduce the time for the resources to be idle, and the execution statements with the minimum granularity are called meta-execution statements.
The operation of expanding the nested statements may include: in the process of establishing the abstract syntax tree, whether the execution statement comprises a nested part or not is determined, when the execution statement comprises the nested part, the nested part (namely, an inner-layer nested statement) is used as an independent statement, a temporary variable is newly established to replace the original nested part (namely, the inner-layer nested statement), and the abstract syntax tree corresponding to the execution statement is established.
The abstract syntax tree is further described below in conjunction with fig. 3 and 4.
FIG. 3 is a diagram illustrating a structure of an abstract syntax tree of a basic sentence according to an embodiment of the present invention; as shown in fig. 3, for an execution statement X ═ a + B without nesting, the abstract syntax tree is constructed using an inverse wave-blue representation, i.e. an operand is located before an operator, the inverse wave-blue representation of the execution statement X a B + ═ then constructed from bottom to top, resulting in the abstract syntax tree shown in fig. 3.
FIG. 4 is a diagram illustrating a structure of an abstract syntax tree containing nested statements according to an embodiment of the present invention; as shown in fig. 4, for one execution statement X ═ C (a + B) with nesting, a temporary variable T corresponding to the inner-layer nested statement is established, and then the nested statement can be decomposed into: t is A + B; x is C T, and then the abstract syntax tree shown in fig. 4 is obtained according to the basic syntax tree construction method shown in fig. 3.
The method can ensure that when hardware lacks an idle multiplier and has an idle adder, the first addition statement is executed first, and the multiplication statement is judged after the addition statement is matched, so that the situation that the statement can be executed only when multiplication and the adder are idle at the same time is avoided, and the execution possibility of the statement is improved.
It should be noted that the above description is only used as an example, and more complex (e.g. more nested) execution statements or more complex operators (e.g. custom kernel function, etc.) can be resolved according to the method.
The operation of expanding the nested execution statements as described above may also be considered a split operation on the execution statements. The divided meta execution statement may be recorded in the form of a vector. At this time, step S202 may further include: and constructing an execution statement vector.
The step of constructing the execution statement vector may comprise: dividing the execution statement to obtain more than one meta execution statement; the divided meta execution statements are arranged and stored according to the execution order, for example, the meta execution statements are recorded in the form of vectors, and each element in the vector represents one meta execution statement to form an execution statement vector. The execution statement vector may include information for the execution statement, including, for example: result information, hardware resource requirement information and matching state of each element, wherein the result information refers to information related to execution results, such as: result name or result ID, etc. The hardware resource requirement information may include a resource type, a resource number, and a resource ID. Table 2 is an example table of executing statement vectors according to an embodiment of the present invention.
TABLE 2 example Table of execution statement vectors
And step S203, counting the hardware resource requirements according to the abstract syntax tree.
Specifically, the step S203 may include: and counting the number of various hardware resources contained in the execution statement by traversing the corresponding abstract syntax tree for each execution statement after abstraction.
The step of traversing the abstract syntax tree may comprise: starting from a root node, traversing the abstract syntax tree with breadth first, and counting the hardware resource requirements needed by the execution statement according to the data types stored in the traversed nodes.
Fig. 5 is a flowchart illustrating an implementation of counting resource requirements according to an embodiment of the present invention. As shown in fig. 5, the step of counting the hardware resource requirements required for executing the statement includes: starting access from the root node of the abstract syntax tree to obtain a node resource type, matching the node resource type with the resource type in the hardware resource table, and continuing to match the next type if matching fails; otherwise, the resource +1 of the execution statement element continues to be matched with the next type until all resource types are matched; and then judging whether all the nodes of the abstract syntax tree are traversed or not, if not, continuing to visit the nodes of the next syntax tree, and if so, traversing the next abstract syntax tree.
In the embodiment of the present invention, the step of counting the hardware resource requirements required by the execution statement may further include:
and after the hardware resource requirements of each execution statement are counted, adding the hardware resource requirements into the corresponding execution statement vector.
And step S204, distributing corresponding hardware resources according to the hardware resource requirements.
This step is also referred to as a resource matching step. Specifically, this step 204 may include:
a resource request process, namely requesting corresponding hardware resources from a hardware resource table according to the hardware resource requirements in the execution statement vector, and returning whether the hardware resources are enough to finish the execution of the execution statement from the hardware resource table;
and if the hardware resource table returns true, namely the hardware resources are enough for the current statement to execute, allocating corresponding hardware resources for the execution statement.
It should be noted that the above resource matching operation is a polling process, and when a certain statement element is determined to be matched or cannot be matched temporarily, the software system will continue to perform the determination of the next statement until all execution statements are determined, so that the matched execution statements can be allocated to resources.
Specifically, after allocating corresponding hardware resources for executing statements, the method of the present invention further includes: and updating the hardware resources. The step of updating the hardware resources may comprise: and allocating resources required by the execution statement by the hardware resource table, returning a resource ID to a corresponding statement element of a corresponding statement vector, marking the node as allocated, and marking the available state of the hardware resources as 0 to indicate that the hardware resources are unavailable.
Fig. 6 is a flowchart of implementing resource matching according to an embodiment of the present invention. As shown in fig. 6, the system obtains a statement element from the execution statement vector, obtains the required hardware resource information, then checks that the hardware resource table can meet the hardware resource requirement, and if the hardware resource table cannot meet the hardware resource requirement, continues to perform hardware resource matching of the next statement; otherwise, the hardware resource table is updated, and the matchable signal and the matched resource information are returned. And the statement element updates the self information according to the returned information, writes the hardware resource information and updates the execution statement state to be distributed. And then checking whether all the execution statements are completely allocated, if so, ending, and otherwise, continuing the resource allocation of the next execution statement.
In the embodiment of the present invention, the hardware resource allocation method further includes:
step 205, after the execution of the execution statement is determined, releasing the hardware resources occupied by the execution statement.
This step is a hardware resource release step. Specifically, after an execution statement that has matched a hardware resource is executed, the software system will detect whether its execution result returns in a polling manner, and if the execution result returns, release the corresponding hardware resource.
The step of releasing hardware resources further comprises: and reading the occupied resource information of the execution statement, updating a hardware resource table by using the information, marking the available state of the resources as 1, and marking the statement element as completed.
For example, when an execution statement that matches a hardware resource is confirmed to be executed, a resource release operation is performed, where the resource release operation includes: and reading the occupied resource information of the execution statement, updating a hardware resource table by using the information, marking the available state of the resources as 1, and marking the statement element as completed.
Fig. 7 is a flowchart illustrating releasing hardware resources according to an embodiment of the present invention. As shown in fig. 7, the process of releasing hardware resources includes: the software system acquires result information corresponding to the execution statement from the execution statement vector, then requests a result state from the special processor, and if the result state is incomplete, continues to release the resources of the next execution statement; otherwise, the state of the statement element is updated to be completed, the hardware resource table is updated, and the hardware resource occupied by the statement is released. And then checking whether all the execution statements are completely executed, if the execution is completed, ending, and otherwise, continuing to release the hardware resources of the next execution statement.
In this embodiment, the resource allocation of the special processor is defined by software, and the allocation of the hardware resources of the special processor is realized by operations such as resource initialization, task abstraction, resource demand statistics, resource matching, resource release and the like, so that the hardware design difficulty is simplified, and the hardware overhead, the processor area, the power consumption and the like are reduced.
Correspondingly, the invention also provides a hardware resource allocation system for executing the hardware resource allocation method. Fig. 8 is a schematic structural diagram of a hardware resource allocation system according to an embodiment of the present invention; as shown in fig. 8, a schematic structural diagram of a specific hardware resource allocation system according to an embodiment of the present application may be implemented based on a master-slave device structure. The hardware resource allocation unit is realized by codes and operates on a main device consisting of a CPU and a storage unit, the main device consists of the CPU and the storage unit, the slave device is realized by hardware FPGA programming, and the main device and the slave device are in butt joint through a PCIE interface. And the resource information required by the execution of the program flow is mapped to the FPGA of the slave equipment through the hardware resource allocation unit, and the program flow instruction is transmitted through the master equipment to be executed on the slave equipment and finally returns a result, so that the program is completed.
Fig. 9 is a schematic flow chart illustrating an implementation process of a software-defined hardware resource allocation apparatus according to an embodiment of the present invention. The apparatus may correspond to the hardware resource allocation unit in fig. 8. As shown in fig. 9, the hardware resource allocation apparatus includes: the system comprises a resource initialization module, a task abstraction module, a resource demand statistics module, a resource matching module and a resource release module.
The resource initialization module, the task abstraction module, the resource demand statistics module, the resource matching module, and the resource release module may respectively perform the method steps of steps S201 to S205 shown in fig. 2.
Fig. 10 is a schematic structural diagram of a hardware resource allocation apparatus according to an embodiment of the present invention; as shown in fig. 10, the hardware resource allocation apparatus may include: the device comprises a first processing module, a second processing module and a third processing module.
The first processing module is used for determining hardware initial resources;
the second processing module is used for reading and analyzing the execution statement and establishing an abstract syntax tree aiming at the execution statement;
and the third processing module is used for counting the hardware resource requirements according to the abstract syntax tree and distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources.
Specifically, the second processing module may be specifically configured to read the execution statement in the form of a character string, analyze the execution statement according to the context-free grammar, and establish an abstract syntax tree for the execution statement.
In addition, the second processing module may be specifically configured to detect whether the execution statement includes a nested portion, and when it is determined that the execution statement includes the nested portion, use the nested portion as an independent statement, and establish a temporary variable corresponding to the independent portion. The temporary variables may be used as the original nesting parts in the execution statement to create an abstract syntax tree for the execution statement.
Specifically, the third processing module may be specifically configured to: traversing the abstract syntax tree with breadth first from a root node of the abstract syntax tree; and counting the hardware resource requirements required by the execution statements according to the data types stored in the traversed nodes.
The third processing module can also be used for inquiring whether enough hardware resources exist according to the hardware resource requirements; when it is determined that there are sufficient hardware resources, then the corresponding target hardware resources are allocated to execute the statement.
The third processing module may be further configured to release the target hardware resource when it is determined that the execution of the execution statement is completed.
Specifically, the second processing module may be further configured to segment the execution statement to obtain at least one meta execution statement; and determining an abstract syntax tree corresponding to at least one meta-execution statement.
The second processing module may also be used to construct an execution statement vector. Specifically, the second processing module counts hardware resource requirements according to an abstract syntax tree corresponding to at least one meta-execution statement, and constructs an execution statement vector; executing the statement vector includes at least: meta-execution statements, and matching states and hardware resource requirements of the meta-execution statements.
Correspondingly, the third processing module may be further configured to allocate, according to the execution statement vector and the hardware initial resource, a target hardware resource corresponding to each meta execution statement in at least one meta execution statement in the execution statement vector.
It should be noted that: the first to third processing modules may be integrated into one processing module (e.g., a processor), or may be implemented by more processing modules.
Fig. 11 is a schematic structural diagram of another hardware resource allocation apparatus according to an embodiment of the present invention; the resource allocation apparatus may be applied to a device including a dedicated processor, such as a server; as shown in fig. 11, the apparatus 40 includes: a processor 401 and a memory 402 for storing computer programs capable of running on the processor; when the processor 401 is configured to run the computer program, the steps of the hardware resource allocation method are performed as described above, which are not described herein again.
In practical applications, the hardware resource allocation apparatus 40 may further include: at least one network interface 403. The various components in the resource allocation device 40 are coupled together by a bus system 404. It is understood that the bus system 404 is used to enable communications among the components. The bus system 404 includes a power bus, a control bus, and a status signal bus in addition to a data bus. For clarity of illustration, however, the various buses are labeled as bus system 404 in FIG. 11. The number of the processors 404 may be at least one. The network interface 403 is used for wired or wireless communication between the resource allocation apparatus 40 and other devices.
The method disclosed in the above embodiments of the present invention may be applied to the processor 401, or implemented by the processor 401 in fig. 11. The processor 401 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 401. In an exemplary embodiment, the resource allocation Device 40 may be implemented by one or more Application Specific Integrated Circuits (ASICs), DSPs, Programmable Logic Devices (PLDs), Complex Programmable Logic Devices (CPLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, Micro Controllers (MCUs), microprocessors (microprocessors), or other electronic components for performing the foregoing methods.
An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the hardware resource allocation method are performed, which are not described herein again.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (8)

1. A method for allocating resources of a processor, the method comprising:
determining initial hardware resources;
reading and analyzing an execution statement, and establishing an abstract syntax tree aiming at the execution statement;
counting hardware resource requirements according to the abstract syntax tree; and
distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources;
wherein, the step of reading and analyzing the execution statement and establishing the abstract syntax tree aiming at the execution statement comprises the following steps:
reading the execution statement in a character string mode, analyzing the execution statement according to a context-free grammar, and establishing an abstract syntax tree aiming at the execution statement;
the step of analyzing the execution statements according to the context-free grammar and building an abstract syntax tree for the execution statements comprises: when the execution statement is determined to contain the nested part, taking the nested part as an independent statement, and establishing a temporary variable corresponding to the independent part; and establishing an abstract syntax tree aiming at the execution statement by taking the temporary variable as the original nesting part in the execution statement.
2. The method of claim 1, wherein the step of counting hardware resource requirements according to the abstract syntax tree comprises:
traversing the abstract syntax tree breadth-first starting from a root node of the abstract syntax tree;
and according to the data type stored in the traversed node, counting the hardware resource requirements required by the execution statement.
3. The method of claim 1, wherein the step of allocating corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources comprises: inquiring whether the initial hardware resources have enough hardware resources according to the hardware resource requirements; when determining that enough hardware resources exist, allocating corresponding target hardware resources to execute the statement;
after the allocating the corresponding target hardware resource, the method further includes: and releasing the target hardware resource after the execution of the execution statement is determined to be completed.
4. The method of claim 1, wherein the step of building an abstract syntax tree for an execution statement further comprises: dividing the execution statement to obtain at least one meta execution statement, and establishing an abstract syntax tree corresponding to the at least one meta execution statement;
after the building the abstract syntax tree for the execution statement, the method further comprises: constructing an execution statement vector; the step of constructing an execution statement vector includes: counting hardware resource requirements according to the abstract syntax tree corresponding to the at least one meta-execution statement, and constructing an execution statement vector; the executing statement vector includes at least: at least one meta-execution statement, and matching states and hardware resource requirements of the meta-execution statement;
the step of allocating corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources comprises: and allocating a target hardware resource corresponding to each meta execution statement in at least one meta execution statement in the execution statement vector according to the execution statement vector and the hardware initial resource.
5. An apparatus for resource allocation, the apparatus comprising: the system comprises a first processing module, a second processing module and a third processing module; wherein the content of the first and second substances,
the first processing module is used for determining hardware initial resources;
the second processing module is used for reading and analyzing the execution statement and establishing an abstract syntax tree aiming at the execution statement;
the third processing module is used for counting hardware resource requirements according to the abstract syntax tree; distributing corresponding target hardware resources according to the hardware resource requirements and the hardware initial resources;
the second processing module reads the execution statement in a character string form, analyzes the execution statement according to a context-free grammar, and establishes an abstract syntax tree for the execution statement;
the analyzing the execution statement according to the context-free grammar, and the building an abstract syntax tree for the execution statement comprises: when the execution statement is determined to contain the nested part, taking the nested part as an independent statement, and establishing a temporary variable corresponding to the independent part; and establishing an abstract syntax tree aiming at the execution statement by taking the temporary variable as the original nesting part in the execution statement.
6. The apparatus of claim 5, wherein the executing the statement comprises: nesting sentences;
the second processing module is further configured to:
detecting whether the execution statement contains a nested part or not, and establishing a temporary variable corresponding to the independent part by taking the nested part as an independent statement when determining that the execution statement contains the nested part;
and establishing an abstract syntax tree aiming at the execution statement by taking the temporary variable as the original nesting part in the execution statement.
7. An apparatus for resource allocation, the apparatus comprising: a processor and a memory for storing a computer program capable of running on the processor; wherein the content of the first and second substances,
the processor is adapted to perform the steps of the method of any one of claims 1 to 4 when running the computer program.
8. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 4.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1661558A (en) * 2004-02-24 2005-08-31 何积丰 Method of designing hardware compiler based on program algebra
CN101489302A (en) * 2008-01-16 2009-07-22 中兴通讯股份有限公司 Resource allocation method
CN103617091A (en) * 2013-12-18 2014-03-05 深圳市道通科技有限公司 Implementation method and device for dynamic allocation of hardware resources
CN107797866A (en) * 2016-05-31 2018-03-13 广东欧珀移动通信有限公司 The distribution method and mobile terminal and medium product of processor resource
CN107832151A (en) * 2017-11-10 2018-03-23 东软集团股份有限公司 A kind of cpu resource distribution method, device and equipment
CN108052394A (en) * 2017-12-27 2018-05-18 福建星瑞格软件有限公司 The method and computer equipment of resource allocation based on SQL statement run time

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1661558A (en) * 2004-02-24 2005-08-31 何积丰 Method of designing hardware compiler based on program algebra
CN101489302A (en) * 2008-01-16 2009-07-22 中兴通讯股份有限公司 Resource allocation method
CN103617091A (en) * 2013-12-18 2014-03-05 深圳市道通科技有限公司 Implementation method and device for dynamic allocation of hardware resources
CN107797866A (en) * 2016-05-31 2018-03-13 广东欧珀移动通信有限公司 The distribution method and mobile terminal and medium product of processor resource
CN107832151A (en) * 2017-11-10 2018-03-23 东软集团股份有限公司 A kind of cpu resource distribution method, device and equipment
CN108052394A (en) * 2017-12-27 2018-05-18 福建星瑞格软件有限公司 The method and computer equipment of resource allocation based on SQL statement run time

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