CN109446109B - Method for hybrid recording entity mapping table - Google Patents
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- CN109446109B CN109446109B CN201811253542.4A CN201811253542A CN109446109B CN 109446109 B CN109446109 B CN 109446109B CN 201811253542 A CN201811253542 A CN 201811253542A CN 109446109 B CN109446109 B CN 109446109B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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Abstract
The invention discloses a method for recording a physical mapping table in a mixed mode, which comprises the following steps: the method comprises the following steps: based on the space relation of the static random access memory, the entity mapping table is stored according to the size of the static random access memory; step two: recording the entity mapping unit of each flash memory page by taking each 4 bytes as a unit; step three: recording the entity mapping unit of each flash memory page in sequence until the space of the static random access memory is fully written; step four: when the requirement of the static random access memory is met, the user data and the entity mapping table are mixed into a flash memory page and are written into the flash memory block together.
Description
Technical Field
The invention relates to the technical field of hybrid recording entity mapping tables in a storage system, in particular to a method for hybrid recording entity mapping tables.
Background
Flash memory is a long-lived, non-volatile memory, data erasure is not in individual byte units but in fixed block units, the block size is typically 256KB to 20MB, flash memory is a variant of electrically erasable read-only memory (EEPROM), which, unlike EEPROM, can be erased and rewritten on a byte level rather than an entire chip, and most of the chips of flash memory require block erasure. Flash memory is commonly used to store setup information, such as BIOS (basic program) of a computer, PDA (personal digital assistant), digital camera, etc., because it can still store data when it is powered off.
In conventional flash memory storage systems, a Physical to Logical Table (Physical to Logical Table) of each flash memory page is stored in the remaining space (Meta data) of the entire flash memory page. When garbage collection is needed or the mapping table needs to be rebuilt after normal power failure, each page is read out in sequence and compared with the entity mapping table, and whether the flash memory page is a valid flash memory page or not can be obtained. In addition, the entity mapping table can also be arranged as a flash memory page to be stored in the last flash memory page of each flash memory block. Therefore, an improved technique for solving the problem in the prior art is needed to compare the valid page with the physical mapping table.
Disclosure of Invention
The present invention provides a method for recording a mixed physical mapping table, i.e. a method for combining user data with a physical mapping table and recording the user data in the same flash memory page, which not only can effectively use the space of the flash memory page, but also can reduce the number of times of writing in the flash memory page to achieve high-speed writing efficiency, and effectively use the flash memory space to solve the problems in the background art.
In order to achieve the purpose, the invention provides the following technical scheme: a method of hybrid recording a physical map table, comprising the steps of:
the method comprises the following steps: based on the space relation of the static random access memory, the entity mapping table is stored according to the size of the static random access memory;
step two: recording the entity mapping unit of each flash memory page by taking each 4 bytes as a unit;
step three: recording the entity mapping unit of each flash memory page in sequence until the space of the static random access memory is fully written;
step four: when the requirement of the static random access memory is met, the user data and the entity mapping table are mixed into a flash memory page and are written into the flash memory block.
Preferably, in the first step, the sram comprises a transistor, and the state of the sram is maintained until a change signal is received.
Preferably, in the first step, the address of the physical mapping table flash memory page is obtained by calculating the size of the random access memory.
Preferably, in the second step, a plurality of entity image units are recorded in the flash memory page.
Preferably, in the fourth step, each flash block stores a plurality of different physical mapping tables based on the size of the sram.
Compared with the prior art, the invention has the beneficial effects that:
a method for combining user data with entity mapping table and recording them in same flash memory page not only can effectively use the space of flash memory page, but also can reduce the times of writing in flash memory page so as to attain the high-speed writing efficiency and effectively use flash memory space.
Drawings
FIG. 1 is a schematic structural diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present invention provides a technical solution: a method of hybrid recording a physical map table, comprising the steps of:
the method comprises the following steps: based on the space relation of the static random access memory, the entity mapping table is stored according to the size of the static random access memory;
step two: recording the entity mapping unit of each flash memory page by taking each 4 bytes as a unit;
step three: recording the entity mapping unit of each flash memory page in sequence until the space of the static random access memory is fully written;
step four: when the requirement of the static random access memory is met, the user data and the entity mapping table are mixed into a flash memory page and are written into the flash memory block.
In addition, the minimum writing unit of the flash memory can be also planned as the addressing static random access memory space, and the unit of 4K, 8K or 16K is taken as the maximum space of the entity mapping table.
The address of the physical mapping table flash memory page is obtained by calculating the size of the random access memory. The calculation method is that the size of the random access memory has n1In the case of (1), one entity image unit is recorded every 4 bytes, however, one flash page can record n2A physical mapping unit, finally, calculating the address of the physical mapping table of the hybrid flash memory page,the address of the flash page where the entity mapping table is located can be obtained.
The formula is as follows: entity mapping table address = n1 / 4 / n2 & ( i - j )
Wherein:
i is the space of flash memory page
j is the random access memory space
Each flash block stores a number of distinct physical mapping tables based on the size of the SRAM.
In one embodiment, a flash memory with a capacity of 1GB is prepared, each flash page is 512 bytes in size, wherein flash page 1 stores 64 bytes of user data, flash page 2 stores 128 bytes of user data, and flash page 3 stores 256 bytes of user data, and then the entity mapping table is filled in every 4 bytes unit, wherein 448 bytes (112) of the entity mapping table are filled in flash page 1, 384 bytes (112) of the entity mapping table are filled in flash page 2, and 256 bytes (64) of the entity mapping table are filled in flash page 3, and the three-page write time is shortened by 45 μ s compared with the conventional write time.
In the second embodiment, a flash memory with a capacity of 1GB is prepared, each flash page has a size of 256 bytes, wherein flash page 1 stores 32 bytes of user data, flash page 2 stores 64 bytes of user data, and flash page 3 stores 128 bytes of user data, and then the entity mapping table is filled in every 4 bytes unit, wherein 224 bytes (56) of the entity mapping table are filled in flash page 1, 192 bytes (48) of the entity mapping table are filled in flash page 2, and 128 bytes (32) of the entity mapping table are filled in flash page 3, and the three-page write time is shortened by 30 μ s compared with the conventional write time.
In a third embodiment, a flash memory with a capacity of 512MB is prepared, each flash page has a size of 128 bytes, wherein flash page 1 stores 16 bytes of user data, flash page 2 stores 32 bytes of user data, and flash page 3 stores 64 bytes of user data, and then the entity mapping table is filled in every 4 bytes unit, wherein 112 bytes (28) of the entity mapping table are dropped into flash page 1, 96 bytes (24) of the entity mapping table are dropped into flash page 2, and 64 bytes (16) of the entity mapping table are dropped into flash page 3, and the three-page write time is shortened by 24 μ s compared with the conventional write time.
In the fourth embodiment, a flash memory with a capacity of 256MB is prepared, each flash page has a size of 64 bytes, wherein flash page 1 stores 8 bytes of user data, flash page 2 stores 16 bytes of user data, and flash page 3 stores 32 bytes of user data, and then the entity mapping table is filled in every 4 bytes unit, wherein 56 bytes (14) of the entity mapping table are dropped into flash page 1, 48 bytes (12) of the entity mapping table are dropped into flash page 2, and 32 bytes (8) of the entity mapping table are dropped into flash page 3, and the three-page write time is shortened by 15 μ s compared with the conventional write time.
In the fifth embodiment, a flash memory with a capacity of 128MB is prepared, each flash page has a size of 64 bytes, wherein flash page 1 stores 8 bytes of user data, flash page 2 stores 16 bytes of user data, and flash page 3 stores 32 bytes of user data, and then the entity mapping table is filled in every 4 bytes unit, wherein 56 bytes (14) of the entity mapping table are dropped into flash page 1, 48 bytes (12) of the entity mapping table are dropped into flash page 2, and 32 bytes (8) of the entity mapping table are dropped into flash page 3, and the three-page write time is shortened by 12 μ s compared with the conventional write time.
According to the first to fifth embodiments, the method of the present invention improves the write performance compared to the conventional method.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. A method of hybrid recording a physical mapping table, comprising: the method comprises the following steps:
the method comprises the following steps: based on the space relation of the static random access memory, the entity mapping table is stored according to the size of the static random access memory;
step two: recording the entity mapping unit of each flash memory page by taking each 4 bytes as a unit;
step three: recording the entity mapping unit of each flash memory page in sequence until the space of the static random access memory is fully written;
step four: when the requirement of the static random access memory is met, the user data and the entity mapping table are mixed into a flash memory page and are written into the flash memory block.
2. The method of claim 1, wherein the method further comprises: in the first step, the sram is composed of transistors, and the state of the sram is maintained until a change signal is received.
3. The method of claim 1, wherein the method further comprises: in the first step, the address of the flash memory page of the physical mapping table is obtained by calculating the size of the random access memory.
4. The method of claim 1, wherein the method further comprises: in the second step, a plurality of entity mapping units are recorded in the flash memory page.
5. The method of claim 1, wherein the method further comprises: in the fourth step, each flash block stores a plurality of different physical mapping tables based on the size of the sram.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811253542.4A CN109446109B (en) | 2018-10-25 | 2018-10-25 | Method for hybrid recording entity mapping table |
| PCT/CN2018/115516 WO2020082455A1 (en) | 2018-10-25 | 2018-11-14 | Hybrid recording method for logical-to-physical mapping table |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811253542.4A CN109446109B (en) | 2018-10-25 | 2018-10-25 | Method for hybrid recording entity mapping table |
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| CN109446109B true CN109446109B (en) | 2021-06-29 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103970669A (en) * | 2013-02-06 | 2014-08-06 | Lsi公司 | Method for accelerating physical-to-logic address mapping of recycling operation in solid-state equipment |
| CN104750615A (en) * | 2013-12-26 | 2015-07-01 | 慧荣科技股份有限公司 | Data storage device and flash memory control method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI417884B (en) * | 2009-04-23 | 2013-12-01 | Phison Electronics Corp | Data accessing method for flash memory and storage system and controller using the same |
| US8364931B2 (en) * | 2009-06-29 | 2013-01-29 | Mediatek Inc. | Memory system and mapping methods using a random write page mapping table |
| TWI570559B (en) * | 2015-12-28 | 2017-02-11 | 點序科技股份有限公司 | Flash memory and accessing method thereof |
| CN107832013B (en) * | 2017-11-03 | 2019-10-25 | 中国科学技术大学 | A method of management solid-state hard disc mapping table |
| CN108681509B (en) * | 2018-04-20 | 2022-04-08 | 江苏华存电子科技有限公司 | Method for quickly establishing flash memory mapping table |
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- 2018-10-25 CN CN201811253542.4A patent/CN109446109B/en active Active
- 2018-11-14 WO PCT/CN2018/115516 patent/WO2020082455A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103970669A (en) * | 2013-02-06 | 2014-08-06 | Lsi公司 | Method for accelerating physical-to-logic address mapping of recycling operation in solid-state equipment |
| CN104750615A (en) * | 2013-12-26 | 2015-07-01 | 慧荣科技股份有限公司 | Data storage device and flash memory control method |
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| Publication number | Publication date |
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| CN109446109A (en) | 2019-03-08 |
| WO2020082455A1 (en) | 2020-04-30 |
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