CN109410870A - Sequential control circuit, method for reading data and display device - Google Patents
Sequential control circuit, method for reading data and display device Download PDFInfo
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- CN109410870A CN109410870A CN201811509553.4A CN201811509553A CN109410870A CN 109410870 A CN109410870 A CN 109410870A CN 201811509553 A CN201811509553 A CN 201811509553A CN 109410870 A CN109410870 A CN 109410870A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The present invention relates to a kind of sequential control circuit, method for reading data and display devices, judge whether the data of first memory module are written over, when the data of first memory module are not written over, read the first timing control data, the second timing control data are read when the data of first memory module are written over, and after reading the second timing control data, pass through the first timing control data described in the second timing control data cover.Based on this, the probability of timing control corrupt data in sequential control circuit is reduced by the first memory module and the second memory module, improves the operation stability of sequential control circuit.
Description
Technical field
The present invention relates to liquid crystal driving technical fields, more particularly to a kind of sequential control circuit, reading data side
Method and display device.
Background technique
As Thin Film Transistor-LCD occupies increasing share in field of display, display is to quality
It is required that higher and higher.Wherein, in Thin Film Transistor-LCD, TCON (timing controller timing control electricity
Road) plate be in display timing act core circuit.
Wherein, TCON plate mainly reads timing control data by corresponding processor and works.Therefore in TCON plate
It further include the memory for storing timing control data.However, in TCON plate memory store timing control data often because
Change is generated for the reasons such as electrostatic influence or artificial maloperation, the wrong data after change can not be restored to original correct number
According to, and the wrong data after change can cause the run-time error of rear end control circuit in TCON plate, cause irreversible consequence.
Summary of the invention
Based on this, it is necessary in TCON plate memory store timing control data often because electrostatic influence or
The reasons such as the artificial maloperation of person generate change, and the wrong data after change can not be restored to original correct data, and after change
Wrong data the problem of causing the run-time error of rear end control circuit in TCON plate, a kind of sequential control circuit, number are provided
According to read method and display device.
The embodiment of the present invention provides a kind of sequential control circuit, comprising:
First memory module, for storing the first timing control data and the first check code:
Second memory module, for storing the first timing control data and the first check code；
Timing sequence process module is separately connected the first memory module and the second memory module, for according to the first timing control
Data or the second timing control data carry out timing control to display panel.
It in one of the embodiments, further include power supply module；
The power supply module is separately connected the processing module, the first memory module and second memory module.
The processing module includes timing control integrated circuit in one of the embodiments,.
The first memory module and second memory module include memory in one of the embodiments,.
The memory includes band Electrically Erasable Programmable Read-Only Memory in one of the embodiments,.
The embodiment of the present invention also provides a kind of method for reading data, applied to above-mentioned sequential control circuit, comprising steps of
Judge whether the data of first memory module are written over；
If the data of first memory module are not written over, the first timing control data are read, are otherwise read
The second timing control data；
After reading the second timing control data, when by first described in the second timing control data cover
Sequence controls data.
The process whether data for judging first memory module are written in one of the embodiments, packet
Include step:
Read the first check code of first memory module；
If whether first check code is consistent with the first default check code, the data of first memory module are determined
It is not written over, otherwise determines that the data of first memory module are written over.
The process for reading the second timing control data in one of the embodiments, comprising steps of
Judge whether the data of second memory module are written over；
When the data of second memory module are not written over, the second timing control data are read.
The process whether data for judging second memory module are written in one of the embodiments, packet
Include step:
Read the second check code of second memory module；
If whether second check code is consistent with the second default check code, the data of second memory module are determined
It is not written over.
It includes display module and sequential control circuit that the embodiment of the present invention, which also provides a kind of display device,；
The sequential control circuit includes:
First memory module, for storing the first timing control data and the first check code:
Second memory module, for storing the first timing control data and the first check code；
Timing sequence process module is separately connected first memory module and second memory module, for according to
First timing control data or the second timing control data carry out timing control to the display panel in the display module.
Above-mentioned sequential control circuit, method for reading data and display device judge that the data of first memory module are
It is no to be written over, when the data of first memory module are not written over, the first timing control data are read, described the
The data of one memory module read the second timing control data when being written over, and are reading the second timing control number
According to rear, pass through the first timing control data described in the second timing control data cover.Based on this, pass through the first memory module
The probability that timing control corrupt data in sequential control circuit is reduced with the second memory module, improves the operation of sequential control circuit
Stability.
Detailed description of the invention
Fig. 1 is sequential control circuit function structure chart；
Fig. 2 is the sequential control circuit function structure chart of an embodiment；
Fig. 3 is method for reading data flow chart；
Fig. 4 is the method for reading data flow chart of another embodiment；
Fig. 5 is reading data apparatus module structure chart.
Specific embodiment
Purpose, technical solution and technical effect for a better understanding of the present invention, below in conjunction with drawings and examples
Further explaining illustration is carried out to the present invention.State simultaneously, embodiments described below for explaining only the invention, not
For limiting the present invention
The embodiment of the present invention provides a kind of sequential control circuit:
Fig. 1 is sequential control circuit function structure chart, as shown in Figure 1, sequential control circuit includes timing sequence process module
100, the first memory module 101 and the second memory module 102；
The timing sequence process module 100 is separately connected first memory module 101 and second memory module 102；
First memory module 101 is for storing the first timing control data and the first check code；
Wherein, the first memory module 101 includes read-write storage equipment, i.e., the first memory module 101, which has, to be read
The characteristic write.It include memory as preferably embodiment, first memory module 101.As a preferably embodiment party
Formula, memory include band Electrically Erasable Programmable Read-Only Memory.Based on this, convenient for when the first memory module 101 write-in first
Sequence controls data and while the first check code, is also convenient for reading the first timing control data and the from the first memory module 101
One check code.
Second memory module 102 is for storing the second timing control data and the second check code；
Wherein, the second memory module 102 includes read-write storage equipment, i.e., the second memory module 102, which has, to be read
The characteristic write.It also include memory as preferably embodiment, second memory module 102.Preferably implement as one
Mode, memory include the second band Electrically Erasable Programmable Read-Only Memory.Based on this, convenient for being written to the second memory module 102
While second timing control data and the second check code, it is also convenient for reading the second timing control number from the second memory module 102
According to the second check code.
The timing sequence process module 100 is used for according to the first timing control data or the second timing control data
Timing control is carried out to display panel.
Wherein, timing sequence process module 100 can be read according to the connection with the first memory module 101 and the second memory module 102
Take the first timing control data or the second timing control data, and according to the first timing control data for reading or described
Second timing control data carry out timing control to display panel.Timing sequence process module 100 includes in one of the embodiments,
Timing control integrated circuit, i.e. TCON IC.Timing sequence process module 100 is according to the first timing control data or described second
Timing control data-driven lights display panel, and carries out timing control to it.As a preferably embodiment, at timing
It manages module 100 and selects CRX1200 chip or DP633 chip.
The display panel of the embodiment of the present invention can be following any: liquid crystal display panel, OLED display panel, QLED
Display panel, twisted-nematic (Twisted Nematic, TN) or super twisted nematic (Super Twisted Nematic, STN)
Type, plane conversion (In-Plane Switching, IPS) type, vertical orientation (Vertical Alignment, VA) type, curved surface
Type panel or other display panels.Wherein, timing sequence process module 101 reads the first timing control data or second selecting one
After timing control data, pass through the first timing control data or the second timing control data-driven display panel.Wherein, at timing
Manage the executable following steps a-c when reading the first memory module 100 or the second memory module 101 of module 100:
A judges whether the data of first memory module are written over；
If the data of b first memory module are not written over, the first timing control data are read, are otherwise read
The second timing control data；
C is after reading the second timing control data, by first described in the second timing control data cover
Timing control data.
In one of the embodiments, timing sequence process module 100 by data/address bus respectively with the first memory module 101 and
The connection of second memory module 102.Pass through I as preferably embodiment, a timing sequence process module 1002C bus or 485
The bus connection with the first memory module 101 and the second memory module 102 respectively.
Fig. 2 is the sequential control circuit function structure chart of an embodiment, as shown in Fig. 2, sequential control circuit further includes
Power supply module 200；
The power supply module 200 is separately connected the processing module 100, the first memory module 101 and second storage
Module 102.
Power supply module 200 by respectively with processing module 100, the first memory module 101 and second memory module 102
Connection, provide while powering on for the processing module 100, the first memory module 101 and second memory module 102,
Sequential control circuit is set integrally to work after powering on.
Power supply module 200 includes DC power supply, respectively processing module 100, first in one of the embodiments,
Memory module 101 and second memory module 102 provide direct current supply.As a preferably embodiment, power supply module 200
Including DC-DC power supply module, DC-DC power supply module side is for accessing operating voltage, and the other side is for being respectively processing module
100, the first memory module 101 and second memory module 102 provide direct current supply.
In one of the embodiments,
The embodiment of the present invention also provides a kind of method for reading data:
Fig. 3 is method for reading data flow chart, as shown in figure 3, method for reading data is applied to any of the above-described embodiment
Sequential control circuit, including step S100 to S102:
S100, judges whether the data of first memory module are written over；
Wherein, in one embodiment, the mistake whether data of first memory module are written over is judged in step S100
Journey includes step S200 and S201:
S200 reads the first check code of first memory module；
S201 determines first memory module if whether first check code is consistent with the first default check code
Data be not written over, otherwise determine that the data of first memory module are written over.
Wherein, the first default check code is source check code when the first check code is written to the first memory module.
S101 reads the first timing control data, otherwise if the data of first memory module are not written over
Read the second timing control data；
Fig. 4 is the method for reading data flow chart of another embodiment in one of the embodiments, as shown in figure 4, step
The process of the second timing control data, including step S300 and S301 are read in rapid S101:
S300, judges whether the data of second memory module are written over；
S301 reads the second timing control data when the data of second memory module are not written over.
The mistake whether data of second memory module are written over is judged in step S300 in one of the embodiments,
Journey, including step S400 and S401:
S400 reads the second check code of second memory module；
S401 determines second memory module if whether second check code is consistent with the second default check code
Data be not written over.
Wherein, presetting check code is source check code when the second check code is written to the second memory module.
S102, after reading the second timing control data, by described in the second timing control data cover
First timing control data.
The embodiment of the present invention also provides a kind of reading data device:
Fig. 5 is reading data apparatus module structure chart, as shown in figure 5, reading data device includes module 300 to 302:
First judgment module 300, for judging whether the data of first memory module are written over；
First read module 301, for when the data of first memory module are not written over, when reading described first
Sequence controls data, and the second timing control data are read when the data of first memory module are written over；
Data cover module 302, for passing through the second timing control after reading the second timing control data
First timing control data described in data cover processed.
Above-mentioned sequential control circuit and method for reading data and device, judge first memory module data whether by
It rewrites, when the data of first memory module are not written over, read the first timing control data, deposited described first
The data of storage module read the second timing control data when being written over, and are reading the second timing control data
Afterwards, pass through the first timing control data described in the second timing control data cover.Based on this, by the first memory module and
Second memory module reduces the probability of timing control corrupt data in sequential control circuit, and the operation for improving sequential control circuit is steady
It is qualitative.
Based on example as above, a kind of computer equipment is also provided in one embodiment, which includes depositing
Reservoir, processor and storage are on a memory and the computer program that can run on a processor, wherein processor execution program
Shi Shixian such as following steps:
Judge whether the data of first memory module are written over；
If the data of first memory module are not written over, the first timing control data are read, are otherwise read
The second timing control data；
After reading the second timing control data, when by first described in the second timing control data cover
Sequence controls data.
Above-mentioned computer equipment is deposited by judging whether the data of first memory module are written over described first
When the data of storage module are not written over, the first timing control data are read, are changed in the data of first memory module
Read-while-writing takes the second timing control data, and after reading the second timing control data, when by described second
Sequence controls the first timing control data described in data cover.Based on this, reduced by the first memory module and the second memory module
The probability of timing control corrupt data in sequential control circuit, improves the operation stability of sequential control circuit.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Instruct relevant hardware to complete by computer program, program can be stored in one and non-volatile computer-readable deposit
In storage media, in the embodiment of the present invention, which be can be stored in the storage medium of computer system, and by the department of computer science
At least one processor in system executes, and includes the process such as the embodiment of above-mentioned each sleep householder method with realization.Wherein,
Storage medium can be magnetic disk, CD, read-only memory (Read-Only Memory, ROM) or random access memory
(Random Access Memory, RAM) etc..
Accordingly, a kind of storage medium is also provided in one embodiment, is stored thereon with computer program, wherein the journey
Such as following steps are realized when sequence is executed by processor:
Judge whether the data of first memory module are written over；
If the data of first memory module are not written over, the first timing control data are read, are otherwise read
The second timing control data；
After reading the second timing control data, when by first described in the second timing control data cover
Sequence controls data.
Above-mentioned storage medium, by judging whether the data of first memory module are written over, in first storage
When the data of module are not written over, the first timing control data are read, are written in the data of first memory module
When read the second timing control data, and after reading the second timing control data, pass through second timing
Control the first timing control data described in data cover.Based on this, when being reduced by the first memory module and the second memory module
The probability of timing control corrupt data in sequence control circuit, improves the operation stability of sequential control circuit.
The embodiment of the present invention also provides a kind of display device:
A kind of display device, including display module and sequential control circuit；
Sequential control circuit includes:
First memory module 100, for storing the first timing control data and the first check code:
Second memory module 101, for storing the first timing control data and the first check code；
Timing sequence process module is separately connected first memory module 100 and second memory module 101, is used for root
When being carried out according to the first timing control data or the second timing control data to the display panel in the display module
Sequence control.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of sequential control circuit characterized by comprising
First memory module, for storing the first timing control data and the first check code:
Second memory module, for storing the first timing control data and the first check code；
Timing sequence process module is separately connected first memory module and second memory module, for according to described first
Timing control data or the second timing control data carry out timing control to display panel.
2. sequential control circuit according to claim 1, which is characterized in that further include power supply module；
The power supply module is separately connected the processing module, the first memory module and second memory module.
3. sequential control circuit according to claim 1, which is characterized in that the processing module includes that timing control is integrated
Circuit.
4. sequential control circuit according to claim 1, which is characterized in that first memory module is deposited with described second
Storing up module includes memory.
5. sequential control circuit according to claim 4, which is characterized in that the memory includes band electric erazable programmable
Read-only memory.
6. a kind of method for reading data, applied to the sequential control circuit as described in claim 1 to 5 any one, feature
It is, comprising steps of
Judge whether the data of first memory module are written over；
If the data of first memory module are not written over, the first timing control data are read, otherwise described in reading
Second timing control data；
After reading the second timing control data, pass through the first timing control described in the second timing control data cover
Data processed.
7. method for reading data according to claim 6, which is characterized in that the number of judgement first memory module
According to the process whether being written over, comprising steps of
Read the first check code of first memory module；
If whether first check code consistent with the first default check code, determine the data of first memory module not by
It rewrites, otherwise determines that the data of first memory module are written over.
8. method for reading data according to claim 6, which is characterized in that described to read the second timing control data
Process, comprising steps of
Judge whether the data of second memory module are written over；
When the data of second memory module are not written over, the second timing control data are read.
9. method for reading data according to claim 8, which is characterized in that the number of judgement second memory module
According to the process whether being written over, comprising steps of
Read the second check code of second memory module；
If whether second check code consistent with the second default check code, determine the data of second memory module not by
It rewrites.
10. a kind of display device, which is characterized in that including display module and sequential control circuit；
The sequential control circuit includes:
First memory module, for storing the first timing control data and the first check code:
Second memory module, for storing the first timing control data and the first check code；
Timing sequence process module is separately connected first memory module and second memory module, for according to described first
Timing control data or the second timing control data carry out timing control to the display panel in the display module.
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Application publication date: 20190301 |