CN109410869A - A kind of read method of data, reading device and display device - Google Patents
A kind of read method of data, reading device and display device Download PDFInfo
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- CN109410869A CN109410869A CN201811509242.8A CN201811509242A CN109410869A CN 109410869 A CN109410869 A CN 109410869A CN 201811509242 A CN201811509242 A CN 201811509242A CN 109410869 A CN109410869 A CN 109410869A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
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- Computer Hardware Design (AREA)
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- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application provides a kind of read method of data, reading device and display device, by obtaining the first data to be verified for being stored in the first data storage area and the second data to be verified for being stored in the second data storage area, and valid data memory block is determined to first data to be verified and the second data to be verified, read the data in the virtual storage, to realize data backup, in the case where the data of a wherein data storage area are mistakenly rewritten, there can be the data of another data storage area alternately, improve the accuracy of data output, the reference voltage data stored in programmable gamma correction buffer circuit chip is avoided to change due to electrostatic influence or artificial maloperation etc., cause to show that picture is abnormal.
Description
Technical field
The embodiment of the present application belongs to information technology field more particularly to a kind of read method of data, reading device and shows
Showing device.
Background technique
With the continuous development of display technology, requirement of the display to display frame stabilization is higher and higher.Liquid crystal display panel
Including embarking on journey and pixel unit in column, in liquid crystal display panel work, it is brilliant that gate drive signal controls the film in pixel unit
The opening and closing of body pipe (Thin Film Transistor, TFT), to complete the row scanning of liquid crystal display panel, display panel
In pixel unit pixel voltage signal shows corresponding color based on the received, realize that liquid crystal display panel shows the function of image.
Programmable gamma correction buffer circuit (P-Gamma) chip carries out pixel voltage due to can be with Auto-Sensing pixel voltage
It adjusts, promotes the precision in pixel voltage traveling process, and then adjust the color and resolution for being most suitable for user, showing
Increasingly important role is played in device field.
However, due to electrostatic influence or artificial maloperation etc., programmable gal can be changed when using equipment is shown
The reference voltage data stored in horse correction buffer circuit chip causes to show that picture is abnormal.
Summary of the invention
The embodiment of the present application provides the read method, reading device and display device of a kind of data, it is intended to solve due to quiet
The reasons such as film sound or artificial maloperation, can change the reference voltage number stored in programmable gamma correction buffer circuit chip
According to the problem for causing to show picture exception.
One embodiment of the application provides a kind of read method of data, and the read method includes:
It obtains the first data to be verified for being stored in the first data storage area and is stored in the second of the second data storage area
Data to be verified；
Valid data memory block is determined according to the described first data to be verified and second data to be verified；
Read the data in valid data memory block.
Optionally, the acquisition is stored in the first data to be verified of the first data storage area and is stored in the second data and deposits
Before the data to be verified of the second of storage area, further includes:
Identical data are stored in first data storage area and second data storage area.
It is optionally, described to store identical data in first data storage area and second data storage area,
Include:
Memory is divided into first data storage area and second data storage area；
Identical reference voltage data is written in first data storage area and second data storage area.
Optionally, described to determine that valid data store according to the described first data to be verified and second data to be verified
Area, comprising:
Successively first data storage area is verified according to the described first data to be verified, according to described second to
Verification data verify second data storage area；
If first data storage area verifies successfully, second data storage area is verified successfully, then by described first
Data storage area is set as the valid data memory block；
If first data storage area verifies successfully, the second data storage area verification failure, then by described first
Data storage area is set as effective data storage area；
If the first data storage area verification failure, second data storage area is verified successfully, then by described second
Data storage area is set as effective data storage area.
It is optionally, described to set first data storage area to after the valid data memory block, further includes:
Data in first data storage area are written in second data storage area.
It is optionally, described to set second data storage area to after effective data storage area, further includes:
Data in second data storage area are written in first data storage area.
Another embodiment of the application also provides a kind of reading device of data, and the reading device includes:
Data acquisition module, for obtain be stored in the first data storage area the first data to be verified and be stored in second
The data to be verified of the second of data storage area；
Data check module, for determining significant figure according to the described first data to be verified and second data to be verified
According to memory block；
Data read module, for reading the data in valid data memory block.
Optionally, the reading device further include:
Data memory module, it is identical for being stored in first data storage area and second data storage area
Data.
Optionally, the data memory module includes:
Memory partition unit, for memory to be divided into first data storage area and second data storage
Area；
Data write unit, it is identical for being written in first data storage area and second data storage area
Reference voltage data.
Another embodiment of the application also provides a kind of display device, comprising:
Display panel；And
Control system, wherein the control system and the display panel are electrically connected, and the control system includes as above
State described in any item reading devices.
The embodiment of the present application is stored in the first data to be verified of the first data storage area by acquisition and is stored in second
The data to be verified of the second of data storage area, and valid data, which are deposited, to be determined to first data to be verified and the second data to be verified
Storage area reads the data in the virtual storage, to realize data backup, the data in a wherein data storage area are missed
In the case where rewriting, the data that can have another data storage area alternately, improve the accuracy of data output, keep away
The reference voltage data stored in programmable gamma correction buffer circuit chip is exempted from due to electrostatic influence or artificial maloperation
Etc. reasons change, cause to show that picture is abnormal.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is some embodiments of the present application, for ability
For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is a kind of implementation flow chart of the read method for data that one embodiment of the application provides；
Fig. 2 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides；
Fig. 3 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides；
Fig. 4 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides；
Fig. 5 is a kind of structural schematic diagram of the reading device for data that one embodiment of the application provides；
Fig. 6 is a kind of structural schematic diagram of the reading device for data that another embodiment of the application provides；
Fig. 7 is a kind of structural schematic diagram of the reading device for data that another embodiment of the application provides；
Fig. 8 is a kind of structural schematic diagram for display device that one embodiment of the application provides.
Specific embodiment
In order to make those skilled in the art more fully understand application scheme, below in conjunction in the embodiment of the present application
Attached drawing, technical solutions in the embodiments of the present application are explicitly described, it is clear that described embodiment is the application one
The embodiment divided, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not doing
Every other embodiment obtained under the premise of creative work out, shall fall within the protection scope of the present application.
The description and claims of this application and term " includes " and their any deformations in above-mentioned attached drawing, meaning
Figure, which is to cover, non-exclusive includes.Such as process, method or system comprising a series of steps or units, product or equipment do not have
It is defined in listed step or unit, but optionally further comprising the step of not listing or unit, or optionally also wrap
Include the other step or units intrinsic for these process, methods, product or equipment.In addition, term " first ", " second " and
" third " etc. is for distinguishing different objects, not for description particular order.
Programmable gamma correction buffer circuit (P-Gamma IC) chip provides exchange directly for the source drive of display panel
Circulate the reference voltage changed and public electrode voltages, if the value hair of the register of programmable gamma correction buffer circuit chip interior
It is raw to change, it will lead to and provide reference voltage and the public electrode voltages generation of AC DC conversion for the source drive of display panel
Change, causes picture abnormal.
The value of the register of the inside of programmable gamma correction buffer circuit is written and read by bus, internal for depositing
The memory for storing up data is nonvolatile memory (Nonvolatile memory, NVM), can not lose number during power down
According to, if the value of register changes, the reference voltage for causing to provide AC DC conversion and public electrode voltages change,
It will lead to irreversible result.
Fig. 1 is a kind of implementation flow chart of the read method for data that one embodiment of the application provides.
As shown in Figure 1, the read method of data in the present embodiment includes:
Step S10: obtaining the first data to be verified for being stored in the first data storage area and is stored in the storage of the second data
The data to be verified of the second of area.
In one embodiment, the first data to be verified are stored in the first data storage area, and the second data to be verified are deposited
It is stored in the second data storage area, wherein the first data storage area and the second data storage area are to need to exist in advance according to user
The memory block divided in memory.
In one embodiment, the first data to be verified can be all data stored in the first data storage area,
Second data to be verified can be all data stored in the second data storage area.
Step S20: valid data memory block is determined according to the described first data to be verified and second data to be verified.
In one embodiment, by carrying out cyclic redundancy check code to the first data to be verified and the second data to be verified
(Cyclic Redundancy Check, CRC) verification, to determine valid data memory block, valid data storage is used as number
According to the data storage area of output.Specifically, cyclic redundancy check code verification is one of data communication field debugging check code,
The length of its information field and check field can be arbitrarily selected, carries out polynomial computation to data, and obtained result is attached
Behind frame, receiving device also executes similar algorithm, to guarantee the correctness and integrality of data transmission.
It in one embodiment, can be by carrying out comprehensive test code to the first data to be verified and the second data to be verified
(Checksum) it tests, so that valid data memory block is determined in the first data storage area and the second data storage area,
Specifically, comprehensive test code is to be added all data item of the first data to be verified in the first data storage area, or incite somebody to action
All data item in the second data to be verified in second data storage area are added, these data item can be number or count
Calculate the other character strings for regarding number during examining summation as.
Step S30: the data in valid data memory block are read.
After determining valid data memory block in step S20, the data in the virtual storage in memory are read, are passed through
Data in memory are verified, and select correct data storage area to carry out reading data according to check results, are avoided
Data in memory read wrong data in the case where mistakenly rewritten, cause irreversible result.
In one embodiment, it is display panel that the data in memory, which are programmable gamma correction buffer circuit chip,
Source drive provides the reference voltage of AC DC conversion and the data of public electrode voltages.
Fig. 2 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides.
As shown in Fig. 2, the read method of the data in the present embodiment further include:
Step S11: identical data are stored in first data storage area and second data storage area.
In one embodiment, the first data to be verified for being stored in the first data storage area are being obtained and are being stored in second
Before the data to be verified of the second of data storage area, identical number is stored in the first data storage area and the second data storage area
According to, data needed for user are backed up, in data acquisition, successively obtain the first data storage area and the second data storage
Data in area, and data check is carried out respectively to the data in the first data storage area and the second data storage area, according to school
It tests result and determines the valid data memory block exported for data from the first data storage area and the second data storage area.
Fig. 3 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides.
As shown in figure 3, step S11: being stored in first data storage area and second data storage area identical
Data, comprising:
Step S111: memory is divided into first data storage area and second data storage area.
Step S112: identical reference voltage is written in first data storage area and second data storage area
Data.
In one embodiment, memory for storing data is non-in programmable gamma correction buffer circuit chip
Volatile memory, the data of storage are reference voltage data and public electrode voltages number needed for the driving unit of display panel
According to.
In one embodiment, memory is divided into the first data storage area and the second data storage area, first number
It according to memory block and the second data storage area can be the different blocks of same storage chip, and divided in the same storage chip
Identical data are stored in first data storage area and the second data storage area.
In one embodiment, the first data storage area and the second data storage area can be respectively two different storages
Chip stores identical data in two different storage chips.
Fig. 4 is a kind of implementation flow chart of the read method for data that another embodiment of the application provides.
As shown in figure 4, step S20: being determined according to the described first data to be verified and second data to be verified effective
Data storage area, comprising:
Step S21: successively first data storage area is verified according to the described first data to be verified, according to institute
The second data to be verified are stated to verify second data storage area；
Step S221: if first data storage area verifies successfully, second data storage area is verified successfully, then will
First data storage area is set as the valid data memory block；
Step S222: if first data storage area verifies successfully, the second data storage area verification failure then will
First data storage area is set as effective data storage area；
Step S223: if first data storage area verification failure, second data storage area verify successfully, then will
Second data storage area is set as effective data storage area.
In one embodiment, successively to the first data to be verified and the second data storage area in the first data storage area
In the second data to be verified verified, and valid data memory block is determined according to check results, specifically, if first to school
It tests data and the second data to be verified verifies success, then determine that the first data storage area verifies successfully, the second data storage area
It verifies successfully, and sets effective data storage area for the first data storage area.
In one embodiment, if the first data storage area and the second data storage area verify success, to the first number
Comparison of coherence is carried out according to all data in all data and the second data storage area in memory block, that is, judges the first data
Whether all data in memory block and all data in the second data storage area are consistent, if unanimously, the first data are deposited
Storage area is set as effective data storage area, if inconsistent, sets effective data storage area for the first data storage area, and will
All data in first data storage area are written in the second data storage area, meanwhile, it deletes and is deposited in the second data storage area
All data of storage.
In one embodiment, successively to the first data to be verified and the second data storage area in the first data storage area
In the second data to be verified verified, if the data check to be verified success of first in the first data storage area, the second number
According to the second data check failure to be verified in memory block, then determine that the first data storage area verifies successfully, the storage of the second data
Area's verification failure will be set as effective data storage area in the first data storage area, and will be all in the first data storage area
Data are written in the second data storage area, meanwhile, delete all data stored in the second data storage area.
In one embodiment, successively to the first data to be verified and the second data storage area in the first data storage area
In the second data to be verified verified, if the data check to be verified failure of first in the first data storage area, the second number
According to the second data check success to be verified in memory block, then the verification failure of the first data storage area, the storage of the second data are determined
Area verifies successfully, effective data storage area will be set as in the second data storage area, and will be all in the second data storage area
Data are written in the first data storage area, meanwhile, delete all data stored in the first data storage area.
In one embodiment, successively to the first data to be verified and the second data storage area in the first data storage area
In the second data to be verified verified, if the data check to be verified failure of first in the first data storage area, the second number
According to the second data check failure to be verified in memory block, then the first data storage area and the second data storage area are counted
According to write-in, that is, new correct data is written.
In one embodiment, it is described set the valid data memory block for first data storage area after,
Further include:
Data in first data storage area are written in second data storage area.
In one embodiment, it is described set effective data storage area for second data storage area after, also wrap
It includes:
Data in second data storage area are written in first data storage area.
Fig. 5 is a kind of structural schematic diagram of the reading device for data that one embodiment of the application provides.
As shown in figure 5, the reading device includes:
Data acquisition module 10 is stored in the first data to be verified of the first data storage area and is stored in for obtaining
The data to be verified of the second of two data storage areas.
In one embodiment, the first data to be verified are stored in the first data storage area, and the second data to be verified are deposited
It is stored in the second data storage area, wherein the first data storage area and the second data storage area are to need to exist in advance according to user
The memory block divided in memory, data acquisition module 10 successively obtain the first data to be verified from the first data storage area,
The second data to be verified are obtained from the second data storage area.
In one embodiment, the first data to be verified can be all data stored in the first data storage area,
Second data to be verified can be all data stored in the second data storage area.
Data check module 20 is effective for being determined according to the described first data to be verified and second data to be verified
Data storage area.
In one embodiment, data check module 20 has cyclic redundancy check code (Cyclic Redundancy
Check, CRC) verifying function, data check module 20 is by recycling the first data to be verified and the second data to be verified
Redundancy check code check, to determine valid data memory block, valid data storage is the data storage area exported as data.
Specifically, cyclic redundancy check code verification is one of data communication field debugging check code, information field and check word
The length of section can be arbitrarily selected, carries out polynomial computation to data, and obtained result is attached to behind frame, receiving device
Also similar algorithm is executed, to guarantee the correctness and integrality of data transmission.
In one embodiment, data check module 20 can be by the first data to be verified and the second data to be verified
It carries out comprehensive test code (Checksum) to test, so that determination has in the first data storage area and the second data storage area
Data storage area is imitated, specifically, comprehensive test code is by all data of the first data to be verified in the first data storage area
Item is added, or all data item in the second data to be verified in the second data storage area are added, these data item can
To be number or regard digital other character strings as during calculating inspection summation.
Data read module 30, for reading the data in valid data memory block.
Data read module 30 is read effective in memory after data check module 20 determines valid data memory block
Data in memory block select correct data to store by verifying to the data in memory, and according to check results
Area carries out reading data, and the data avoided in memory read wrong data in the case where mistakenly rewritten, cause irreversible
The result turned.
In one embodiment, it is display panel that the data in memory, which are programmable gamma correction buffer circuit chip,
Source drive provides the reference voltage of AC DC conversion and the data of public electrode voltages.
Fig. 6 is a kind of structural schematic diagram of the reading device for data that another embodiment of the application provides.
As shown in fig. 6, the reading device further include:
Data memory module 11 is identical for storing in first data storage area and second data storage area
Data.
In one embodiment, data acquisition module 10 is obtaining the first number to be verified for being stored in the first data storage area
According to be stored in the second data storage area the second data to be verified before, data memory module 11 in the first data storage area and
Identical data are stored in second data storage area, and data needed for user are backed up, in data acquisition, data acquisition
Module 10 successively obtains the data in the first data storage area and the second data storage area, and data check module 20 is respectively to first
Data in data storage area and the second data storage area carry out data check, according to check results from the first data storage area and
The valid data memory block for data output is determined in second data storage area.
Fig. 7 is a kind of structural schematic diagram of the reading device for data that another embodiment of the application provides.
As shown in fig. 7, the data memory module 11 includes:
Memory partition unit 111, for memory to be divided into first data storage area and second data
Memory block；
Data write unit 112, for phase to be written in first data storage area and second data storage area
Same reference voltage data.
In one embodiment, memory for storing data is non-in programmable gamma correction buffer circuit chip
Volatile memory, the data of storage are reference voltage data and public electrode voltages number needed for the driving unit of display panel
According to.
In one embodiment, memory is divided into the first data storage area and the second number by memory partition unit 111
According to memory block, first data storage area and the second data storage area can be write for the different blocks of same storage chip, data
Enter unit 112 and stores identical number in the first data storage area and the second data storage area that the same storage chip divides
According to.
In one embodiment, the first data storage area and the second data storage area can be respectively two different storages
Chip stores identical data in two different storage chips.
In one embodiment, data check module 20 successively in the first data storage area the first data to be verified and
The second data to be verified in second data storage area are verified, and determine valid data memory block according to check results, tool
Body, if the first data to be verified and the second data to be verified verify success, determine that the first data storage area verifies successfully,
Second data storage area verifies successfully, and sets effective data storage area for the first data storage area.
In one embodiment, data check module 20 successively in the first data storage area the first data to be verified and
The second data to be verified in second data storage area are verified, if the first data storage area and the second data storage area school
Success is tested, then consistency ratio is carried out to all data in all data and the second data storage area in the first data storage area
Compared with, that is, judge whether all data in the first data storage area and all data in the second data storage area are consistent, if one
It causes, then sets effective data storage area for the first data storage area, if inconsistent, the first data storage area is provided with
Data storage area is imitated, and all data in the first data storage area are written in the second data storage area, meanwhile, delete the
All data stored in two data storage areas.
In one embodiment, data check module 20 successively in the first data storage area the first data to be verified and
The second data to be verified in second data storage area are verified, if the data school to be verified of first in the first data storage area
Success is tested, the data check failure to be verified of second in the second data storage area then determines that the first data storage area verifies successfully,
The verification failure of second data storage area, will be set as effective data storage area, and the first data are deposited in the first data storage area
All data in storage area are written in the second data storage area, meanwhile, delete all numbers stored in the second data storage area
According to.
In one embodiment, data check module 20 successively in the first data storage area the first data to be verified and
The second data to be verified in second data storage area are verified, if the data school to be verified of first in the first data storage area
Failure is tested, the data check success to be verified of second in the second data storage area then determines the verification failure of the first data storage area,
Second data storage area verifies successfully, effective data storage area will be set as in the second data storage area, and the second data are deposited
All data in storage area are written in the first data storage area, meanwhile, delete all numbers stored in the first data storage area
According to.
In one embodiment, data check module 20 successively in the first data storage area the first data to be verified and
The second data to be verified in second data storage area are verified, if the data school to be verified of first in the first data storage area
Failure is tested, the data check failure to be verified of second in the second data storage area, then to the first data storage area and the second data
Memory block carries out data write-in, that is, new correct data is written.
Fig. 8 is a kind of structural schematic diagram for display device that one embodiment of the application provides.
As shown in figure 8, the display device 60 includes:
Display panel 62；And
Control system 61, wherein the control system 61 is electrically connected with the display panel 62, the control system packet
Include reading device 610 as described in any one of the above embodiments.
In one embodiment, display device 60 can be to be provided with any type of display of above-mentioned driving circuit 610
Device, such as liquid crystal display device (Liquid Crystal Display, LCD), Organic Electricity laser display (Organic
Electroluminesence Display, OLED) display device, light emitting diode with quantum dots (Quantum Dot Light
Emitting Diodes, QLED) display device or curved-surface display device etc..
In one embodiment, display panel 62 includes the pixel array being made of multirow pixel and multiple row pixel.
In one embodiment, control system 61 can pass through universal integrated circuit, such as central processing unit (Central
Processing Unit, CPU), or pass through specific integrated circuit (Application Specific Integrated
Circuit, ASIC) Lai Shixian.
The embodiment of the present application is stored in the first data to be verified of the first data storage area by acquisition and is stored in second
The data to be verified of the second of data storage area, and valid data, which are deposited, to be determined to first data to be verified and the second data to be verified
Storage area reads the data in the virtual storage, to realize data backup, the data in a wherein data storage area are missed
In the case where rewriting, the data that can have another data storage area alternately, improve the accuracy of data output, keep away
The reference voltage data stored in programmable gamma correction buffer circuit chip is exempted from due to electrostatic influence or artificial maloperation
Etc. reasons change, cause to show that picture is abnormal.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Relevant hardware is instructed to complete by computer program, the program can be stored in a computer-readable storage medium
In, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, the storage medium can be magnetic
Dish, CD, read-only memory (Read-Only Memory, ROM) or random access memory (Random Access
Memory, RAM) etc..
The foregoing is merely the preferred embodiments of the application, not to limit the application, all essences in the application
Made any modifications, equivalent replacements, and improvements etc., should be included within the scope of protection of this application within mind and principle.
Claims (10)
1. a kind of read method of data, which is characterized in that the read method includes:
It obtains the first data to be verified for being stored in the first data storage area and is stored in the second of the second data storage area to school
Test data；
Valid data memory block is determined according to the described first data to be verified and second data to be verified；
Read the data in valid data memory block.
2. the read method of data as described in claim 1, which is characterized in that the acquisition is stored in the first data storage area
The first data to be verified and be stored in front of the second data to be verified of the second data storage area, further includes:
Identical data are stored in first data storage area and second data storage area.
3. the read method of data as claimed in claim 2, which is characterized in that described in first data storage area and institute
It states and stores identical data in the second data storage area, comprising:
Memory is divided into first data storage area and second data storage area；
Identical reference voltage data is written in first data storage area and second data storage area.
4. the read method of data as described in claim 1, which is characterized in that it is described according to the described first data to be verified and
Second data to be verified determine valid data memory block, comprising:
Successively first data storage area is verified according to the described first data to be verified, it is to be verified according to described second
Data verify second data storage area；
If first data storage area verifies successfully, second data storage area is verified successfully, then by first data
Memory block is set as the valid data memory block；
If first data storage area verifies successfully, the second data storage area verification failure, then by first data
Memory block is set as effective data storage area；
If the first data storage area verification failure, second data storage area is verified successfully, then by second data
Memory block is set as effective data storage area.
5. the read method of data as claimed in claim 4, which is characterized in that described that first data storage area is arranged
After the valid data memory block, further includes:
Data in first data storage area are written in second data storage area.
6. the read method of data as claimed in claim 4, which is characterized in that described that second data storage area is arranged
After valid data memory block, further includes:
Data in second data storage area are written in first data storage area.
7. a kind of reading device of data, which is characterized in that the reading device includes:
Data acquisition module, for obtain be stored in the first data storage area the first data to be verified and be stored in the second data
The data to be verified of the second of memory block；
Data check module, for determining that valid data are deposited according to the described first data to be verified and second data to be verified
Storage area；
Data read module, for reading the data in valid data memory block.
8. the reading device of data as claimed in claim 7, which is characterized in that the reading device further include:
Data memory module, for storing identical number in first data storage area and second data storage area
According to.
9. the reading device of data as claimed in claim 8, which is characterized in that the data memory module includes:
Memory partition unit, for memory to be divided into first data storage area and second data storage area；
Data write unit, for identical benchmark to be written in first data storage area and second data storage area
Voltage data.
10. a kind of display device characterized by comprising
Display panel；And
Control system, wherein the control system and the display panel are electrically connected, and the control system includes that right such as is wanted
Seek 7~9 described in any item reading devices.
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| CN201811509242.8A CN109410869A (en) | 2018-12-11 | 2018-12-11 | A kind of read method of data, reading device and display device |
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| CN201811509242.8A CN109410869A (en) | 2018-12-11 | 2018-12-11 | A kind of read method of data, reading device and display device |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101051284A (en) * | 2006-04-06 | 2007-10-10 | 威刚科技股份有限公司 | Secure digital storage device and associated controller |
| CN101124639A (en) * | 2005-09-30 | 2008-02-13 | 西格马特尔公司 | System and method of accessing non-volatile computer memory |
| CN101349957A (en) * | 2008-07-29 | 2009-01-21 | 友达光电股份有限公司 | Display apparatus and data reading controller thereof |
| CN101427323A (en) * | 2004-11-04 | 2009-05-06 | 西格马特尔公司 | System and method for reading non-volatile computer memory |
| CN102103834A (en) * | 2009-12-22 | 2011-06-22 | 上海天马微电子有限公司 | Method and device for maintaining data of drive circuit |
| CN103488578A (en) * | 2012-12-28 | 2014-01-01 | 晶天电子（深圳）有限公司 | Vmd application/driver |
| CN105706059A (en) * | 2013-09-27 | 2016-06-22 | 英特尔公司 | Error correction in non-volatile memory |
| CN105975240A (en) * | 2016-07-01 | 2016-09-28 | 深圳市华星光电技术有限公司 | Data storage device, method for preventing data failure thereof and time schedule controller |
| CN106205671A (en) * | 2015-05-26 | 2016-12-07 | 华邦电子股份有限公司 | Accumulator system and management method thereof |
-
2018
- 2018-12-11 CN CN201811509242.8A patent/CN109410869A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101427323A (en) * | 2004-11-04 | 2009-05-06 | 西格马特尔公司 | System and method for reading non-volatile computer memory |
| CN101124639A (en) * | 2005-09-30 | 2008-02-13 | 西格马特尔公司 | System and method of accessing non-volatile computer memory |
| CN101051284A (en) * | 2006-04-06 | 2007-10-10 | 威刚科技股份有限公司 | Secure digital storage device and associated controller |
| CN101349957A (en) * | 2008-07-29 | 2009-01-21 | 友达光电股份有限公司 | Display apparatus and data reading controller thereof |
| CN102103834A (en) * | 2009-12-22 | 2011-06-22 | 上海天马微电子有限公司 | Method and device for maintaining data of drive circuit |
| CN103488578A (en) * | 2012-12-28 | 2014-01-01 | 晶天电子（深圳）有限公司 | Vmd application/driver |
| CN105706059A (en) * | 2013-09-27 | 2016-06-22 | 英特尔公司 | Error correction in non-volatile memory |
| CN106205671A (en) * | 2015-05-26 | 2016-12-07 | 华邦电子股份有限公司 | Accumulator system and management method thereof |
| CN105975240A (en) * | 2016-07-01 | 2016-09-28 | 深圳市华星光电技术有限公司 | Data storage device, method for preventing data failure thereof and time schedule controller |
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