CN109375568A - A kind of multi-source data real-time acquisition device - Google Patents
A kind of multi-source data real-time acquisition device Download PDFInfo
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/15—Plc structure of the system
- G05B2219/15057—FPGA field programmable gate array
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/22—Pc multi processor system
- G05B2219/2231—Master slave
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25033—Pc structure of the system structure, control, syncronization, data, alarm, connect I-O line to interface
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25251—Real time clock
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Abstract
The present invention relates to a kind of multi-source data real-time acquisition devices, are related to data acquisition technology field.A kind of multi-source data real-time acquisition device design method realized based on FPGA proposed by the present invention, scheduling and the document storage management that multi-source data is realized using primary processor operation VxWorks real time operating system, the convenient export of file is realized based on FTP network protocol and USB interface.Meanwhile using the management from processor soft core realization different types of data source, therefore it can neatly increase and delete data source channels, rapid build meets the real-time data acquisition system of different application scene.The present invention have the characteristics that modularization, high real-time, low-power consumption, flexibly it is expansible.
Description
Technical field
The present invention relates to data acquisition technology fields, and in particular to a kind of multi-source data real-time acquisition device.
Background technique
For application scenarios such as video acquisition, radar data record, vehicle bus monitoring, need former to video flowing, radar
The process datas such as beginning signal, voice data, bus interaction carry out real-time acquisition and storage, and returning in specific time Develop Data
It puts, export and analyzes.Design complexities can be significantly greatly increased by carrying out acquisition device design using traditional X 86 processor platform, meanwhile,
There are strict requirements to power consumption, volume and bandwidth in these scenes, therefore data collection system certainly will be required using insertion
Formula Platform Designing realize, with meet miniaturization, low-power consumption, high real-time, high bandwidth the features such as.
Summary of the invention
(1) technical problems to be solved
The technical problem to be solved by the present invention is how designing a kind of modularization, high real-time, low-power consumption, can flexibly expanding
The multi-source data real-time acquisition device of exhibition.
(2) technical solution
In order to solve the above-mentioned technical problems, the present invention provides a kind of multi-source data real-time acquisition devices, including main process task
Device is controlled from processor, solid state memory space, that is, SATA/NVMe solid-state disk, DDR controller, SATA/NVMe controller, DMA
Device；
It is multiple to be interconnected one to one with dma controller respectively from processor, multiple dma controllers, primary processor, DDR control
Device processed, SATA/NVMe controller pass through AXI bus and connect；
By the way of multiple collaboration processing from processor, parallel acquisition and the group packet processing of multiple data sources are realized；Its
In each from the acquisition of the data of one data source of processor complete independently and playback management, data acquisition is by from processor
The acquisition of data, group packet, buffering and DMA control are realized in fpga logic part, whenever dma controller successfully writes data into DDR
In controller, from processor receive dma controller complete interrupt information after, from processor by timestamp, retrieval information this
Twoport BlockRAM is written in a little labels, and notifies primary processor by Mailbox；
Vxworks operating system is run on the primary processor, and completes the management and scheduling of multitask read-write queue, by
Primary processor parsing comes the Mailbox message content since processor, operation and data source in the VxWorks system of primary processor
Corresponding task will be in data collected and label write-in solid state memory space SATA/NVMe solid-state disk；Replayed section is by leading
Processor is initiated, and primary processor, which is read, first needs the data and label information of playback file, be stored in respectively DDR controller and
In twoport BlockRAM, and by Mailbox notice accordingly from processor, by parsing Mailbox message content from processor,
And data are carried to playback buffer area from DDR controller by the dma controller for starting fpga logic part, until file playback is complete
Finish；
The dma controller of all data sources can access DDR controller i.e. DDR caching, share the band of DDR data/address bus
It is wide；The DDR controller is caching, and particular sector is written for realizing by the data of DDR controller in SATA/NVMe controller,
Or data are read from SATA/NVMe solid-state disk and are carried in DDR controller；DDR controller is operated as VxWorks
System running space and data acquisition, playback and derived spatial cache.
It preferably, further include passing through with multiple dma controllers, primary processor, DDR controller, SATA/NVMe controller
The network controller of AXI bus connection.
It preferably, further include passing through with multiple dma controllers, primary processor, DDR controller, SATA/NVMe controller
The USB controller of AXI bus connection.
The present invention also provides a kind of method being formatted to SATA/NVMe solid-state disk in the device, the party
In method, SATA/NVMe solid-state disk is formatted using FAT32 file system, the acquisition from multiple data sources is managed, returns
Let alone business and network and USB access request；
The method for realizing the standard FAT32 file system are as follows: SATA/NVMe controller is based in VxWorks system
Physical address and register definitions encapsulate sector read/write function, realize the read and write access of solid state memory space, function parameter includes
Initial sector, sector number and read-write buffer area, then write VxWorks system Block Device Driver, pass through DevCreate function
A block device is registered in systems, and memory capacity is obtained from the corresponding registers of SATA/NVMe controller；Finally, modification
BlkRd and BlkWrt function closes the sector read/write function of actual sector read/write function BlkRW and SATA/NVMe controller
Connection gets up, and then can be by calling dosfsDiskFormat and dosFsShow function to realize formatting and the shape of memory space
State inquiry, and file read-write access control is realized by open, read and write function.
Invention further provides a kind of methods for realizing data acquisition using the device, include the following steps:
1) primary processor receives beginning acquisition, sends acquisition message to from processor by Mailbox；
2) it receives and parses through from processor to acquisition message, data source acquisition switch, fpga logic is opened by register
Part starts to receive data and is written into DDR caching by the dma controller in data source, and by dma controller, single
Secondary DMA length is configurable by register；
3) single DMA transfer complete when, receive interruptions from processor, in the interrupt handling function completion data compression,
After image transformation, feature extraction operation, timestamp, retrieval information are written in twoport BlockRAM, and pass through Mailbox and notify
Primary processor DSR；
4) data source persistently receives new data, and is write data into the queue that DDR is cached by dma controller, from
Processor successively takes out task from buffer queue, notifies primary processor data preparation by Mailbox and twoport BlockRAM
It is good；
5) after primary processor detects the DSR order from Mailbox, open, read and write letter are used
Number creation file simultaneously passes through data and the file information in SATA/NVMe controller write-in specified file together；
6) primary processor detects stopping acquisition, stops acquiring from processor by Mailbox notice, team to be cached
Stop write-in file after the completion of column processing.
The present invention also provides a kind of methods for realizing data readback using the device, include the following steps:
1) primary processor receives beginning playback command, and starts to read file content and the file information, is respectively put into slow
It deposits in queue and twoport BlockRAM, and starts the playback operation of the data source from processor by Mailbox notice；
2) it receives and parses through from processor to playback command, which is opened by register；
3) from the timestamp in processor parsing twoport BlockRAM, retrieval information, data decompression, image transformation are completed
Afterwards, the dma controller for starting fpga logic part is played back DDR data cached be carried in caching by dma controller, single
Secondary DMA length is configurable by register；
4) primary processor, which receives, stops playback order, or by specified file content, all playback is finished, then is stopped playback,
It notifies to stop playback operation from processor by Mailbox.
Method derived from data is realized using the device invention further provides a kind of, is included the following steps:
When being exported using NFS and FTP, install respectively in export computer first and configure NFS and FTP service, then into
Row mount operation and logon operation, will be in required file copy extremely export computer into storage system catalogue；
When exporting using USB interface, device can be identified as to USB mobile hard disk in export computer, directly will
Required file copy is into export computer.
(3) beneficial effect
A kind of multi-source data real-time acquisition device design method realized based on FPGA proposed by the present invention, using main process task
Device runs scheduling and the document storage management that VxWorks real time operating system realizes multi-source data, based on FTP network protocol and
The convenient export of USB interface realization file.Meanwhile using the management for realizing different types of data source from processor soft core, therefore
It can neatly increase and delete data source channels, rapid build meets the real-time data acquisition system of different application scene.This
Invention has the characteristics that modularization, high real-time, low-power consumption, flexible expansible.
Detailed description of the invention
Fig. 1 is that system bus of the invention interconnects schematic diagram；
Fig. 2 is multiprocessor collaboration acquisition functional block diagram of the invention；
Fig. 3 is file system design schematic diagram in the present invention.
Specific embodiment
To keep the purpose of the present invention, content and advantage clearer, with reference to the accompanying drawings and examples, to of the invention
Specific embodiment is described in further detail.
As shown in Figure 1, a kind of multi-source data real-time acquisition device provided by the invention is that a kind of may be programmed based on FPGA is patrolled
The SoPC system architecture of volume device building, the multi-source data real-time acquisition device include primary processor, deposit from processor, solid-state
Store up space, that is, SATA/NVMe solid-state disk, DDR controller, SATA/NVMe controller, dma controller, network controller, USB control
Device processed；
It is multiple to be interconnected one to one with dma controller respectively from processor, multiple dma controllers, primary processor, DDR control
Device processed, SATA/NVMe controller, network controller, USB controller pass through AXI bus and connect；
Since working-flow is complex, to reduce data processing delay, assisted using multiple from processor (soft core)
With the mode of processing, parallel acquisition and the group packet processing of multiple data sources are realized；Specifically, each from processor complete independently one
The data of a data source acquire and playback management, and data acquisition is by realizing adopting for data from the fpga logic part of processor
Collection, group packet, buffering and DMA control, whenever dma controller successfully writes data into DDR controller (as spatial cache), from
It is from processor that timestamp, retrieval these labels of information write-in is double after processor receives the information that dma controller completes interruption
Mouth BlockRAM, and primary processor is notified by Mailbox；
Vxworks operating system is run on primary processor, is seized using its priority, time slice scheduling and interrupt mechanism are protected
The real-time for demonstrate,proving multi-source data acquisition and storage needs addition network, USB Gadget, file in VxWorks board suppot package
The drivings such as system are supported.Real-time vxworks operating system is run by primary processor, and complete multitask read-write queue management and
Scheduling.Specifically, by primary processor parsing come since the Mailbox message content of processor, the VxWorks system of primary processor
It is middle to run task corresponding with data source for data collected and label write-in solid state memory space SATA/NVMe solid-state disk
In；
Replayed section is initiated by primary processor, and primary processor reads the data and label information for needing playback file first,
It is stored in DDR controller and twoport BlockRAM respectively, and by Mailbox notice accordingly from processor, by from processing
Device parses Mailbox message content, and data are carried to back by the dma controller for starting fpga logic part from DDR controller
Buffer area is put, until file playback finishes.
The characteristics of being interconnected entirely based on AXI bus, it is slow that the dma controller of all data sources can access DDR controller i.e. DDR
It deposits (as memory space), shares the bandwidth of DDR data/address bus；DDR controller is caching, and SATA/NVMe controller is for real
Particular sector now is written into the data of DDR controller, or data are read from SATA/NVMe solid-state disk and are carried to DDR control
In device processed；DDR controller is empty as vxworks operating system running space and data acquisition, playback and derived caching
Between.
Wherein, the 0th acquisition and group packet to N circuit-switched data source is each responsible for from processor 0 to N to handle；By main process task reality
The scheduling of task queues and distribution and the retrieval managements of SATA/NVMe solid-state disk such as now acquisition, playback and export；Primary processor
And from the interaction for carrying out order, state and data between processor by Mailbox, BlockRAM, interruption and DDR.
Traditional data acquisition device mostly uses user-defined file system, carries out export operation by upper computer software, both
The development difficulty of host computer is increased, while being not easy to user's use again.As shown in figure 3, the present invention uses standard FAT32 file
System is formatted SATA/NVMe solid-state disk, manage acquisition from multiple data sources, playback task and network and
USB access request.Wherein, network interface supports the Network File System such as NFS, FTP, and USB interface is supported USB Gadget, is convenient for
User's direct export directly by way of FTP or mobile hard disk in host computer.
Since SATA/NVMe controller is realized using customized IP core, general driving can not be supported, therefore for described in realization
Standard FAT32 file system needs self-developing Block Device Driver, a block device is registered first in VxWorks system, so
Read and write access operation in sector in data flow in I/O Request queue and SATA/NVMe controller is associated afterwards.Wherein SATA/
NVMe controller is realized by fpga logic part, and the parallel control of multiple solid-state disks is realized based on RAID0, to realize reading
The multiplication of write performance.To realize FAT32 standard file system, implements are controlled based on SATA/NVMe first in VxWorks system
It manages address and register definitions encapsulates sector read/write function, realize the read and write access of solid state memory space, function parameter includes
Beginning sector, sector number and read-write buffer area etc..Then VxWorks system Block Device Driver is write, DevCreate function is passed through
A block device is registered in systems, and memory capacity is obtained from the corresponding registers of SATA/NVMe controller；Finally, modification
The functions such as BlkRd and BlkWrt, by the sector read/write function of actual sector read/write function BlkRW and SATA/NVMe controller
It associates, and then can be by calling the canonical functions such as dosfsDiskFormat and dosFsShow to realize the lattice of memory space
Formula and status inquiry, and file read-write access control is realized by open, read and write function.
With reference to Fig. 2, realize that the process of data acquisition includes the following steps: using above-mentioned apparatus
1) primary processor receives beginning acquisition, sends acquisition message to from processor by Mailbox；
2) it receives and parses through from processor to acquisition message, data source acquisition switch is opened by register, FPGA is patrolled
It collects part to start to receive data and be written into DDRDDR caching by data source dma controller, single DMA length passes through deposit
Device is configurable, such as 1MB；
3) single DMA transfer complete when, receive interruptions from processor, in the interrupt handling function completion data compression,
After the specific operations such as image transformation, feature extraction, the file informations such as timestamp, retrieval information are written in twoport BlockRAM,
And primary processor DSR is notified by Mailbox；
4) data source persistently receives new data, and the ring of DDR controller is write data by data source dma controller
In shape buffer queue, from processor successively from taking out task in buffer queue and after completing specific operation, by Mailbox and double
Mouth BlockRAM notifies primary processor DSR；
5) after primary processor detects the DSR order from Mailbox, open, read and write letter are used
Number creation file simultaneously passes through data and the file information in SATA/NVMe controller write-in specific file together；
6) primary processor detects stopping acquisition, stops acquiring from processor by Mailbox notice, slow to DDR
File is written in stopping after the completion of depositing queue processing；
Network controller and USB controller are only used for data export operation, in data acquisition flow and are not used.
Realize that the process of data readback includes the following steps: using above-mentioned apparatus
1) primary processor receives beginning playback command, and starts to read file content and the file information, is respectively put into DDR
In buffer queue and twoport BlockRAM, and notify by Mailbox the playback operation for starting from processor the data source；
2) it receives and parses through from processor to playback command, which is opened by register；
3) the file informations such as timestamp, the retrieval information in twoport BlockRAM are parsed from processor, complete data decompression
Contracting, image transformation etc. start the data source dma controller of fpga logic part after specific operations, by dma controller by DDR
It caches data cached be carried to play back in caching, single DMA length is configurable by register, such as 1MB；
4) primary processor, which receives, stops playback order, or by specified file content, all playback is finished, then is stopped playback,
It notifies to stop playback operation from processor by Mailbox；
Network controller and USB controller are only used for data export operation, in data readback process and are not used.
Realize that process derived from data includes the following steps: using above-mentioned apparatus
Since the present apparatus uses standard file system, easily file can be led by way of FTP, NFS and USB flash disk
Out, mainly pass through network controller and USB controller and corresponding driving and application program cooperation when therefore data export operates
It realizes；
When being exported using NFS and FTP, installs respectively in export special purpose computer first and configure NFS and FTP service, so
Mount operation and logon operation are carried out afterwards, it will be in required file copy extremely export special purpose computer into storage system catalogue；
When exporting using USB interface, device can be identified as to USB mobile hard disk in export special purpose computer, directly
It connects required file copy into export special purpose computer.
As can be seen that a kind of multi-source data real-time acquisition device design method realized based on FPGA proposed by the present invention,
Scheduling and the document storage management that multi-source data is realized using primary processor operation VxWorks real time operating system, are based on FTP net
Network agreement and USB interface realize the convenient export of file.Meanwhile using the pipe for realizing different types of data source from processor soft core
Reason, therefore can neatly increase and delete data source channels, rapid build meets the real-time data acquisition of different application scene
System.The present invention have the characteristics that modularization, high real-time, low-power consumption, flexibly it is expansible.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations
Also it should be regarded as protection scope of the present invention.
Claims (7)
1. a kind of multi-source data real-time acquisition device, which is characterized in that including primary processor, from processor, solid state memory space
That is SATA/NVMe solid-state disk, DDR controller, SATA/NVMe controller, dma controller；
It is multiple from processor respectively one to one with dma controller interconnect, multiple dma controllers, primary processor, DDR controller,
SATA/NVMe controller passes through AXI bus and connects；
By the way of multiple collaboration processing from processor, parallel acquisition and the group packet processing of multiple data sources are realized；It is wherein every
It is a from the data of one data source of processor complete independently acquisition and playback management, data acquisition is by the FPGA from processor
Logical gate realizes the acquisition of data, group packet, buffering and DMA control, whenever dma controller successfully writes data into DDR control
In device, from processor receive dma controller complete interrupt information after, from processor by timestamp, retrieval information these mark
Label write-in twoport BlockRAM, and primary processor is notified by Mailbox；
Vxworks operating system is run on the primary processor, and completes the management and scheduling of multitask read-write queue, by main
It manages device and parses the Mailbox message content come since processor, operation is corresponding with data source in the VxWorks system of primary processor
Task will data collected and label write-in solid state memory space SATA/NVMe solid-state disk in；Replayed section is by main process task
Device is initiated, and primary processor reads the data and label information for needing playback file first, is stored in DDR controller and twoport respectively
In BlockRAM, and by parsing Mailbox message content from processor, and opened by Mailbox notice accordingly from processor
Data are carried to playback buffer area from DDR controller by the dma controller of dynamic fpga logic part, until file playback finishes；
The dma controller of all data sources can access DDR controller i.e. DDR caching, share the bandwidth of DDR data/address bus；Institute
DDR controller is stated as caching, particular sector is written for realizing by the data of DDR controller in SATA/NVMe controller, or will count
According to reading and be carried in DDR controller from SATA/NVMe solid-state disk；DDR controller is run as vxworks operating system
Space and data acquisition, playback and derived spatial cache.
2. further including passing through AXI bus with multiple dma controllers, primary processor, DDR controller, SATA/NVMe controller to connect
The network controller connect.
3. further including passing through AXI bus with multiple dma controllers, primary processor, DDR controller, SATA/NVMe controller to connect
The USB controller connect.
4. the method that SATA/NVMe solid-state disk is formatted in device described in a kind of pair of claims 1 or 2 or 3, feature
It is, in this method, SATA/NVMe solid-state disk is formatted using FAT32 file system, management comes from multiple data sources
Acquisition, playback task and network and USB access request；
The method for realizing the standard FAT32 file system are as follows: SATA/NVMe controller physics is based in VxWorks system
Address and register definitions encapsulate sector read/write function, realize the read and write access of solid state memory space, and function parameter includes starting
Sector, sector number and read-write buffer area, then write VxWorks system Block Device Driver, are being by DevCreate function
A block device is registered in system, memory capacity is obtained from the corresponding registers of SATA/NVMe controller；Finally, modification BlkRd
With BlkWrt function, actual sector read/write function BlkRW has been associated with the sector read/write function of SATA/NVMe controller
Come, and then can be by calling dosfsDiskFormat and dosFsShow function to realize that the formatting of memory space and state are looked into
It askes, and file read-write access control is realized by open, read and write function.
5. a kind of method for realizing data acquisition using device described in claims 1 or 22 or 3, which is characterized in that including as follows
Step:
1) primary processor receives beginning acquisition, sends acquisition message to from processor by Mailbox；
2) it receives and parses through from processor to acquisition message, data source acquisition switch, fpga logic part is opened by register
Start to receive data and is written into DDR caching, single by the dma controller in data source, and by dma controller
DMA length is configurable by register；
3) when single DMA transfer is completed, interruption is received from processor, completes data compression, image in the interrupt handling function
After transformation, feature extraction operation, timestamp, retrieval information are written in twoport BlockRAM, and notify main place by Mailbox
Manage device DSR；
4) data source persistently receives new data, and is write data into the queue that DDR is cached by dma controller, from processing
Device successively takes out task from buffer queue, notifies primary processor DSR by Mailbox and twoport BlockRAM；
5) it after primary processor detects the DSR order from Mailbox, is created using open, read and write function
It builds file and passes through data and the file information in SATA/NVMe controller write-in specified file together；
6) primary processor detects stopping acquisition, stops acquiring from processor by Mailbox notice, at buffer queue
Stop write-in file after the completion of reason.
6. a kind of method for realizing data readback using device described in claims 1 or 22 or 3, which is characterized in that including as follows
Step:
1) primary processor receives beginning playback command, and starts to read file content and the file information, is respectively put into caching team
In column and twoport BlockRAM, and start from processor by Mailbox notice the playback operation of the data source；
2) it receives and parses through from processor to playback command, which is opened by register；
3) from the timestamp in processor parsing twoport BlockRAM, retrieval information, after completing data decompression, image transformation,
The dma controller for starting fpga logic part is played back DDR data cached be carried in caching by dma controller, single
DMA length is configurable by register；
4) primary processor, which receives, stops playback order, or by specified file content, all playback is finished, then stops playback, pass through
Mailbox notice stops playback operation from processor.
7. a kind of realize method derived from data using device described in claims 1 or 22 or 3, which is characterized in that including as follows
Step:
When being exported using NFS and FTP, installs respectively in export computer first and configure NFS and FTP service, then carry out
Mount operation and logon operation, will be in required file copy extremely export computer into storage system catalogue；
When exporting using USB interface, device can be identified as to USB mobile hard disk in export computer, it directly will be required
File copy is into export computer.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110069442A (en) * | 2019-04-24 | 2019-07-30 | 北京计算机技术及应用研究所 | A kind of ultra-high-speed data acquisition device and method based on ZYNQ Series FPGA |
| CN110135776A (en) * | 2019-04-01 | 2019-08-16 | 浙江职信通信科技有限公司 | A kind of shipping information management method, system and computer storage medium |
| CN112699062A (en) * | 2020-12-28 | 2021-04-23 | 湖南博匠信息科技有限公司 | High speed data storage system |
| CN113156855A (en) * | 2021-04-07 | 2021-07-23 | 杭州永谐科技有限公司成都分公司 | Miniature data acquisition and processing system |
| CN113312394A (en) * | 2021-06-15 | 2021-08-27 | 中国科学技术大学 | Method and device for constructing data acquisition system |
| CN114978216A (en) * | 2022-05-19 | 2022-08-30 | 泉州市拓科信息技术有限公司 | Multisource data processing system based on Internet of things |
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