CN109343854B - Intelligent automatic compiling method and system based on zynq system - Google Patents
Intelligent automatic compiling method and system based on zynq system Download PDFInfo
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Abstract
The invention discloses an intelligent automatic compiling method and system based on a zynq system, wherein the method comprises the steps of 1) storing an FPGA project under an intelligent automatic compiling operation directory of the zynq system; 2) running a shell script file and creating a project; 3) importing a hardware description file; 4) generating an equipment tree directory and a configuration directory; 5) automatically replacing the fixed configuration file by the configuration standard component, and replacing the configuration file by the target file; 6) automatically modifying the equipment tree configuration file according to the rule of the equipment tree analysis modifier, and retrieving, comparing and modifying irregular syntax description and characteristic parameters in the target file; 7) recording the compiling process of the configuration files of kernel, u-boot and rootfs to generate a compiling log; 8) and finishing the firmware packaging to generate a compiled file. The invention generates the part fixedly modified in the engineering updating into the standard part for direct replacement, and solves the problems of repeated operation, engineering development influence and manpower loss caused by frequent replacement of the FPGA engineering.
Description
Technical Field
The invention relates to the technical field of embedded system platforms, in particular to an intelligent automatic compiling method and system based on a zynq system.
Background
At present, SOC chips of ARM + FPGA architecture are more and more widely used. For example, the zynq series of xilinx corporation, integrating an ARM and an FPGA together does provide advantages for hardware design and control. However, currently, software and firmware (including boot. bin, image. ub, top. bit) are constrained by both ARM and FPGA. If one party changes the function, the function is recompiled and generated, especially in the early stage of debugging. Including Boot boots (fsbl. elf and u-Boot), linux kernel and FPGA engineering, which are now widely used. We currently use the petalinux tool to accomplish the compilation of the zynq system.
Fpga engineers provide directory contents of hardware description files, and then run a set of compiling tool commands on the upper computer, wherein the compiling tool commands comprise petalinux-create, petalinux-config, petalinux-build and petalinux-package, and the tool commands are tool sets provided for zynq series by xilinx company.
The steps required to be completed in software compilation are as follows:
1) creating a zynq project with the project name ptlnx _ prj on the upper computer platform by using a petalinux-create tool;
2) importing a hardware description file by using a petalinux-config tool and simultaneously entering an interface to complete attribute configuration;
3) running a petalinux-config tool to complete the configuration of the kernel, wherein the configuration comprises (drive module selection, file system support, network protocol support and kernel starting parameters);
4) operating a petalinux-config tool to configure a support peripheral and delay time;
5) running a petalinux-config tool to configure a root file system, wherein the root file system supports the configuration including a busy command and a library file;
6) generating a device tree, a kernel configuration file, a boot configuration file and a rootfs configuration file;
7) manually modifying attributes, parameters and non-standard descriptions in each configuration file;
8) running a petalinux-build tool to complete u-boot, kernel and rootfs compiling;
9) and (4) operating a betalinux-package tool, completing firmware packaging, and finally generating a compiled file (boot.
The defects of the above process are that: 1) the FPGA engineering is frequently replaced to cause repeated operation, so that the development of the whole engineering and the labor loss are greatly influenced. 2) Engineering updates cause software modifications that are somewhat fixed and some that are variable, requiring human search to determine and modify each time a portion of the change is made. 3) The compiling time is long, compiling interruption caused by various factors can happen in the middle, and manual tracking and real-time modification are needed.
Disclosure of Invention
Based on the technical problems in the background art, the invention provides the intelligent automatic compiling method and system based on the zynq system, which can improve the compiling efficiency and reduce manual intervention.
In order to achieve the above purpose, the intelligent automated compiling method based on the zynq system is characterized by comprising the following steps:
1) storing the FPGA project under an intelligent automatic compiling and running directory of the zynq system;
2) the method comprises the steps that an operating system Ubuntu opens a command line terminal window, a shell script file is run, the shell script is an intelligent automatic compiling tool, and a zynq project is created on an upper computer platform by using a petalinux-create tool;
3) importing the hardware description file by using a petalinux-config tool;
4) generating an equipment tree directory and a configuration directory;
5) automatically replacing the fixed configuration file by the configuration standard component, and replacing the kernel configuration file, the u-boot configuration file and the rootfs configuration file by target files;
6) automatically modifying the equipment tree configuration file according to the rule of the equipment tree analysis modifier, and retrieving, comparing and modifying irregular syntax description and characteristic parameters in the target file;
7) running a petalinux-build tool, completing the compiling of kernel, u-boot and rootfs, recording the compiling processes of a kernel configuration file, a u-boot configuration file and a rootfs configuration file, and generating a compiling log;
8) and (5) operating a petalinux-package tool, completing firmware packaging, and generating a compiled file.
Preferably, the automatic replacement of the fixed configuration file in the step 4) and the automatic modification of the device tree configuration file in the step 5) are both realized by automatically running a shell script.
Preferably, the rules of the device tree parsing modifier include device tree attribute modification, interrupt number modification, local drive device tree addition, and deletion of invalid attribute.
Preferably, the step 6) is implemented by automatically running the shell script, and if the compiling is wrong, the shell script searches for an error problem point, automatically finds the file to modify and automatically reprogram, and automatically terminates when the number of times of reprogramming is recorded is three.
Preferably, the configuration standard component includes a kernel configuration parameter, a u-boot configuration parameter and a root file system configuration parameter.
Preferably, the kernel configuration parameters include a file system support parameter, a drive support parameter and a network protocol support parameter; the u-boot configuration parameters comprise serial port attribute parameters, emmc storage loading kernel parameters and delay time parameters; the root file system configuration parameters include a supporting library and a busy command set.
Preferably, the device tree analysis modifier is a logic rule formed by summarizing device-tree characteristics and debugging performance (debugging) of a device tree that has been used to generate a project file.
The invention also provides an intelligent automatic compiling system based on the zynq system, which comprises a hard disk, a central processing unit and a computer program which is stored in the memory and can run on the processor, and is characterized in that the steps of the method are realized when the central processing unit is configured to execute the computer program.
The invention has the advantages that:
1) the invention solves the problems that the FPGA engineering is frequently replaced to cause repeated operation, and the development of the whole engineering and the manpower consumption are greatly influenced.
2) The invention generates standard parts for the fixed and modified parts in engineering updating and directly replaces the standard parts.
3) The method analyzes and summarizes the device-tree characteristics of the conventional equipment tree generating engineering files, and summarizes the debugged rules to generate a set of analysis modifiers. And automatically retrieving, comparing and modifying the irregular grammatical description and the characteristic parameters in the target files.
4) And compiling time is short, when compiling is interrupted, error problem points are automatically searched, and relevant files are automatically found for modification and reprogramming.
Drawings
Fig. 1 is a flowchart of an intelligent automated compiling method based on a zynq system according to the present invention.
Fig. 2 is a schematic structural diagram of an intelligent automated compiling system based on a zynq system according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the following figures and examples, which should not be construed as limiting the invention.
As shown in fig. 1, the intelligent automated compiling method based on the zynq system provided by the present invention takes an Xlinux zynq 7035 series and an FPGA GI151 project automated compiling as an example, and includes the following steps:
1) and storing the FPGA project under the intelligent automatic compiling and running directory of the zynq system.
2) Entering/template directory, opening a command line terminal window by an operating system Ubuntu, and automatically running a shell script file, wherein the shell script is an intelligent automatic compiling tool; a zynq project is created on an upper computer platform by using a petalinux-create tool, an imported FPGA GI151 project is stored in a/template directory, a GI151 directory project directory is newly created and stored in a hardware description folder top _ hw _ platform.
3) The hardware description file is imported using the petalinux-config tool.
4) And generating a configuration directory with subsystems as a structure directory in the target project. The directory includes a modified part (device tree device-tree) to be changed and a modified part (kernel configuration, u-boot configuration, rootfs configuration) to be fixed, i.e. the device tree directory device-tree and the configuration directory.
The fixed modification is modified according to the product requirements to generate a set of configuration standard components. The configuration standard component comprises a kernel configuration parameter, a u-boot configuration parameter and a root file system configuration parameter. The kernel configuration parameters comprise file system support parameters, drive support parameters and network protocol support parameters; the u-boot configuration parameters comprise serial port attribute parameters, emmc storage loading kernel parameters and delay time parameters; the root file system configuration parameters include the supporting library and the busy command set. The alternative method is to directly replace the target file.
The modification of the change is to analyze and summarize according to the device-tree characteristics of the original generated engineering files, including summarizing the debugged rules to generate a set of analysis modifiers. And searching, comparing and modifying the irregular grammatical description and the characteristic parameters in the target file by utilizing the analysis modifier.
The rules of the resolver comprise attribute modification in the device tree, change of interrupt numbers, addition of local drive device trees and deletion of invalid attributes. For example:
a) file attribute modification in a device tree
The compatible "micro, n25q128" was changed to the used spiflash chip
compatible＝"winbond,w25q128"
b) Invalid interrupt number change
interrupt ═ < 0-14 >; more specific interrupt numbers
interrupts＝<0 10 4>；
5) And automatically replacing the fixed configuration file by the configuration standard component, and replacing the kernel core configuration file, the u-boot configuration file and the rootfs configuration file by the target file.
6) And automatically modifying the equipment tree configuration file according to the rule of the equipment tree analysis modifier, and retrieving, comparing and modifying the irregular syntax description and the characteristic parameters in the target file.
7) And running a petalinux-build tool, generating a build directory in a target project, completing compilation of kernel, u-boot and rootfs, recording the compilation process of a kernel configuration file, a u-boot configuration file and a rootfs configuration file, and generating a compilation log.
8) If the compilation is normal, operating the petalinux-package tool petalinux-package-force-boot-fsbl images/linux/zynq-fsbl
The method comprises the steps of performing firmware packaging on a file, namely,/top _ hw _ platform/top.bit-u-boot, generating images directories in target engineering, finishing firmware packaging, and generating compiled files (boot.
If the compiling is wrong, the shell script can search error problem points according to the build.log under the directory, if the conventional directory authority is not right, the path is not right, the variable is not defined, the grammar is wrong and the like, the script automatically finds the file to modify and automatically reprogram, and the program can be automatically terminated when the recoding and reprogramming times are 3. Log stores error log records and waits for manual checking and resolution.
The invention also provides an intelligent automatic compiling system based on the zynq system, which adopts the petalinux 2015 version, installs ubuntu 16, a hardware configuration i 78 kernel cpu, a hard disk space 80G, a memory 8G and various peripheral interfaces (a display, a keyboard and a mouse) on a host machine by a software system, and is shown in fig. 2. The system comprises a hard disk, a central processing unit and a computer program stored in the memory and executable on the processor, the central processing unit being configured to implement the steps of the above method when executing the computer program.
Although the preferred embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and those skilled in the art can make various changes and modifications within the spirit and scope of the present invention without departing from the spirit and scope of the appended claims.
Claims (7)
1. An intelligent automatic compiling method based on a zynq system is characterized in that: the method comprises the following steps:
1) storing the FPGA project under an intelligent automatic compiling and running directory of the zynq system;
2) the method comprises the steps that an operating system Ubuntu opens a command line terminal window, a shell script file is run, the shell script is an intelligent automatic compiling tool, and a zynq project is created on an upper computer platform by using a petalinux-create tool;
3) importing the hardware description file by using a petalinux-config tool;
4) generating an equipment tree directory and a configuration directory;
5) automatically replacing the fixed configuration file by the configuration standard component, and replacing the kernel configuration file, the u-boot configuration file and the rootfs configuration file by target files;
6) automatically modifying the equipment tree configuration file according to the rule of the equipment tree analysis modifier, and retrieving, comparing and modifying irregular syntax description and characteristic parameters in the target file; the equipment tree analysis modifier is a logic rule formed by summarizing the equipment tree device-tree characteristics and debugging of the original generated engineering file;
7) running a petalinux-build tool, completing the compiling of kernel, u-boot and rootfs, recording the compiling processes of a kernel configuration file, a u-boot configuration file and a rootfs configuration file, and generating a compiling log;
8) and (5) operating a petalinux-package tool, completing firmware packaging, and generating a compiled file.
2. The intelligent automated compiling method based on the zynq system according to claim 1, characterized in that: the automatic replacement of the fixed configuration file in the step 5) and the automatic modification of the device tree configuration file in the step 6) are both realized by automatically running a shell script.
3. The intelligent automated compiling method based on the zynq system according to claim 1, characterized in that: the rules of the equipment tree analysis modifier comprise equipment tree attribute modification, interrupt number change, local drive equipment tree addition and invalid attribute deletion.
4. The intelligent automated compiling method based on the zynq system according to claim 1, characterized in that: and 7) the step is realized by automatically running the shell script, when the compiling is wrong, the shell script searches for a wrong problem point, automatically finds the file to be modified and automatically reprograms, and automatically terminates when the record of the reprogramming times is three times.
5. The intelligent automated compiling method based on the zynq system according to claim 1, characterized in that: the configuration standard component comprises a kernel configuration parameter, a u-boot configuration parameter and a root file system configuration parameter.
6. The intelligent automated compiling method based on the zynq system according to claim 5, wherein: the kernel configuration parameters comprise file system support parameters, drive support parameters and network protocol support parameters; the u-boot configuration parameters comprise serial port attribute parameters, emmc storage loading kernel parameters and delay time parameters; the root file system configuration parameters include a supporting library and a busy command set.
7. The intelligent automatic compiling system based on the zynq system is characterized in that: the computer system comprises a hard disk, a central processing unit and a computer program which is stored in a memory and can run on the central processing unit, and is characterized in that: the central processor is configured to carry out the steps of the method according to any one of claims 1 to 6 when executing the computer program.
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| CN109918080A (en) * | 2019-02-25 | 2019-06-21 | 深圳市创联时代科技有限公司 | A kind of method of configuration tool chain |
| CN110007910A (en) * | 2019-03-29 | 2019-07-12 | 上海仁童电子科技有限公司 | System development method, system boot method and device |
| CN110825450B (en) * | 2019-09-29 | 2023-08-11 | 五八有限公司 | APP configuration modification method and device, electronic equipment and storage medium |
| CN111209719A (en) * | 2019-12-31 | 2020-05-29 | 西安翔腾微电子科技有限公司 | Method, device, equipment and storage medium for automatically realizing IC design environment |
| CN114398086B (en) * | 2020-08-29 | 2022-11-25 | 华为技术有限公司 | Drive configuration management method, device, medium, equipment and system |
| CN114168168A (en) * | 2020-09-10 | 2022-03-11 | 华为技术有限公司 | Device tree repairing method, system and computer readable storage medium |
| CN112241268A (en) * | 2020-09-22 | 2021-01-19 | 合肥寰芯微电子科技有限公司 | Keil engineering compiling method, system and equipment |
| CN115269057B (en) * | 2022-09-23 | 2023-01-20 | 麒麟软件有限公司 | Method for generating configuration file of isolation system based on equipment tree |
| CN116931954B (en) * | 2023-09-18 | 2023-12-19 | 浙江简捷物联科技有限公司 | Built-in software package compiling construction method, device, equipment and medium |
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| US9652570B1 (en) * | 2015-09-03 | 2017-05-16 | Xilinx, Inc. | Automatic implementation of a customized system-on-chip |
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