CN109342929A - A kind of CVC-200T hardware intelligent test system and method - Google Patents
A kind of CVC-200T hardware intelligent test system and method Download PDFInfo
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The present invention relates to a kind of CVC-200T hardware intelligent test system and methods, the test macro includes tested board, NI PXI cabinet and mating board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, and wherein tested board includes primary logical unit MLU plate and communications management unit CMU plate；The industrial personal computer is host computer, runs the host computer test program of the visual programming software LabVIEW based on NI；The tested board is slave computer, runs CVC-200T board slave computer test program；The industrial personal computer sends control command to tested board and receives the test data of tested board feedback, judges automatically test result；The display and keyboard and mouse is used for the two dimensional code and mac address information of typing tested board for carrying out human-computer interaction, the scanner.Compared with prior art, the invention has the following advantages that man-machine interface is more friendly, facilitate operation, reduces development cost, secondary development period is shorter etc..
Description
Technical field
The present invention relates to kind of a railway signals equipment system regions, more particularly, to a kind of CVC-200T hardware intelligence test system
System and method.
Background technique
CVC-200T board numerous types, design is also extremely complex, is made of many submodules, manual testing can not
Meets the needs of extensive board commercialization test.This complexity makes engineer reduce verifying and testing cost, more smart
The challenge that arduousness is faced on time to market (TTM) is shortened in quasi- reliable measurement.
Summary of the invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art and provide a kind of CVC-200T hardware
Intelligent test system and method.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of CVC-200T hardware intelligent test system, the test macro include tested board, NI PXI cabinet and mating
Board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, wherein tested board includes master
Logic unit MLU plate and communications management unit CMU plate；
The industrial personal computer connects tested board by NI PXI cabinet and mating board, and the industrial personal computer passes sequentially through
Gigabit switch, network load plate and tested board carry out network communication, the display, keyboard and mouse, scanner difference
Connect industrial personal computer；
The industrial personal computer is host computer, and the host computer of visual programming software LabVIEW of the operation based on NI tests journey
Sequence；The tested board is slave computer, runs CVC-200T board slave computer test program；The industrial personal computer sends control
The test data for ordering to tested board and receiving tested board feedback, judges automatically test result；The display and key
Disk mouse is used for the two dimensional code and mac address information of typing tested board for carrying out human-computer interaction, the scanner.
Preferably, the NI PXI cabinet and mating board include 8360 plate of NI PXI-PCI, two blocks of PXI8512 plates,
8431 plate of PXI, 6509 digital I/O board of PXI and memory DATAPLUG；
The industrial personal computer by 8360 plate of NI PXI-PCI be separately connected two blocks of 8512 plates of PXI, 8431 plate of PXI,
6509 digital I/O board of PXI, two blocks of 8512 plates of PXI connect CMU plate, 8431 plate of PXI by CAN transmission line
CMU plate is connected, RS422 serial communication is used for, 6509 digital I/O board of PXI connects MLU plate, for simulating fan signal,
6509 digital I/O board of PXI connects CMU plate, manipulates ATO signal, the memory automatically for simulating train
DATAPLUG is separately connected MLU plate and CMU plate.
Preferably, the slave computer, which has, uploads all tested board inside/outsides portion precision of timer, FLASH file system
Unite TFFS0/TFFS1/TFFS2 read-write, the read-write of DATAPLUG interface, EEPROM interface read-write, reading slot position address and M-LVDS
The function of high-speed serial bus test result, and test result can be judged automatically, it is sent by debugging serial interface to host computer and is shown；
The slave computer has all 100,000,000/gigabits of tested board work network interface packet sending and receiving test function, can incite somebody to action
Test data is sent by gigabit switch, network load plate to host computer, and host computer relays to slave computer after receiving, under
Position machine judged automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown；
The slave computer has tested board CMU plate RS422 serial ports packet sending and receiving test function, can be by test data
It is sent by 8431 plate of NI PXI to host computer, host computer relays to slave computer after receiving, and is judged automatically by slave computer
Whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown；
The slave computer has CAN mouthfuls of packet sending and receiving test functions of tested board CMU plate, can pass through test data
CAN transmission line connection 8512 plate of NI PXI send to host computer, host computer relays to slave computer after receiving, by slave computer into
Row judge automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown；
The slave computer has all tested board FPGA/ hardware/driving/BSP version number readback test functions, will survey
Examination data are sent by debugging serial interface to host computer, are carried out judging automatically test result according to configuration file by host computer；
The slave computer has the function of all tested board sequence number programmings and readback contrastive test, by sequence number programming
Onto plate, then by readback to test data sent by debugging serial interface to host computer, judge automatically test knot by host computer
Fruit；
The slave computer has tested board MLU plate ECC status monitoring, USB interface read-write, board 5V/3.3V/
1.8V/1.0V/1.1V/0.9V supply voltage supervision, RTC clock, temperature sensor, hardware clock are synchronous and NVRAM read-write is surveyed
Function is tried, test result can be judged automatically, and send by debugging serial interface to host computer and show.
Preferably, the host computer has the function of that tested board CMU panel vehicle manipulates ATO interface testing, MLU plate automatically
Fan interface test function can be sent pulse test signal to slave computer by 6509 digital I/O board of NI PXI, by slave computer
It carries out judging automatically whether frequency meets the requirements, finally test result is sent by debugging serial interface to host computer and is shown；
Preferably, the host computer has login interface, and by inputting effective user name, this just can be used in password
Test macro while logining successfully, calls directly TFTP software, and minimize, for network load board slave computer test
Program；
The host computer has board selection function, including individual event selects and multinomial selection, and selected board is parallel
It is tested, board all of the above test item is also tested parallel, at most tests six blocks of MLU plates and two pieces of CMU simultaneously
Plate.
Preferably, the host computer has board configuration feature, including plant produced mode and receiving inspection mode；
The function that the plant produced mode has includes: to be scanned to input and configure board panel two dimensional code with scanner
In sequence number, scanning input and configure board MAC Address, configuration the RTC clock time, configuration debugging serial interface IP address；
The function that the receiving inspection mode has includes: to read board sequence number, read board MAC Address, configuration
RTC clock time, configuration debugging serial interface IP address；The sequence number being configured on plate wants readback, and the sequence number with scanning input
Carry out automatic comparison.
Preferably, the host computer has setting factory mode capabilities, according to configuration file, by the IP address of board and
Starting row information is set as factory state, and one 32 check words are write inside NVRAM.；
The host computer, which has, starts test function, sends test initiation command, and receive the test of slave computer upload
Data, until cycle tests is finished, test can just be terminated, and the host computer supports input test personnel name or work
Number, support setting length of testing speech；In test process, interface real-time display timing and remaining time information.
Preferably, the host computer has the function of each test item test details of all tested boards of real time inspection
Can, including the current testing time of test item, errors number, packet loss number, software/hardware error code and test result, test knot
Fruit is that red represents test crash, and green represents test and passes through；The host computer, which has, checks the various version/components of board
Number/sequence number/title, testing setup duration, the function of test execution time and tester's information；
The host computer has the function of that test report automatically saves, and test report content is consistent with real-time query interface,
Test report format is webpage version, the naming rule of test report: board title+sequence number+testing time+PASS/FAIL.
Preferably, the host computer has board panel leds observing interface, and the observing interface record is each
Whether LED light position and charactron flashing or the state being always on are correct, and state is finally integrated into a survey with other test items
In examination report；
The host computer first has to shake hands, after shaking hands successfully, can be surveyed before starting to test or configure
Examination, time-out of shaking hands then exit epicycle operation；The data that the test macro every five seconds periodic test board reports to avoid
The stuck machine of generating plate, test still through the case where；
Described test macro stable operation 48 hours or more；When short circuit or abnormal conditions occurs in test macro, automatically
It cuts off the power protection.
A method of using the CVC-200T hardware intelligent test system, the host computer test software process
The following steps are included:
Step 1 starts and logs in upper computer software；
Step 2, according to board type and quantity, select tested board, option and installment tested board, if it is plant produced
Mode needs to scan and configure board sequence number, scanning and configures MAC Address, configuration RTC clock time, configuration debugging serial interface
IP address；If it is receiving inspection mode, need to read board sequence number, read board MAC Address, configuration the RTC clock time,
Configure debugging serial interface IP address；
Step 3, after board is loaded into test program, the numeral method " MLU " of board panel or " CMU " are upper
Machine can then start to test, then input test personal information, and length of testing speech is arranged；
Step 4,1 minute after test starts, observe board all LED and charactron working condition, and will observation knot
Fruit is recorded in report；
Step 5, during the test, each test item state of all tested boards of real time inspection, host computer is sentenced automatically
Break each test item state, and with clear eye-catching red or Green Marker test result, no matter normally stop test and also
It is to force to stop test, test result will be all automatically saved in the report of webpage version；
Step 6, test terminate, and factory mode is arranged to tested board, on site so as to board application.
Compared with prior art, the invention has the following advantages that
1, visual programming software LabVIEW of the system host computer test program based on NI, man-machine interface is more friendly,
Facilitate operation；
2, slave computer utilizes the test program of laboratory actual use, reduces development cost, secondary development period is shorter；
3, using modularized design, system maintainability is strong；
4, using high-performance equipment, system reliability is improved；
5, automatic test result automatically saves, and test dot coverage is higher, substantially increases testing efficiency and test essence
Degree, shortens commercialization process and time to market (TTM).
Detailed description of the invention
Fig. 1 is test system structure schematic diagram of the invention；
Fig. 2 is host computer test software flow chart of the invention；
Fig. 3 is MLU plate test report schematic diagram of the invention.
Specific embodiment
Technical solution in the embodiment of the present invention is carried out below clear, is fully described by, it is clear that described implementation
Example is a part of the embodiments of the present invention, rather than whole embodiments.Based on the embodiments of the present invention, ordinary skill
Personnel's every other embodiment obtained without making creative work all should belong to the model that the present invention protects
It encloses.
A kind of CVC-200T hardware intelligent test system of the present invention, including CVC-200T board slave computer test program, base
In the host computer test program of the visual programming software LabVIEW of NI, tested board (including primary logical unit MLU plate, communication
Administrative unit CMU plate), auxiliary boards (220VAC power supply dispensing unit EDU-220 plate), NI PXI cabinet and mating board, net
Network load board, industrial personal computer, gigabit switch, display/keyboard mouse/scanner etc..Industrial personal computer by with NI PXI-PCI
8360 board communications control other boards in NI cabinet, and two blocks of 8512 plates of PXI are connected by 100 meters of CAN transmission lines and CMU plate
It connects, 8431 plate of PXI is connect with CMU plate carries out RS422 serial communication, and 6509 digital I/O board of PXI connect simulation fan with MLU plate
Signal connect simulation train with CMU plate and manipulates ATO signal automatically, and DATAPLUG (EEPROM) is connect with MLU and CMU plate.Industry control
Machine, gigabit switch, network load plate, tested board MLU and CMU plate are sequentially connected, and upper computer software, quilt are run on industrial personal computer
Slave computer software is run on drafting board card.Tested board is communicated by debugging serial interface with upper computer software, industrial personal computer and tested
Board MLU and CMU plate carries out network communication by interchanger, network load plate, and host computer sends control command and receives tested
The test data of board MLU and CMU plate feedback, judges automatically test result.Display, keyboard and mouse, scanner and industrial personal computer
Connection, display and keyboard and mouse can carry out human-computer interaction, and scanner can be believed with typing tested board two dimensional code and MAC Address
Breath.
Slave computer, which has, uploads all tested board inside/outsides portion precision of timer, FLASH file system TFFS0/TFFS1/
TFFS2 read-write, the read-write of EEPROM (on small buckle FLASH) interface, reads slot position address, M-LVDS at the read-write of DATAPLUG interface
The function of high-speed serial bus test result can judge automatically test result, and be sent by debugging serial interface to host computer and be shown.
Slave computer has all 100,000,000/gigabits of tested board work network interface packet sending and receiving test function, can will test number
Send according to by gigabit switch, network load plate to host computer, host computer relays to slave computer after receiving, by slave computer into
Row judge automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown.
Slave computer has tested board CMU plate RS422 serial ports packet sending and receiving test function, test data can be passed through NI
Whether 8431 plate of PXI is sent to host computer, and host computer relays to slave computer after receiving, judged automatically and lost by slave computer
Packet, error code, test result is finally sent by debugging serial interface to host computer show.
Slave computer has CAN mouthfuls of packet sending and receiving test functions of tested board CMU plate, test data can be passed through 100 meters
CAN transmission line connection 8512 plate of NI PXI send to host computer, host computer relays to slave computer after receiving, by slave computer into
Row judge automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown.
Host computer has the function of that tested board CMU panel vehicle manipulates ATO interface testing, MLU plate fan interface test automatically
Pulse test signal can be sent by 6509 digital I/O board of NI PXI to slave computer, be judged automatically by slave computer by function
Whether frequency meets the requirements, and finally send to host computer test result by debugging serial interface and shows.
Slave computer has all tested board FPGA/ hardware/driving/BSP version number readback test functions, by test data
It is sent by debugging serial interface to host computer, is carried out judging automatically test result according to configuration file by host computer.
Slave computer has the function of all tested board sequence number programmings and readback contrastive test, by sequence number programming to plate
On, then by readback to test data sent by debugging serial interface to host computer, carried out judging automatically test result by host computer.
Slave computer has tested board MLU plate ECC status monitoring, USB interface read-write, board 5V/3.3V/1.8V/1.0V/
1.1V/0.9V supply voltage supervision, RTC clock, temperature sensor, hardware clock synchronization, NVRAM readwrite tests function, can
Test result is judged automatically, and is sent by debugging serial interface to host computer and is shown.
Host computer has login interface, and by inputting effective user name, this test macro just can be used in password.It logs in
While success, TFTP software is called directly, and minimize, loads board slave computer test program for network.
Host computer has board selection function, can be selected and multinomial selection with individual event.Selected board is surveyed parallel
Examination, board all of the above test item are also tested parallel.It at most can once test six blocks of MLU plates, two blocks of CMU plates.
Host computer has board configuration feature, is divided into plant produced mode and receiving inspection mode.Plant produced mode tool
Standby following function: it is scanned with scanner and inputs and configure the sequence number in board panel two dimensional code, scanning inputs and configures board
MAC Address, configuration RTC clock time, configuration debugging serial interface IP address；Receiving inspection mode has following function: reading board
Sequence number reads board MAC Address, configuration RTC clock time, configuration debugging serial interface IP address.The sequence number being configured on plate
Readback is wanted, carries out automatic comparison with the sequence number of scanning input.
Host computer has setting factory mode capabilities, and according to configuration file, the IP address of board and starting row information are set
It is set to factory state, and writes one 32 check words inside NVRAM.
Host computer, which has, starts test function, sends test initiation command, and receive the test data of slave computer upload, directly
It is finished to cycle tests, test can just terminate.It supports input test personnel name or work number, supports setting length of testing speech.
In test process, interface real-time display timing and remaining time information.
Host computer has the function of each test item test details of all tested boards of real time inspection, including test item
Current testing time, errors number, packet loss number, software/hardware error code and test result, test result are that red represent is surveyed
Examination failure (the case where test crash: generates error code in 1. test process；2. the testing time of any one test item be 0),
Green represents test and passes through.It can also look at the various version/part number/sequence number/titles of board, testing setup duration, test
Execute the information such as time, tester.
Host computer has the function of that test report automatically saves, and test report content is consistent with real-time query interface, test report
Announcement format is webpage version, the naming rule of test report: board title+sequence number+testing time+PASS/FAIL.
Host computer have board panel leds observing interface, can recorde each LED light position and charactron flashing or
Whether the state being always on is correct, is finally integrated into state in one test report with other test items.
Host computer first has to shake hands, after shaking hands successfully, can be tested, be held before starting to test or configure
Hand time-out then exits epicycle operation.Also, to avoid board from crashing, test still through the case where occur, system every five seconds week
Phase property checks the data that board reports.
Test macro can be safe and stable operation for a long time 48 hours or more.Test macro is if there is short circuit or exception
When situation, protection can be automatically cut off the power.
Specific embodiment is as follows
As shown in Figure 1, industrial personal computer is by controlling other boards in NI cabinet with 8360 board communications of NI PXI-PCI,
Two blocks of 8512 plates of PXI are connect by 100 meters of CAN transmission lines with CMU plate, and 8431 plate of PXI is connect with CMU plate carries out RS422 string
Port communications, 6509 digital I/O board of PXI are connect for simulating fan signal with MLU plate, are connect with CMU plate for simulating train certainly
Dynamic manipulation ATO signal, DATAPLUG (EEPROM) are connect with MLU and CMU plate.Industrial personal computer, gigabit switch, 100 rice noodles of simulation
Long 100,000,000/gigabit networking load board, tested board MLU/CMU plate are sequentially connected, and upper computer software is run on industrial personal computer, are tested
Slave computer software is run on board.Tested board is communicated by debugging serial interface with upper computer software, industrial personal computer and Board Under Test
Block MLU/CMU plate and network communication is carried out by interchanger, network load plate, host computer sends control command and receives tested board
The test data of MLU/CMU plate feedback, judges automatically test result.Display, keyboard and mouse, scanner and industrial personal computer connect,
Display and keyboard and mouse can carry out human-computer interaction, and scanner can be with typing tested board two dimensional code and mac address information.
As shown in Fig. 2, starting and logging in upper computer software, according to board type and quantity, tested board is selected, selection is matched
Tested board is set, if it is plant produced mode, needs to scan and configure board sequence number, scanning and configures MAC Address, configuration
RTC clock time, configuration debugging serial interface IP address；If it is receiving inspection mode, needs to read board sequence number, reads board
MAC Address, configuration RTC clock time, configuration debugging serial interface IP address.After board is loaded into test program, board panel
Numeral method " MLU " or " CMU ", host computer can then start to test, then input test personal information, when setting is tested
It is long.1 minute after test starts, the working condition of board all LED and charactron can be observed, and observation result is recorded
In report；During the test, it can be judged automatically respectively with each test item state of all tested boards of real time inspection, host computer
A test item state, and with clear eye-catching red or Green Marker test result.No matter normally stop test or it is strong
Stop is only tested, and test result will be all automatically saved in the report of webpage version.Finally factory mode can be set to board, so as to
Board application is on site.
As shown in figure 3, concurrent testing, test item include all test items of MLU plate simultaneously
1.EEPROM；2.DATAPLUG；3.NVRAM；4.TFFS0；5.TFFS1；6.TFFS2；7.USB0；8.USB1；
9.TIMER0；10.TIMER1；11.TIMER2；12.TIMER3；13.SYNC TIMER；14.RTC；15. voltage sensor；16.
Temperature sensor；17.NET1；18.NET2；19.NET3；20.M-LVDS0；21.M-LVDS1；22. fan 0；23. fan 1；
24.ACT/LINKLED；25. charactron.
If the corresponding board title of the panel numeral method of MLU and CMU, indicate board program of lower computer load at
Function, when the LINK LED on panel is always on, ACT LED often dodges, and indicates that board network communication is normal.Pass through the indicator light of host computer
LED and digital tubular state can be recorded in test report automatically for observing interface.
EEPROM, DATAPLUG, NVRAM are tested, slave computer every five seconds wipes the data of all sevtor address, then
Test data is written, and read data check whether it is consistent with the data of write-in, read and write it is consistent indicate to test passes through, otherwise test
Do not pass through, slave computer judges automatically test result and result is then transmitted to host computer record.
TFFS0/TFFS1/TFFS2/USB0/USB1 is tested, slave computer is to file system TFFS0/TFFS1/
File is written in TFFS2/USB0/USB1, and reads file and carry out BCC verification (exclusive or check), and verification is passed through by expression test,
Otherwise it tests and does not pass through, slave computer judges automatically test result and result is then transmitted to host computer record.
Precision of timer is tested, it is periodically accurate that timer internal and external timer verifys mutually by Interruption
Property, 1/50th expression that relative error is less than or equal to timed interval, which is tested, to be passed through, and it otherwise tests and does not pass through, slave computer
It judges automatically test result and result is then transmitted to host computer record.
Synchronised clock is tested, clock synchronism detection is done in the two boards card interconnection of adjacent conduit, and synchronised clock is in 2ms
The Counter Value in disconnected period, the counter difference values between interruption should be 1000 twice in succession, and error range is [- 5 ,+5], in model
It encloses interior expression test to pass through, otherwise tests and do not pass through, slave computer judges automatically test result and result is then transmitted to host computer note
Record.
Supply voltage supervision to be tested, slave computer monitors supply voltage 5V/3.3V/1.8V/1.0V/1.1V/0.9V, when
When voltage is over-voltage or under-voltage (deviation range for exceeding voltage ± 5%), slave computer can be notified in a manner of logical break
Host computer.
Temperature sensor is tested, the board temperature read is transmitted to host computer by slave computer, and host computer is to temperature value
It is judged automatically, threshold value upper and lower limits are that foundation is defined, and is recorded in configuration file with empirical value.
Gigabit networking is tested, it is desirable that 512 byte of data packet length, in the case of transmission 20KB per second, not packet loss, do not miss
Code, expression test pass through, otherwise test and do not pass through, and slave computer judges automatically test result and result is then transmitted to host computer note
Record.
For M-LVDS0/M-LVDS1 bus test, the two boards card of adjacent conduit mutually sends out bus data and control signal,
When there is packet loss/error code, indicate that test does not pass through, otherwise test passes through, and slave computer judges automatically test result and then passes result
It is recorded to host computer.
For FPGA/BSP/ driving/hardware version numbers test, slave computer is read in version number information, with configuration file
Anticipated release is consistent, indicates that test passes through, otherwise tests and do not pass through, host computer judges automatically test result and then is transmitted to result
Host computer record.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or replace
It changes, these modifications or substitutions should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with right
It is required that protection scope subject to.
Claims (10)
1. a kind of CVC-200T hardware intelligent test system, which is characterized in that the test macro includes tested board, NI PXI machine
Case and mating board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, wherein Board Under Test
Card includes primary logical unit MLU plate and communications management unit CMU plate；
The industrial personal computer connects tested board by NI PXI cabinet and mating board, and the industrial personal computer passes sequentially through gigabit
Interchanger, network load plate and tested board carry out network communication, and the display, keyboard and mouse, scanner are separately connected
Industrial personal computer；
The industrial personal computer is host computer, runs the host computer test program of the visual programming software LabVIEW based on NI；Institute
The tested board stated is slave computer, runs CVC-200T board slave computer test program；The industrial personal computer sends control command
To tested board and receive tested board feed back test data, judge automatically test result；The display and keyboard mouse
Mark is used for the two dimensional code and mac address information of typing tested board for carrying out human-computer interaction, the scanner.
2. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the NI PXI
Cabinet and mating board include 8360 plate of NI PXI-PCI, two blocks of 8512 plates of PXI, 8431 plate of PXI, 6509 Digital I/O of PXI
Plate and memory DATAPLUG；
The industrial personal computer is separately connected two blocks of 8512 plates of PXI, 8431 plate of PXI, PXI by 8360 plate of NI PXI-PCI
6509 digital I/O boards, two blocks of 8512 plates of PXI connect CMU plate, 8431 plate of the PXI connection by CAN transmission line
CMU plate is used for RS422 serial communication, and 6509 digital I/O board of PXI connects MLU plate, described for simulating fan signal
6509 digital I/O board of PXI connect CMU plate, manipulate ATO signal, the memory DATAPLUG automatically for simulating train
It is separately connected MLU plate and CMU plate.
3. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the slave computer
Read and write with upload all tested board inside/outsides portion precision of timer, FLASH file system TFFS0/TFFS1/TFFS2,
The read-write of DATAPLUG interface, EEPROM interface read-write, the function for reading slot position address and M-LVDS high-speed serial bus test result
Can, and test result can be judged automatically, it is sent by debugging serial interface to host computer and is shown；
The slave computer has all 100,000,000/gigabits of tested board work network interface packet sending and receiving test function, can will test
Data are sent by gigabit switch, network load plate to host computer, and host computer relays to slave computer after receiving, by slave computer
Judged automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown；
The slave computer has tested board CMU plate RS422 serial ports packet sending and receiving test function, can pass through test data
8431 plate of NI PXI is sent to host computer, and host computer relays to slave computer after receiving, by slave computer judged automatically whether
Packet loss, error code, test result is finally sent by debugging serial interface to host computer show；
The slave computer has CAN mouthfuls of packet sending and receiving test functions of tested board CMU plate, test data can be passed through CAN
Transmission line connection 8512 plate of NI PXI is sent to host computer, and host computer relays to slave computer after receiving, and is carried out certainly by slave computer
It is dynamic to judge whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown；
The slave computer has all tested board FPGA/ hardware/driving/BSP version number readback test functions, will test number
It send according to by debugging serial interface to host computer, is carried out judging automatically test result according to configuration file by host computer；
The slave computer has the function of all tested board sequence number programmings and readback contrastive test, by sequence number programming to plate
On, then by readback to test data sent by debugging serial interface to host computer, carried out judging automatically test result by host computer；
The slave computer has tested board MLU plate ECC status monitoring, USB interface read-write, board 5V/3.3V/1.8V/
1.0V/1.1V/0.9V supply voltage supervision, RTC clock, temperature sensor, hardware clock synchronization and NVRAM readwrite tests function
Can, test result can be judged automatically, and send by debugging serial interface to host computer and show.
4. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
Have the function of that tested board CMU panel vehicle manipulates ATO interface testing, MLU plate fan interface test function automatically, it can be by pulse
Test signal is sent by 6509 digital I/O board of NI PXI to slave computer, is carried out judging automatically whether frequency conforms to by slave computer
It asks, finally test result is sent by debugging serial interface to host computer and is shown.
5. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
With login interface, by inputting effective user name, this test macro is just can be used in password, while logining successfully, directly
It connects and calls TFTP software, and minimize, load board slave computer test program for network；
The host computer has board selection function, including individual event selection and multinomial selection, selected board carry out parallel
Test, board all of the above test item are also tested parallel, at most test six blocks of MLU plates and two blocks of CMU plates simultaneously.
6. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
With board configuration feature, including plant produced mode and receiving inspection mode；
The function that the plant produced mode has includes: to be scanned to input and configure in board panel two dimensional code with scanner
Sequence number, scanning input and configure board MAC Address, configuration RTC clock time, configuration debugging serial interface IP address；
The function that the receiving inspection mode has includes: when reading board sequence number, reading board MAC Address, configuration RTC
Clock time, configuration debugging serial interface IP address；The sequence number being configured on plate wants readback, and carries out certainly with the sequence number of scanning input
It is dynamic to compare.
7. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
With setting factory mode capabilities, according to configuration file, factory state is set by the IP address of board and starting row information, and
One 32 check words are write inside NVRAM.；
The host computer, which has, starts test function, sends test initiation command, and receive the test data of slave computer upload,
Until cycle tests is finished, test can just be terminated, and the host computer supports input test personnel name or work number, be supported
Length of testing speech is set；In test process, interface real-time display timing and remaining time information.
8. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
Have the function of all tested boards of real time inspection each test item test details, including the current testing time of test item,
Errors number, packet loss number, software/hardware error code and test result, test result are that red represents test crash, green generation
Table test passes through；The host computer have check the various version/part number/sequence number/titles of board, testing setup duration,
The function of test execution time and tester's information；
The host computer has the function of that test report automatically saves, and test report content is consistent with real-time query interface, test
Reporting format is webpage version, the naming rule of test report: board title+sequence number+testing time+PASS/FAIL.
9. a kind of CVC-200T hardware intelligent test system according to claim 2, which is characterized in that the host computer
With board panel leds observing interface, the observing interface records each LED light position and charactron flashing or is always on
State it is whether correct, finally state is integrated into a test report with other test items；
The host computer first has to shake hands, after shaking hands successfully, can be tested before starting to test or configure,
It shakes hands time-out, then exits epicycle operation；The data that the test macro every five seconds periodic test board reports are to avoid generation
Board crash, test still through the case where；
Described test macro stable operation 48 hours or more；When short circuit or abnormal conditions occurs in test macro, automatically cut off
Power protection.
10. a kind of method using CVC-200T hardware intelligent test system as claimed in claim 2, which is characterized in that described
Host computer test software process the following steps are included:
Step 1 starts and logs in upper computer software；
Step 2, according to board type and quantity, select tested board, option and installment tested board, if it is plant produced mould
Formula needs to scan and configure board sequence number, scanning and configures MAC Address, configuration RTC clock time, configuration debugging serial interface IP
Address；If it is receiving inspection mode, needs to read board sequence number, read board MAC Address, the configuration RTC clock time, match
Set debugging serial interface IP address；
Step 3, after board is loaded into test program, the numeral method " MLU " of board panel or " CMU ", host computer is then
It can start to test, then input test personal information, length of testing speech is set；
Step 4,1 minute after test starts, observe board all LED and charactron working condition, and will observation result note
It records in report；
Step 5, during the test, each test item state of all tested boards of real time inspection, host computer judges automatically respectively
No matter a test item state, and with clear eye-catching red or Green Marker test result normally stops testing or strong
Stop is only tested, and test result will be all automatically saved in the report of webpage version；
Step 6, test terminate, and factory mode is arranged to tested board, on site so as to board application.
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