CN109326508B

CN109326508B - Method for wet processing wafer edge

Info

Publication number: CN109326508B
Application number: CN201811125196.1A
Authority: CN
Inventors: 姚大平
Original assignee: National Center for Advanced Packaging Co Ltd
Current assignee: National Center for Advanced Packaging Co Ltd
Priority date: 2018-09-26
Filing date: 2018-09-26
Publication date: 2021-01-08
Anticipated expiration: 2038-09-26
Also published as: CN109326508A

Abstract

The invention discloses a method for wet processing of wafer edges, which comprises the following steps: placing a wafer in a wet processing chamber of a semiconductor device; the upper outer cover moves downwards and covers the lower outer cover, and the upper sealing ring and the lower sealing ring respectively contact the upper surface and the lower surface of the wafer and form sealing, so that the edge area of the wafer is isolated from the central area; introducing a first wet processing fluid into the wet processing cavity; after a predetermined time, the supply of the first wet processing fluid is cut off, and an inert gas is introduced into the wet processing chamber.

Description

Method for wet processing wafer edge

Technical Field

The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a method for selectively processing different parts of the surface of a wafer, and specifically relates to a method for processing the edge of the wafer only by a wet process.

Background

With the development of miniaturization, integration and intellectualization of electronic products, the complexity of integrated circuit chips is greatly increased. In the fabrication of integrated circuits, the edge processing requirements vary from one hundred different process tools to another. Even if the same type of product or even the same product is defined with the same margin size in the program, there is inevitably an unrepeatability of the wafer placement position during the transfer and transportation of the wafer, and the result is uncertainty of the edge area process and the product yield.

The edge geometry is significantly different from the center, and the results obtained from the center and edge regions of the wafer under the same process conditions may be significantly different. For example, plasma density, current density, gas flow rate, pressure, contact temperature with the backside substrate, temperature control of the wafer, temperature gradients, etc., in various related process flows.

Generally, each process does not have a specific treatment for the edge area, and a wafer is prepared by one process, which results in the wafer edge being easily subjected to residues or defects, such as film residues, etching residues, foreign particles, pitting reactants, mechanical wear stains, and the like.

Therefore, in order to improve the yield of wafer chips, the processing of the wafer edge becomes very important in advanced integrated circuit manufacturing. With the great research and development of edge engineering, new equipment, equipment accessory fixtures, fine-scribing process methods, new materials and the like in the edge area are considered, and the purpose is to improve the product yield of the edge.

Disclosure of Invention

In view of the technical problems in the prior art, according to an aspect of the present invention, there is provided a method for wet processing an edge of a wafer, including:

placing a wafer in a wet processing cavity of a semiconductor device, wherein the semiconductor device comprises an upper outer cover, the upper outer cover comprises an upper outer cover inner wall, a top outer shell and an upper outer cover outer wall, the top outer shell covers the upper end of the upper outer cover inner wall and the upper end of the upper outer cover outer wall to form an upper cavity, and an upper sealing ring is arranged at the bottom end of the upper outer cover inner wall; the lower outer cover comprises a lower outer cover inner wall, a lower outer shell and a lower outer cover wall, the lower outer shell is connected with the bottom ends of the lower outer cover inner wall and the lower outer cover outer wall to form a lower cavity, a lower sealing ring is arranged at the top end of the lower outer cover inner wall, and the upper cavity and the lower cavity form a treatment cavity; the fluid pipeline enters the upper cavity along the outer wall or the inner wall of the semiconductor device, and the wafer is placed on the lower sealing ring at the top end of the inner wall of the lower outer cover;

the upper outer cover moves downwards and covers the lower outer cover, and the upper sealing ring and the lower sealing ring respectively contact the upper surface and the lower surface of the wafer and form sealing, so that the edge area of the wafer is isolated from the central area;

introducing a first wet processing fluid into the wet processing cavity; and

after a predetermined time, the supply of the first wet processing fluid is cut off, and an inert gas is introduced into the wet processing chamber.

In one embodiment of the present invention, the second wet processing fluid is introduced into the wet processing chamber, after a predetermined time, the supply of the second wet processing fluid is cut off, and the inert gas is introduced into the wet processing chamber.

In one embodiment of the invention, the flow rate of the inert gas is varied to speed up the drying process of the wafer surface.

In one embodiment of the invention, the second wet processing fluid is pure water.

In one embodiment of the invention, the first wet processing fluid is a liquid.

In one embodiment of the invention, the first wet processing fluid is a gas-liquid two-fluid, and the mixing ratio of the gas-liquid two-fluid is adjusted by adjusting the flow rate of the liquid and/or the flow rate of the compressed gas through a three-way valve arranged on a fluid pipeline, wherein the three-way valve comprises a liquid input port, a gas input port and a gas-liquid two-fluid output port, and the liquid and the compressed gas enter the three-way valve through the liquid input port and the gas input port respectively and are mixed to form the gas-liquid two-fluid and then enter the cleaning liquid pipeline.

In one embodiment of the invention, the flow rate of the gas and liquid two fluids is controlled by adjusting the flow of the gas input port, so that the pulse scouring effect is realized on the surface of the wafer during cleaning or etching.

In one embodiment of the invention, the fluid conduit is provided with one or more nozzles at the end within the upper chamber through which the first wet processing fluid is sprayed onto the surface of the wafer.

In one embodiment of the invention, the nozzle is rotated to spray the wet processing fluid onto the surface of the wafer in different directions.

In one embodiment of the invention, the method further comprises moving the upper chamber upward after the wet processing is completed, so as to take out the dried wafer from the chamber.

The process method of the accurate wet processing can be used in a plurality of process steps of chip manufacturing, the cleanness of the edge of the wafer is ensured from the source, cross contamination generated in the process is avoided, the yield of the edge chip is improved, and the possibility that edge residue/defect pollutes the inside of the wafer is reduced.

Drawings

To further clarify the above and other advantages and features of embodiments of the present invention, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. In the drawings, the same or corresponding parts will be denoted by the same or similar reference numerals for clarity.

Fig. 1 illustrates a cross-sectional schematic view of a semiconductor device 100 for precision wet processing a wafer edge in accordance with one embodiment of the present invention.

FIG. 2 illustrates a top view of an upper housing and fluid conduit according to one embodiment of the present invention.

Figure 3 further illustrates a partial top view of the upper chamber top cap and fluid conduit according to one embodiment of the present invention.

Fig. 4 shows a schematic cross-sectional view of a semiconductor device with upper and lower cavities separated according to an embodiment of the present invention.

FIG. 5 shows a flow diagram of a method for wet processing a wafer edge in accordance with one embodiment of the present invention.

Detailed Description

In the following description, the invention is described with reference to various embodiments. One skilled in the relevant art will recognize, however, that the embodiments may be practiced without one or more of the specific details, or with other alternative and/or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of embodiments of the invention. Similarly, for purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the embodiments of the invention. However, the invention may be practiced without specific details. Further, it should be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.

Reference in the specification to "one embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment.

In the fabrication of integrated circuits, the common residue/defect in the edge region of the wafer mainly includes the following:

1. no clean metal and dielectric film residue is removed;

2. foreign objects such as chemical reagents for thinning and polishing and solid-liquid residues in cleaning liquid;

3. etching, cleaning the residue or reaction product;

4. embedding foreign matters on the surface;

5. burrs, pits, or particles from mechanical abrasion of the wafer edges during transport.

Therefore, wet processes such as etching or cleaning are additionally required at the edge of the wafer to ensure that the chip process integration is not affected by edge residue/defects. On the other hand, the central portion of the wafer is in a clean state and does not need to be subjected to a wet processing process, because the central portion of the wafer may adversely affect the surface of the chip if subjected to the wet processing.

The invention provides a semiconductor device for precise wafer edge wet processing and a matched process method thereof. The precision wafer edge wet processing semiconductor device and the corresponding method provided by the invention can be applied to a plurality of process steps of chip manufacturing. By accurately processing the edge area, the cleanness of the edge of the wafer can be ensured, the cross contamination is avoided, the rejection rate of edge chips is reduced, and the chips in the central area are prevented from being polluted by edge residues/defects. The equipment and the process method for precisely etching/cleaning the edge of the wafer not only bring the advantage of increasing the yield of chips, but also have low additional cost because less wet processing solution is needed.

Fig. 1 illustrates a cross-sectional schematic view of a semiconductor device 100 for precision wet processing a wafer edge in accordance with one embodiment of the present invention. As shown in fig. 1, the semiconductor device 100 includes an upper housing 110, a lower housing 120, a fluid conduit 130, and a nozzle 140.

The upper housing 110 may include an upper housing inner wall 111, a top housing 112, and an upper housing outer wall 113. The top housing 112 covers the top ends of the housing inner wall 111 and the upper housing outer wall 113 to form an upper cavity. The lower end of the upper housing inner wall 111 is provided with an upper seal ring 114. The upper sealing ring 114 may be an O-ring having waterproof, acid-proof, or high temperature-proof properties. Generally, for a 12 "wafer, an upper housing inner wall of 147 mm diameter and an upper seal ring of the same size may be selected, since the edge of the wafer is typically left within 3 mm margins.

The fluid conduit 130 may be introduced into the upper chamber from an outer wall or an inner wall of the semiconductor device 100. The fluid conduit 130 is provided at its distal end with a plurality of nozzles 140 for uniformly spraying the fluid on the edge surface of the wafer to be processed.

FIG. 2 illustrates a top view of an upper housing and fluid conduit according to one embodiment of the present invention. As shown in fig. 2, the upper housing 210 may include an upper housing inner wall 211, a top housing, and an upper housing outer wall 213. The fluid conduit 230 enters the upper chamber in four ways along the outer wall of the upper housing 210, with a nozzle at the end of each way. An upper seal ring is attached to the bottom end of the upper housing inner wall 211.

In some embodiments of the invention, an upper chamber cover is disposed within the upper housing. In the embodiment shown in FIG. 1, upper chamber top cover 115 is a flat plate that is disposed over nozzle 140. Figure 3 further illustrates a partial top view of the upper chamber top cap and fluid conduit according to one embodiment of the present invention. As shown in FIG. 3, one end of upper chamber top cap 315 may be secured to upper housing inner wall 311. The nozzle 340 passes through the upper chamber top cap 315 into the upper chamber body. The upper cavity top cover mainly has the function of preventing working fluid from splashing out of the cavity body. One or more through holes 316 may also be provided in the upper chamber top cover 315. The through hole 316 may be a slanted hole. In the actual working process, the fine through holes ensure that the edge chamber and the inner area of the wafer are kept at the same air pressure, and the wafer is prevented from being damaged due to different internal and external pressures in the chamber.

Although in the embodiment shown in fig. 3, four nozzles 340 are provided at the end of the fluid conduit, and the four nozzles are evenly distributed in the upper chamber, it will be understood by those skilled in the art that in other embodiments of the present invention, more or fewer nozzles may be provided at the end of the fluid conduit, for example, the number of nozzles may be 3-6, and each nozzle may be rotated at any angle. The fluid conduit distributes the fluid evenly to each nozzle.

Returning to fig. 1, the lower housing 120 may include a lower housing inner wall 121, a lower housing 122, and a lower housing outer wall 123. The lower housing 122 connects the bottom ends of the housing inner wall 121 and the lower housing outer wall 123 to form a lower cavity. The top end of the lower housing inner wall 121 is provided with a lower seal ring 124. The lower seal ring 124 may be an O-ring having waterproof, acid-proof, or high temperature-proof properties. The lower housing 120 may also include a liquid outlet 125. The liquid outlet 125 may be disposed at the bottom or side of the lower chamber and connected to a pipe for discharging or collecting waste liquid. The lower housing inner wall 121 is lower in height than the lower housing outer wall 123.

The upper housing is movable up and down along the Z-axis during use of the semiconductor device. Fig. 4 shows a schematic cross-sectional view of a semiconductor device with upper and lower cavities separated according to an embodiment of the present invention. When the upper housing 410 is moved upward, the chamber is opened to receive a wafer to be processed. The wafer 430 is fed into the chamber and rests on the lower seal 424 on the top of the inner wall of the lower housing. The lower seal 424 may have a diameter of between 125 and 147 millimeters. The larger the diameter of lower seal ring 424 and the smaller the edge cavity, the less etching/cleaning fluid is consumed. If the selective wet processing is directed to the edge of the backside of the wafer, the dimensions of the outer cover and the seal ring of the lower chamber are determined according to the size of the area to be processed. The upper housing 410 is then moved downward until the upper seal 414 contacts the surface of the wafer 430, at which point the wafer edge wet processing chamber is completely isolated from the wafer interior region. Typically, the top of the lower housing outer wall 423 is above the upper surface of the wafer 430.

After the wafer to be processed is placed, the upper outer cover moves downwards and covers the lower outer cover, the upper sealing ring and the lower sealing ring respectively contact the upper surface and the lower surface of the wafer and form sealing, and therefore the upper cavity and the lower cavity are combined to form the wet processing cavity. The size of the wet processing cavity is determined by the size of the upper cavity sealing ring and the lower cavity sealing ring.

The wet processing chamber isolates the edge region from the center region of the wafer. The lower housing outer wall 423 may be in contact with an upper chamber top cover, for example, that is attached to the inside of the lower housing outer wall 423. The lower housing outer wall 423 may also be spaced a distance from the upper chamber top cover.

Materials that may be used to make the upper and lower housings include: aluminum alloy, aluminum alloy with protective coating on the surface, other metal alloy with heat and corrosion resistance, high-cleanness PVC, Teflon (for acid and alkali cleaning) or similar heat and corrosion resistant polymer materials.

In the process of wet processing by using the semiconductor device disclosed by the invention, after the wafer is tightly pressed and sealed by the upper and lower sealing rings, the wafer is in a static state in the cavity. The invention can rapidly wet the edge of the wafer without an expensive wafer rotating device.

In the embodiment of the invention, the front surface and the back surface of the wafer are respectively contacted with the upper O-shaped sealing ring and the lower O-shaped sealing ring, and the sizes of the upper O-shaped sealing ring and the lower O-shaped sealing ring can be selected according to actual requirements.

In the processing cavity, a pure liquid solution or a wet processing process of gas-liquid two fluids can be adopted. A three-way valve 135 may be provided on a fluid line connected to the processing chamber and may include a liquid input port, a gas input port, and a gas-liquid two-fluid output port. The liquid and the compressed gas respectively enter the three-way valve through the liquid inlet and the gas inlet and are mixed to form a gas-liquid two-fluid, and then enter the cleaning liquid pipeline. The mixing proportion of the gas-liquid two fluids can be adjusted by adjusting the flow rate of the liquid or the flow rate of the compressed gas.

The wet processing fluid is introduced into the processing cavity through the nozzle arranged in the upper cavity, the nozzle can rotate randomly, the nozzle can be controlled to rotate by the outside, and a freely rotating spray head can also be selected to rotate randomly along with the pressure change of the fluid. The freely rotating spray head has relatively low cost, and a plurality of smaller spray nozzles can be arranged at the outlets of the spray nozzles, so that the fluid can cover the edge surface of the wafer at the highest speed.

The valve of the waste liquid outlet is closed, the edge chamber can be filled, and the edge of the wafer can be soaked in the wet solution.

The flow rate of the second fluid can be controlled by adjusting the flow of the inert gas; through the change of the flow rate of the two fluids, the pulse impact on the wet wafer surface is obtained, and the wet processing speed is increased.

The spent wet processing solution may be collected by a separate recovery tank after passing out of the edge chamber.

First, at step 510, a wafer is placed in an edge wet processing chamber of a semiconductor device for precision wet processing of an edge of the wafer. The wafer edge may be left with residual films, defects, etc. from the front end of the process. Specifically, the upper housing is first moved upward and the chamber is opened to receive the wafer to be processed. The wafer is fed into the chamber and placed on the lower sealing ring at the top end of the inner wall of the lower housing. The lower seal diameter may be some dimension between 125 and 147 millimeters. The larger the lower seal ring diameter, the smaller the edge cavity, and the less etching/cleaning fluid is consumed.

At step 520, the upper housing is moved downward and over the lower housing, and the upper and lower seal rings contact the upper and lower surfaces of the wafer, respectively, and form a seal, thereby isolating the edge region of the wafer from the center region. The edge of the wafer is within an edge wet processing chamber of the semiconductor device, and the central region of the wafer is outside the edge wet processing chamber.

At 530, a wet processing fluid is introduced into the wet processing chamber through the fluid conduit and the nozzle.

In embodiments of the present invention, the composition and ratio of the desired fluids may be selected according to specific wet processing requirements. Pure liquid solution or gas-liquid two fluids can be used as the wet processing fluid. When the gas-liquid two-fluid is used as the wet processing fluid, the mixing proportion of the gas-liquid two-fluid is adjusted by adjusting the flow rate of the liquid and/or the flow rate of the compressed gas through a three-way valve arranged on a fluid pipeline. The three-way valve comprises a liquid input port, a gas input port and a gas-liquid two-fluid output port. The liquid and the compressed gas respectively enter the three-way valve through the liquid inlet and the gas inlet and are mixed to form a gas-liquid two-fluid, and then enter the cleaning liquid pipeline.

The wet processing process of the present invention can be applied to a cleaning process, an etching process, and the like. Specifically, for the residual film on the edge being a dielectric material film containing silicon, such as silicon oxide, silicon nitride, silicon oxynitride, etc., the etching solution can be a dilute hydrofluoric acid solution, and the concentration of the dilute hydrofluoric acid can be 0.1-2 vol.% according to the thickness of the residual film.

For the condition that the edge of the wafer has residual glue, the following types of cleaning solutions can be selected according to the composition of the residual glue and the size of a pollution area: 1) 1-methyl-2-pyrrolidone (C) can be selected₅H₉NO) similar organic solutions; 2) dilute alkaline solution, such as 2-3% KOH or NaOH solution, can be adopted, and the dilute alkaline solution is heated to more than 60 ℃ usually, so that the use effect is better; 3) custom formulated solutions may be used, such as EKC800, AZ100, and the like.

If the residual film is a metal film and cannot be removed completely in the etching process of copper and titanium, the etching solution can use nitric acid (or phosphoric acid and sulfuric acid) and hydrogen peroxide solution, and then dilute hydrofluoric acid is used for removing the titanium residual film. In some wet treatment processes, the three chemical reagents can be mixed together in proportion, and the content proportion of the components can also be determined according to the thickness of the residual copper and titanium film and the residual volume.

Pure water can be used as the cleaning solution for removing residual particles or foreign embedded impurities on the edge. And regulating the flow rate of nitrogen by using pure water-nitrogen two fluids, and flushing particles or other impurities by using pulses.

In some embodiments of the invention, when the gas-liquid two-fluid is adopted, the flow rate of the two-fluid is controlled by adjusting the air inflow, so that the pulse scouring effect is realized on the surface cleaning or etching of the wafer, and the wet processing time is shortened.

In some embodiments of the invention, the freely rotatable nozzles rapidly spray the cleaning/etching solution onto the wafer surface, with multiple nozzles simultaneously wetting the wafer edge.

At 540, the supply of wet processing fluid is shut off after a predetermined time of the process recipe is reached. While maintaining the inert gas flow rate or slightly increasing the inert gas flow rate.

Next, optionally, at step 550, the second wet processing liquid valve is opened and the wafer edge is processed using the second wet processing liquid. For example, the second wet processing liquid is pure water, and the wafer edge is cleaned with the pure water to remove the solution remaining from the previous wet processing.

At step 560, the second wet processing liquid valve is closed and the inert gas is kept flowing for a certain time to dry the wafer edge area. The wafer surface can be rapidly dried by varying the flow rate of the inert gas.

Finally, the upper chamber is moved upwards, and the outer robot takes out the dried wafer from the chamber.

The equipment and the process method for precisely etching/cleaning the edge of the wafer not only bring the advantage of increasing the yield of chips, but also have low additional cost because less wet processing solution is needed.

While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various combinations, modifications, and changes can be made thereto without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention disclosed herein should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A method for wet processing an edge of a wafer, comprising:

the upper outer cover moves downwards and covers the lower outer cover, the upper sealing ring and the lower sealing ring respectively contact the upper surface and the lower surface of the wafer and form sealing, the upper cavity and the lower cavity are combined to form a wet processing cavity, and only the edge of the wafer is sealed in the wet processing cavity, so that the edge area of the wafer is isolated from the central area;

introducing a first wet processing fluid into the wet processing cavity; and

2. The method of claim 1, wherein the second wet processing fluid is introduced into the wet processing chamber, and after a predetermined time, the supply of the second wet processing fluid is shut off and an inert gas is introduced into the wet processing chamber.

3. A method for wet processing an edge of a wafer as recited in claim 2, wherein the flow rate of the inert gas is varied to accelerate the drying process of the wafer surface.

4. The method of wet processing an edge of a wafer of claim 2, wherein the second wet processing fluid is pure water.

5. The method of wet processing an edge of a wafer of claim 1, wherein the first wet processing fluid is a liquid.

6. The method of claim 1, wherein the first wet processing fluid is a gas-liquid two fluid, and the mixing ratio of the gas-liquid two fluid is adjusted by adjusting the flow rate of the liquid and/or the flow rate of the compressed gas through a three-way valve disposed on the fluid conduit, wherein the three-way valve comprises a liquid input port, a gas input port, and a gas-liquid two fluid output port, and the liquid and the compressed gas enter the three-way valve through the liquid input port and the gas input port, respectively, and are mixed to form the gas-liquid two fluid, which then enters the cleaning solution conduit.

7. The method of claim 5, wherein the flow rate of the gas and liquid is controlled by adjusting the flow rate of the gas inlet to provide a pulse-cleaning action or an etching action on the wafer surface.

8. The method of wet processing an edge of a wafer of claim 1, wherein the fluid conduit is provided with one or more nozzles at an end within the upper chamber, the first wet processing fluid being sprayed through the nozzles onto the surface of the wafer.

9. The method of wet processing an edge of a wafer of claim 8, wherein the nozzle is rotated to spray the wet processing fluid onto the surface of the wafer in different directions.

10. The method of wet processing an edge of a wafer of claim 1 further comprising moving the upper chamber upward after wet processing is completed to remove the dried wafer from the chamber.