CN109273358A - The side wall lithographic method of wafer - Google Patents

The side wall lithographic method of wafer Download PDF

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Publication number
CN109273358A
CN109273358A CN201811007629.3A CN201811007629A CN109273358A CN 109273358 A CN109273358 A CN 109273358A CN 201811007629 A CN201811007629 A CN 201811007629A CN 109273358 A CN109273358 A CN 109273358A
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CN
China
Prior art keywords
side wall
wafer
lithographic method
crystal
round fringes
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Pending
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CN201811007629.3A
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Chinese (zh)
Inventor
朱轶铮
产斯飞
李全波
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Priority to CN201811007629.3A priority Critical patent/CN109273358A/en
Publication of CN109273358A publication Critical patent/CN109273358A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The present invention relates to a kind of side wall lithographic methods of wafer, it is related to semiconductor integrated circuit manufacturing technology, including side wall main etching technique and crystal edge treatment process, the crystal edge treatment process is to carry out technological operation to crystal round fringes, to compensate the defect that crystal round fringes are different from crystal circle center's etch rate in wafer side wall main etching technique, and side wall internal homogeneity is improved, and then improve wafer entirety homogeneity.

Description

The side wall lithographic method of wafer
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field more particularly to a kind of side wall lithographic methods of wafer.
Background technique
In semiconductor integrated circuit manufacturing technology, wafer side wall (spacer) etching is one of committed step.With collection At the development of circuit engineering, performance of semiconductor device to the sensibility of homogeneity in side wall (spacer uniformity) and It is required that also further increasing.
However, the side wall etching of wafer is thermally sensitive etching technics, temperature is to influence side wall internal homogeneity Main factor, but the temperature-controlling system of current etching machine bench (e.g., chamber ESC dual-zone/4-zone) is to wafer side The controlling of edge is poor, causes the thickness control of edge side wall extremely difficult, that is, the rate etched in side wall is inconsistent, This otherness is that side wall internal homogeneity is poor, and then the main reason for cause wafer entirety homogeneity poor.Fig. 1 a is existing Wafer thickness distribution schematic diagram after having the side wall of wafer in technology to etch, Fig. 1 b are brilliant after the side wall of wafer in the prior art etches Circle thickness coordinate figure, as seen in figure la and lb, the thickness of wafer cause uniform in wafer face in the distribution that center is thin, edge is thick Property is poor.
Therefore, in semiconductor integrated circuit manufacturing technology, it is badly in need of a kind of side wall lithographic method of wafer, to improve side wall Internal homogeneity, and then improve wafer entirety homogeneity.
Summary of the invention
The purpose of the present invention is to provide a kind of side wall lithographic method of wafer, the side wall lithographic method of the wafer includes side Wall main etching technique and crystal edge treatment process.
Further, the crystal edge treatment process is to carry out technological operation to crystal round fringes.
Further, the crystal edge treatment process is to carry out assisted etch process to crystal round fringes.
Further, the side wall lithographic method of the wafer is successively the following steps are included: side wall depositing operation, forms side Wall sedimentary;Assisted etch process is carried out to crystal round fringes, keeps crystal round fringes thickness thinning;And carry out side wall main etching work Skill.
Further, the side wall lithographic method of the wafer is successively the following steps are included: side wall depositing operation, forms side Wall sedimentary;Carry out side wall main etching technique;And assisted etch process is carried out to crystal round fringes, become crystal round fringes thickness It is thin.
Further, the assisted etch process is to be performed etching using fluorinated etching gas to crystal round fringes.
Further, the etching range of the assisted etch process is 5A~1000A.
Further, the crystal edge treatment process is polymer deposition process.
Further, the side wall lithographic method of the wafer is successively the following steps are included: side wall depositing operation, forms side Wall sedimentary;Polymer deposition process is carried out in crystal round fringes;And carry out side wall main etching technique.
Further, the gas deposited in the polymer deposition process is attached most importance to polymer gas.
Further, the thickness range of the polymer deposition process deposition is 0A~500A.
Further, the side wall edge is silicon nitride material, and the crystal edge treatment process is oxidation technology.
Further, the side wall lithographic method of wafer is successively the following steps are included: side wall depositing operation, it is heavy to form side wall Lamination;Oxidation technology is carried out to crystal round fringes;And carry out side wall main etching technique.
Further, the oxidation technology is to be aoxidized the silicon nitride material of crystal round fringes using oxygen-enriched class etching gas Form layer oxide film.
Further, the thickness range for the oxidation film that the oxidation technology is formed is 0A~100A.
In an embodiment of the present invention, the side wall lithographic method of the wafer provided passes through the side wall etching technics in wafer Middle increase crystal edge treatment process compensates for figure on wafer and is unevenly distributed and the wafer side because of caused by the reasons such as etching machine bench Edge and crystal circle center's etch rate different problems reach and improve side wall internal homogeneity, and then improve wafer entirety homogeneity Purpose.
Detailed description of the invention
Fig. 1 a is wafer thickness distribution schematic diagram after the side wall of wafer in the prior art etches.
Fig. 1 b is wafer thickness coordinate diagram after the side wall of wafer in the prior art etches.
Fig. 2 a is wafer thickness distribution schematic diagram after the side wall of the wafer of one embodiment of the invention etches.
Fig. 2 b is wafer thickness coordinate diagram after the side wall of the wafer of one embodiment of the invention etches.
Fig. 3 is the wafer schematic diagram of an embodiment.
Fig. 4 is that the side wall of the wafer of first embodiment of the invention etches flow chart.
Fig. 5 is that the side wall of the wafer of second embodiment of the invention etches flow chart.
Fig. 6 is that the side wall of the wafer of third embodiment of the invention etches flow chart.
Fig. 7 is that the side wall of the wafer of fourth embodiment of the invention etches flow chart.
Specific embodiment
Below in conjunction with attached drawing, clear, complete description is carried out to the technical solution in the present invention, it is clear that described Embodiment is a part of the embodiments of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, this field is general Logical technical staff's all other embodiment obtained under the premise of not making creative work belongs to what the present invention protected Range.
In one embodiment of the invention, a kind of side wall lithographic method of wafer is provided, the side wall lithographic method of the wafer includes Side wall main etching technique and crystal edge treatment process.The crystal edge treatment process is to carry out technological operation to crystal round fringes, with compensation The crystal round fringes defect different from crystal circle center's etch rate in wafer side wall main etching technique, and improve uniform in side wall Property, and then improve wafer entirety homogeneity.It is the present invention one using the side wall lithographic method of wafer provided by the present application, such as Fig. 2 a Wafer thickness distribution schematic diagram after the side wall etching of the wafer of embodiment, such as the side wall for the wafer that Fig. 2 b is one embodiment of the invention Wafer thickness coordinate diagram after etching, as shown in Fig. 2, crystal circle center is consistent with crystal round fringes thickness distribution, side wall internal homogeneity Preferably, and wafer internal homogeneity is preferable.
Referring to Fig. 3, Fig. 3 is the wafer schematic diagram of an embodiment.As shown in figure 3, the temperature control system of current etching machine bench It unites poor to the controlling of crystal round fringes, causes the edge 110 of wafer 100 and the etch rate of 120 part of center inconsistent, such as The etch rate of crystal round fringes 110 is greater than the etch rate of crystal circle center 120 or the etch rate of crystal circle center 120 is greater than crystalline substance The etch rate of the edge of the circle 110, and the problem for causing side wall internal homogeneity poor.
It is greater than the situation of the etch rate of crystal round fringes 110, the crystal edge processing for the etch rate of crystal circle center 120 Technique is to carry out assisted etch process to crystal round fringes 110.
Specifically, in the first embodiment of the invention, referring to Fig. 4, Fig. 4 is the side of the wafer of first embodiment of the invention Stela loses flow chart.As shown in figure 4, the side wall lithographic method of wafer is successively the following steps are included: side wall depositing operation, forms side Wall sedimentary;Assisted etch process is carried out to crystal round fringes, keeps crystal round fringes thickness thinning;And carry out side wall main etching work Skill.
Specifically, in second embodiment of the invention, referring to Fig. 5, Fig. 5 is the side of the wafer of second embodiment of the invention Stela loses flow chart.As shown in figure 5, the side wall lithographic method of wafer is successively the following steps are included: side wall depositing operation, forms side Wall sedimentary;Carry out side wall main etching technique;And assisted etch process is carried out to crystal round fringes, become crystal round fringes thickness It is thin.
Assisted etch process in the first embodiment and the second embodiment is using fluorinated etching gas pair Crystal round fringes perform etching, and e.g., are performed etching using etching gas such as CF4, SF6 or CHF3 to crystal round fringes.Its thickness etched Degree can the crystal round fringes according to caused by side wall main etching technique and crystal circle center part difference in thickness and adjust, of the invention one In embodiment, the etching range of assisted etch process is 5A~1000A.
Each step in the first embodiment and the second embodiment successively operates, namely in the first embodiment, Assisted etch process is carried out before side wall main etching technique, to compensate the etch rate of crystal round fringes and crystal circle center part not Consistent problem;In a second embodiment, assisted etch process is carried out after side wall main etching technique, to compensate crystal round fringes The inconsistent problem with the etch rate of crystal circle center part.It will of course be understood that can be according to reality between above steps The demand of border product or production technology adds other techniques, and the present invention is to this and without limitation.
Wafer that is common, mentioning in first embodiment and the second embodiment, the figure on the wafer are spill It is distributed figure, i.e. the figure of 120 part of crystal circle center is relatively thin, and the figure of 110 part of crystal round fringes is thicker, using first embodiment And assisted etch process in the second embodiment, crystal round fringes thickness is thinning, compensate for crystal circle center 120 and crystal round fringes 110 difference in thickness and crystal round fringes and the etch rate of crystal circle center part it is inconsistent caused by after side wall main etching technique The difference in thickness of crystal round fringes and crystal circle center part reaches and improves side wall internal homogeneity, and then it is integrally uniform to improve wafer The purpose of property.
It is greater than the situation of the etch rate of crystal circle center 120, the crystal edge processing for the etch rate of crystal round fringes 110 Technique is polymer deposits (polymer deposition) technique.Specifically, referring to Fig. 6, Fig. 6 is third of the present invention implementation The side wall of the wafer of example etches flow chart.As shown in fig. 6, the side wall lithographic method of wafer is successively the following steps are included: side wall is heavy Product technique, forms side wall sedimentary;Polymer deposition process is carried out in crystal round fringes;And carry out side wall main etching technique.
Specifically, depositing one layer of protection in crystal round fringes 110 by polymer deposition process in the 3rd embodiment Film, thus the problem of compensating rate of the crystal round fringes etch rate greater than the etching of crystal circle center part.Implement in the present invention one In example, the gas deposited in polymer deposition process is attached most importance to polymer gas, such as CH4.Its thickness deposited can be according to side wall The difference in thickness of crystal round fringes caused by main etching technique and crystal circle center part and adjust, in an embodiment of the present invention, gather The thickness range for closing object depositing operation deposition is 0A~500A.
It will of course be understood that can be added according to the demand of actual product or production technology between above steps other Technique, the present invention is to this and without limitation.
It is greater than the etch rate of crystal circle center 120 for the etch rate of crystal round fringes 110, the side wall edge is nitridation The situation of silicon (SiN) material, the crystal edge treatment process are oxidation technology.Specifically, referring to Fig. 7, Fig. 7 is the present invention the 4th The side wall of the wafer of embodiment etches flow chart.As shown in fig. 7, the side wall lithographic method of wafer is successively the following steps are included: side Wall depositing operation forms side wall sedimentary;Oxidation technology is carried out to crystal round fringes;And carry out side wall main etching technique.
Specifically, in the fourth embodiment, using oxygen-enriched class etching gas by the silicon nitride (SiN) of crystal round fringes 110 Material oxidation forms layer oxide film, to reduce the etch rate of crystal round fringes, compensation crystal round fringes etch rate is greater than crystalline substance The problem of rate of the etching of circular center section.In an embodiment of the present invention, the oxidizing gas used in oxidation technology is main For oxygen-containing gas, such as O2 or SO2.Its thickness aoxidized can be in the crystal round fringes according to caused by side wall main etching technique and wafer The difference in thickness of center portion point and adjust, in an embodiment of the present invention, the thickness range for the oxidation film that oxidation technology is formed is 0A ~100A.
It will of course be understood that can be added according to the demand of actual product or production technology between above steps other Technique, the present invention is to this and without limitation.
Wafer that is common, mentioning in 3rd embodiment and the fourth embodiment, the figure on the wafer are convex It is distributed figure, i.e. the figure of 120 part of crystal circle center is thicker, and the figure of 110 part of crystal round fringes is relatively thin, using 3rd embodiment And wafer-process technique in the fourth embodiment, the etch rate of crystal round fringes is reduced, figure on wafer is compensated for and is distributed not Crystal round fringes and crystal circle center's etch rate different problems and because of caused by the reasons such as etching machine bench, reach and improve side Wall internal homogeneity, and then improve the purpose of wafer entirety homogeneity.
In this way, in an embodiment of the present invention, by increasing crystal edge treatment process in the side wall etching technics of wafer, mending Figure on wafer has been repaid to be unevenly distributed and crystal round fringes and crystal circle center's etch rate because of caused by the reasons such as etching machine bench Different problems reach and improve side wall internal homogeneity, and then improve the purpose of wafer entirety homogeneity.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations;To the greatest extent Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into Row equivalent replacement;And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution The range of scheme.

Claims (15)

1. a kind of side wall lithographic method of wafer, which is characterized in that including side wall main etching technique and crystal edge treatment process.
2. the side wall lithographic method of wafer according to claim 1, which is characterized in that the crystal edge treatment process is to crystalline substance The edge of the circle carries out technological operation.
3. the side wall lithographic method of wafer according to claim 1, which is characterized in that the crystal edge treatment process is to crystalline substance The edge of the circle carries out assisted etch process.
4. the side wall lithographic method of wafer according to claim 3, which is characterized in that the side wall lithographic method of the wafer Successively the following steps are included: side wall depositing operation, forms side wall sedimentary;Assisted etch process is carried out to crystal round fringes, makes crystalline substance The edge of the circle thickness is thinning;And carry out side wall main etching technique.
5. the side wall lithographic method of wafer according to claim 3, which is characterized in that the side wall lithographic method of the wafer Successively the following steps are included: side wall depositing operation, forms side wall sedimentary;Carry out side wall main etching technique;And to wafer side Edge carries out assisted etch process, keeps crystal round fringes thickness thinning.
6. according to the side wall lithographic method of the described in any item wafers of claim 4 or 5, which is characterized in that the auxiliary etch Technique is to be performed etching using fluorinated etching gas to crystal round fringes.
7. according to the side wall lithographic method of the described in any item wafers of claim 4 or 5, which is characterized in that the auxiliary etch The etching range of technique is 5A~1000A.
8. the side wall lithographic method of wafer according to claim 1, which is characterized in that the crystal edge treatment process is polymerization Object depositing operation.
9. the side wall lithographic method of wafer according to claim 8, which is characterized in that the side wall lithographic method of the wafer Successively the following steps are included: side wall depositing operation, forms side wall sedimentary;Polymer deposition process is carried out in crystal round fringes;With And carry out side wall main etching technique.
10. the side wall lithographic method of wafer according to claim 9, which is characterized in that in the polymer deposition process The gas of deposition is attached most importance to polymer gas.
11. the side wall lithographic method of wafer according to claim 9, which is characterized in that the polymer deposition process is heavy Long-pending thickness range is 0A~500A.
12. the side wall lithographic method of wafer according to claim 1, which is characterized in that the side wall edge is silicon nitride Material, the crystal edge treatment process are oxidation technology.
13. the side wall lithographic method of wafer according to claim 12, which is characterized in that the side wall lithographic method of wafer according to It is secondary the following steps are included: side wall depositing operation, form side wall sedimentary;Oxidation technology is carried out to crystal round fringes;And carry out side Wall main etching technique.
14. the side wall lithographic method of wafer according to claim 13, which is characterized in that the oxidation technology is using rich Oxygen class etching gas aoxidizes the silicon nitride material of crystal round fringes to form layer oxide film.
15. the side wall lithographic method of wafer according to claim 14, which is characterized in that the oxygen that the oxidation technology is formed The thickness range for changing film is 0A~100A.
CN201811007629.3A 2018-08-31 2018-08-31 The side wall lithographic method of wafer Pending CN109273358A (en)

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CN101764057A (en) * 2008-12-25 2010-06-30 中芯国际集成电路制造(上海)有限公司 Forming method of lateral wall substrate and forming method of lateral wall
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CN106960816A (en) * 2016-01-08 2017-07-18 中芯国际集成电路制造(上海)有限公司 The method of Dual graphing
CN107331613A (en) * 2017-06-26 2017-11-07 上海华力微电子有限公司 A kind of method of accurate control oxide thickness in phosphoric acid etching technics
CN107437497A (en) * 2016-05-27 2017-12-05 中芯国际集成电路制造(上海)有限公司 The forming method of semiconductor devices

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW452872B (en) * 2000-08-02 2001-09-01 Promos Technologies Inc Method of controlling thickness of screen oxide layer
CN1508851A (en) * 2002-12-19 2004-06-30 友达光电股份有限公司 Method for avoiding silicon layer etching nonuniform
CN1906751A (en) * 2004-01-30 2007-01-31 兰姆研究有限公司 System and method for stress free conductor removal
US20060017116A1 (en) * 2004-07-26 2006-01-26 Seok-Su Kim Semiconductor device and method for manufacturing the same
CN101057320A (en) * 2004-09-03 2007-10-17 兰姆研究有限公司 Etch with uniformity control
CN101764057A (en) * 2008-12-25 2010-06-30 中芯国际集成电路制造(上海)有限公司 Forming method of lateral wall substrate and forming method of lateral wall
CN101465286A (en) * 2008-12-31 2009-06-24 中微半导体设备(上海)有限公司 Etching method capable of regulating silicon wafer surface etching velocity uniformity
CN102543838A (en) * 2010-12-22 2012-07-04 中国科学院微电子研究所 Method for manufacturing semiconductor device
CN102723312A (en) * 2012-06-20 2012-10-10 上海华力微电子有限公司 Method for forming silicon dioxide spacer with uniform thickness
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CN107437497A (en) * 2016-05-27 2017-12-05 中芯国际集成电路制造(上海)有限公司 The forming method of semiconductor devices
CN107331613A (en) * 2017-06-26 2017-11-07 上海华力微电子有限公司 A kind of method of accurate control oxide thickness in phosphoric acid etching technics

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Application publication date: 20190125