CN109189477A - A kind of instruction issue control method towards multi-context coarseness data flow architecture - Google Patents
A kind of instruction issue control method towards multi-context coarseness data flow architecture Download PDFInfo
- Publication number
- CN109189477A CN109189477A CN201810682382.9A CN201810682382A CN109189477A CN 109189477 A CN109189477 A CN 109189477A CN 201810682382 A CN201810682382 A CN 201810682382A CN 109189477 A CN109189477 A CN 109189477A
- Authority
- CN
- China
- Prior art keywords
- stage
- instruction
- context
- physics
- selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 53
- 230000007246 mechanism Effects 0.000 claims abstract description 32
- 239000003550 marker Substances 0.000 claims description 49
- 230000008713 feedback mechanism Effects 0.000 claims description 16
- 230000001174 ascending effect Effects 0.000 claims 1
- 230000006870 function Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 3
- 238000012163 sequencing technique Methods 0.000 description 2
- 238000004590 computer program Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Advance Control (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
The present invention proposes a kind of instruction issue control method, system and device towards multi-context coarseness data flow architecture.This method is related to the contents such as the arrangement mode instructed in system, physics context selection strategy and Stage merging mechanism, logic is selected by physically selected works, same type Stage under coarseness pattern of traffic is merged to greatest extent, forms United Stage.Combining unit controls the execution of functional component by PC pointer inside operation Stage.Technical solution of the present invention can provide enough instructions for functional component, effectively improve its element usage, and can simplify the selection logic of functional component, improve running efficiency of system while covering the instruction bring high latency such as memory access.
Description
Technical field
The present invention relates to the design fields that launching technique is instructed in processing unit, in particular to a kind of towards comprising mostly up and down
Instruction issue control method and its system, device in the coarseness data flow architecture of text.
Background technique
The extensive attention in academia and market has been obtained for the research and development of data flow architecture in recent years, has been with data
The mechanism of driving makes it successfully get rid of the restriction of PC in control flow structure.In this structure, an instruction only needs to wait for operating
Number is ready i.e. executable, and does not need the support of shared memory, thus can effectively realize different instruction it is asynchronous simultaneously
Row executes, and sufficiently excavates the concurrency in program, and then improve the calculating speed and efficiency of processor.Meanwhile with Traditional control
Flow structure is compared, and simple control logic reduces the area of data flow architecture processor, it is made to have low-power consumption, high-performance function
The advantages of loss-rate.
Often there is the instruction with data dependence relation, traditional data in many practical applications counted including figure
Stream can not the such instruction segment of efficient process, or even additional expense can be brought, therefore introduce the concept of " coarseness data flow ".Slightly
A plurality of instruction with data dependence is divided into a stage (Stage) by granularity data stream, and the inside Stage executes control by PC
Stream mode processed so that need not move through matching logic complicated in data flow with the instruction of data dependence, and between Stage then with
The form of data flow promotes.Attached drawing 1 illustrates figure and calculates common vertex-centric model part process in coarse grain degree
According to the application form under flow structure, implementation procedure is divided into the Stage of multiple and different types, in each Stage comprising 1 or
The a plurality of instruction with data dependence.Above-mentioned execution pattern can rationally and effectively combined data stream and control stream execution side
Formula simplifies logic while excavating instruction-parallelism, avoids unnecessary expense.
Multi-context mode can effectively reduce the free time of each component in pattern of traffic, further increase function part
Part utilization rate.Context pattern includes physics context (Physical Context) and logical context (Logical
Context) two kinds of structures: different physics contexts correspond to incoherent data space, compete a set of functional component jointly, when
It is that can be switched physically hereafter, and can guarantee that data are not present and rely on, and then effectively cover memory access etc. that functional component, which generates idle,
Instruct the high latency generated；Each logical context corresponds to an iteration of program, under coarseness pattern of traffic, in logic under
Literary streaming (streaming) completes all Stage of program, namely at full capacity when, it is same that Stage physically hereinafter will be present
The logical context of number works at the same time.But the increase of physics context and logical context number, but also functional component
Data selection logic is more complicated.
Summary of the invention
In view of the deficiencies in the prior art, the present invention is directed to the coarseness data flow architecture of multi-context, proposes one
The new instruction issue control method of kind and its relevant system and device.This method will be identical under coarseness pattern of traffic
Type Stage is merged, and forms United Stage, can be while covering the instruction bring high latency such as memory access
Functional component provides enough instructions, improves its element usage, and simplifies selection logic.
The present invention designs a kind of instruction issue control method towards the coarseness data flow architecture comprising multi-context, is
System and device, specifically, the present invention provides technical solutions below:
On the one hand, the present invention provides a kind of instruction issue controlling parties towards multi-context coarseness data flow architecture
Method, which comprises
The instruction in same type stage is continuously put in the corresponding region of instruction RAM；
Setup phase feedback mechanism, multiple physics contexts share identical instruction, and corresponding multiple stages, synchronization
Each stage is executed by same Different Logic context physically hereinafter；And a marker is equipped with for each stage；
Setup phase merges mechanism, is to increase by a combining unit in the stage of each type, is controlled by the combining unit
Functional component continuously performs the instruction in the stage of multiple same types；
Physics context selection mechanism is set, while the functional component executes a physics context data, by institute
Physics context selection mechanism and the marker are stated, the physics context of secondary execution under the functional component is selected；
Merge mechanism, physics context selection mechanism based on the stage feedback mechanism, stage, controls the functional component
It executes instruction.
Herein it should be noted that each mechanism in above-mentioned method, is not present stringent logical order between them
It is required that is, its sequencing executed can be adjusted, or parallel progress, without that should write formal elder generation because of it
Afterwards, it is interpreted as it and executes in logic successive.
Preferably, in the corresponding region of described instruction RAM, if single order intersegmental part includes a plurality of instruction, by instruction
Between dependence sequence arrange；
The instruction segment of different phase is distinguished by multiple PC pointers.It is further preferable that for example can be according to PC pointer
Value distinguishes.
Preferably, in the stage feedback mechanism, the marker is for identifying whether a phase instruction can emit；When
When stage receives corresponding ack feedback signal, the marker set can be emitted with representing it.
Preferably, in the stage merging mechanism, the combining unit passes through the finger for controlling the PC pointer implementation phase
The merging of order.
Preferably, the physics context selection mechanism includes physics context selection strategy, above and below setting physics
Literary selecting unit executes the physics context selection strategy.This selection strategy can according to specific instruction execution demand into
Row setting for example, priority setting can be carried out to instruction set according to certain rules, then selects etc. according to priority.
Preferably, the physics context selection strategy includes:
(1) it by the physically hereinafter marker of the different phase of same type to be selected, is numbered according to the stage, by small
To the position from low to high of big composition marker selection word；
(2) each marker selection word is successively analyzed, it is most that selection is wherein continuously set to missile digit
Physics context；
(3) starting for being continuously set to the corresponding first stage of missile selection word in (2) described in record
The termination PC pointer value of PC pointer value and the last stage, records the number of the physics context, by the information of above-mentioned record
It is sent to combining unit.This is set to missile selection word and may, for example, be the position to be set to 1, then continuous feelings
Condition, it is possible to be in selection word continuous several be 1, certainly, the value of the set may be set to be 0, herein not with specific
Set numerical value or form are restriction, and those conventional changes, are regarded as falling under the scope of the present invention.
Preferably, the physics context selection strategy further include:
(4) for (2), if in marker selection word, there are multiple to be continuously set to identical digit
Position is can emit position, then several stages corresponding to a preferential selection high position merge.
It is further preferable that the physics context selection strategy further include:
(5) it for (2), (4), is continuously set in the marker selection word of multiple physics contexts if it exists
Missile digit is equal, then selects the largest number of physics context of combinable stage.
It is further preferable that the physics context selection strategy further include:
(6) for (2), (4), (5), if multiple physics context markers are identical the case where selecting word,
The smallest physics context is numbered in selection.
On the other hand, the instruction issue control towards multi-context coarseness data flow architecture that the present invention also provides a kind of
System, the system comprises:
The functional component executed instruction, the instruction RAM of store instruction, and
Feedback mechanism unit is equipped with a marker for each stage, and multiple physics contexts share identical instruction, and
Corresponding multiple stages, synchronization each stage are executed by same Different Logic context physically hereinafter；
Several combining units, the stage of each type are respectively provided with a combining unit, control function by the combining unit
Energy component continuously performs the instruction in the stage of multiple same types；
Physics context selecting unit, while the functional component executes a physics context data, by the object
Context selecting unit is managed according to the physically hereinafter marker in each stage, selects the object of secondary execution under the functional component
Manage context；
Wherein, the instruction in same type stage is continuously put in the corresponding region of instruction RAM.
Preferably, in the corresponding region of described instruction RAM, if single order intersegmental part includes a plurality of instruction, by instruction
Between dependence sequence arrange；
The instruction segment of different phase is distinguished by multiple PC pointers.It is further preferable that for example can be according to PC pointer
Value distinguishes.
Preferably, in the stage feedback mechanism, the marker is for identifying whether a phase instruction can emit；When
When stage receives corresponding ack feedback signal, the marker set can be emitted with representing it.The value of the marker can
To be 1, it is also possible to 0, specific setting can be adjusted according to demand.
Preferably, in the stage merging mechanism, the combining unit passes through the finger for controlling the PC pointer implementation phase
The merging of order.
Preferably, the physics context selection mechanism includes physics context selection strategy, above and below setting physics
Literary selecting unit executes the physics context selection strategy.This selection strategy can according to specific instruction execution demand into
Row setting for example, priority setting can be carried out to instruction set according to certain rules, then selects etc. according to priority.
Preferably, the physics context selection strategy includes:
(1) it by the physically hereinafter marker of the different phase of same type to be selected, is numbered according to the stage, by small
To the position from low to high of big composition marker selection word；
(2) each marker selection word is successively analyzed, it is most that selection is wherein continuously set to missile digit
Physics context；
(3) starting for being continuously set to the corresponding first stage of missile selection word in (2) described in record
The termination PC pointer value of PC pointer value and the last stage, records the number of the physics context, by the information of above-mentioned record
It is sent to combining unit.This is set to missile selection word and may, for example, be the position to be set to 1, then continuous feelings
Condition, it is possible to be in selection word continuous several be 1, certainly, the value of the set may be set to be 0, herein not with specific
Set numerical value or form are restriction, and those conventional changes, are regarded as falling under the scope of the present invention.
Preferably, the physics context selection strategy further include:
(4) for (2), if in marker selection word, there are multiple to be continuously set to identical digit
Position is for that can emit position, then preferential to select several stages corresponding to a high position.
It is further preferable that the physics context selection strategy further include:
(5) it for (2), (4), is continuously set in the marker selection word of multiple physics contexts if it exists
Missile digit is equal, then selects the largest number of physics context of combinable stage.
It is further preferable that the physics context selection strategy further include:
(6) for (2), (4), (5), if multiple physics context markers are identical the case where selecting word,
The smallest physics context is numbered in selection.
Another aspect, the present invention also provides a kind of instruction issue controls towards multi-context coarseness data flow architecture
Device processed, described device include one or more processors,
Storage unit, wherein being stored with the computer instruction that can call and carry out operation by processor；
The computer instruction executes the above-mentioned instruction issue controlling party towards multi-context coarseness data flow architecture
Method.
Compared with prior art, the present invention has the advantage that
(1) the execution feature of coarseness data flow is made full use of, merges the different Stage of same type to greatest extent, is
Functional component provides the instructions to be performed of abundance；
(2) the instruction bring high latency such as memory access, effective enhanced feature element usage are further covered；
(3) merge the mechanism of Stage and the physics context selection strategy of simple and flexible, can effectively simplify functional component
Selection logic, improve running efficiency of system.
Detailed description of the invention
Fig. 1 is application schematic diagram of the figure computation model under coarseness data flow architecture；
Fig. 2 is multi-context coarseness data flow architecture schematic diagram；
Fig. 3 is the arrangement mode schematic diagram of instruction in systems；
Fig. 4 is that valid compares word schematic diagram under 3 Stage situations；
Fig. 5 is that alternative valid compares the exemplary diagram that 1 continuous digit is different in word；
Fig. 6 is that alternative valid compares in word that there are the identical exemplary diagrams of 1 continuous digit.
Specific embodiment
Below in conjunction with the figure in the embodiment of the present invention, technical solution in the embodiment of the present invention carries out clear, complete
Ground description, it is clear that the described embodiment is only a part of the embodiment of the present invention, instead of all the embodiments.Based on this hair
Embodiment in bright, those of ordinary skill in the art's every other implementation obtained under that premise of not paying creative labor
Example, shall fall within the protection scope of the present invention.
The present invention executes feature according to the coarseness data flow architecture comprising multi-context, proposes that one kind can be promoted effectively
Functional component utilization rate, further cover instruction delay and simplify the instruction issue control method of system selection logic, system and
Device.
Embodiment 1
In a specific embodiment, the present invention also provides a kind of towards multi-context coarseness data flow architecture
Instruction issue control system, the system comprises:
The functional component executed instruction, the instruction RAM of store instruction, and
Feedback mechanism unit is equipped with a marker for each stage, and multiple physics contexts share identical instruction, and
Corresponding multiple stages, synchronization each stage are executed by same Different Logic context physically hereinafter；
Several combining units, the stage of each type are respectively provided with a combining unit, control function by the combining unit
Energy component continuously performs the instruction in the stage of multiple same types；
Physics context selecting unit, while the functional component executes a physics context data, by the object
Context selecting unit is managed according to the physically hereinafter marker in each stage, selects the object of secondary execution under the functional component
Manage context；
Wherein, the instruction in same type stage is continuously put in the corresponding region of instruction RAM.
Preferably, in the corresponding region of described instruction RAM, if single order intersegmental part includes a plurality of instruction, by instruction
Between dependence sequence arrange；
The instruction segment of different phase is distinguished by multiple PC pointers.It is further preferable that for example can be according to PC pointer
Value distinguishes.
Preferably, in the stage feedback mechanism, the marker is for identifying whether a phase instruction can emit；When
When stage receives corresponding ack feedback signal, the marker set can be emitted with representing it.The value of the marker can
To be 1, it is also possible to 0, specific setting can be adjusted according to demand.
Preferably, in the stage merging mechanism, the combining unit passes through the finger for controlling the PC pointer implementation phase
The merging of order.
Preferably, the physics context selection mechanism includes physics context selection strategy, above and below setting physics
Literary selecting unit executes the physics context selection strategy.This selection strategy can according to specific instruction execution demand into
Row setting for example, priority setting can be carried out to instruction set according to certain rules, then selects etc. according to priority.
Preferably, the physics context selection strategy includes:
(1) it by the physically hereinafter marker of the different phase of same type to be selected, is numbered according to the stage, by small
To the position from low to high of big composition marker selection word；
(2) each marker selection word is successively analyzed, it is most that selection is wherein continuously set to missile digit
Physics context；
(3) starting for being continuously set to the corresponding first stage of missile selection word in (2) described in record
The termination PC pointer value of PC pointer value and the last stage, records the physics context numbers, and the information of above-mentioned record is passed
It send to combining unit.This is set to missile selection word and may, for example, be the position to be set to 1, then continuous situation,
May be in the selection word continuous several be 1, certainly, the value of the set may be set to be 0, herein not specifically to set
Bit value or form are restriction, and those conventional changes, are regarded as falling under the scope of the present invention.
Preferably, the physics context selection strategy further include:
(4) for (2), if in marker selection word, there are multiple to be continuously set to identical digit
Position is for that can emit position, then preferential to select several stages corresponding to a high position.
It is further preferable that the physics context selection strategy further include:
(5) it for (2), (4), is continuously set in the marker selection word of multiple physics contexts if it exists
Missile digit is equal, then selects the largest number of physics context of combinable stage.
It is further preferable that the physics context selection strategy further include:
(6) for (2), (4), (5), if multiple physics context markers are identical the case where selecting word,
The smallest physics context is numbered in selection.
It should be noted that the system can execute the specific instruction issue controlling party as described in embodiment 2,3
Method.
Embodiment 2
In yet another embodiment, the present invention designs a kind of finger towards the coarseness data flow architecture comprising multi-context
Enable emission control method, structure as shown in Fig. 2 (shown only in figure the selection of LOAD instruction with merge access), wherein wrapping
Containing multiple context units, context selecting unit Select Unit, combining unit United Unit and functional component unit
Function Unit (namely functional component) etc..This method is related to the arrangement mode instructed in system, physics context selection plan
The contents such as summary and Stage merging mechanism.For method of the invention is described in more detail, below with reference to specific reality
Example, is illustrated the various aspects of this method as follows.
Generally, this method can execute in the following way:
The described method includes:
The instruction in same type stage is continuously put in the corresponding region of instruction RAM；
Setup phase feedback mechanism, multiple physics contexts share identical instruction, and corresponding multiple stages, synchronization
Each stage is executed by same Different Logic context physically hereinafter；And a marker is equipped with for each stage；
Setup phase merges mechanism, is to increase by a combining unit in the stage of each type, is controlled by the combining unit
Functional component continuously performs the instruction in the stage of multiple same types；
Physics context selection mechanism is set, while the functional component executes a physics context data, by institute
Physics context selection mechanism and the marker are stated, the physics context of secondary execution under the functional component is selected；
Merge mechanism, physics context selection mechanism based on the stage feedback mechanism, stage, controls the functional component
It executes instruction.
Herein it should be noted that each mechanism in above-mentioned method, is not present stringent logical order between them
It is required that is, its sequencing executed can be adjusted, or parallel progress, without that should write formal elder generation because of it
Afterwards, it is interpreted as it and executes in logic successive.
Preferably, in the corresponding region of described instruction RAM, if single order intersegmental part includes a plurality of instruction, by instruction
Between dependence sequence arrange；
The instruction segment of different phase is distinguished by multiple PC pointers.It is further preferable that for example can be according to PC pointer
Value distinguishes.
Preferably, in the stage feedback mechanism, the marker is for identifying whether a phase instruction can emit；When
When stage receives corresponding ack feedback signal, the marker set can be emitted with representing it.
Preferably, in the stage merging mechanism, the combining unit passes through the finger for controlling the PC pointer implementation phase
The merging of order.
Preferably, the physics context selection mechanism includes physics context selection strategy, above and below setting physics
Literary selecting unit executes the physics context selection strategy.This selection strategy can according to specific instruction execution demand into
Row setting for example, priority setting can be carried out to instruction set according to certain rules, then selects etc. according to priority.
Preferably, the physics context selection strategy includes:
(1) it by the physically hereinafter marker of the different phase of same type to be selected, is numbered according to the stage, by small
To the position from low to high of big composition marker selection word；
(2) each marker selection word is successively analyzed, it is most that selection is wherein continuously set to missile digit
Physics context；
(3) starting for being continuously set to the corresponding first stage of missile selection word in (2) described in record
The termination PC pointer value of PC pointer value and the last stage, records the physics context numbers, and the information of above-mentioned record is passed
It send to combining unit.This is set to missile selection word and may, for example, be the position to be set to 1, then continuous situation,
Continuous several for may being the selection word are 1, and certainly, the value of the set may be set to be 0, herein not specifically to set
Bit value or form are restriction, and those conventional changes, are regarded as falling under the scope of the present invention.
Preferably, the physics context selection strategy further include:
(4) for (2), if in marker selection word, there are multiple to be continuously set to identical digit
Position is for that can emit position, then preferential to select several stages corresponding to a high position.
It is further preferable that the physics context selection strategy further include:
(5) it for (2), (4), is continuously set in the marker selection word of multiple physics contexts if it exists
Missile digit is equal, then selects the largest number of physics context of combinable stage.
It is further preferable that the physics context selection strategy further include:
(6) for (2), (4), (5), if multiple physics context markers are identical the case where selecting word,
The smallest physics context is numbered in selection.
More particularly method of the invention may include the following aspects:
1. instructing arrangement mode
The instruction of same type Stage is in the corresponding of instruction RAM in instruction issue control method requirement system of the invention
It is continuously put in region.If arranging comprising a plurality of instruction by the sequence of dependence therebetween inside Stage.System passes through storage
Multiple PC pointer values distinguish the instruction segment of different Stage.By taking attached drawing 3 as an example, which can cutting be effectively staggeredly to carry out
3 calculating operation CAL Stage and 3 accessing operation LOAD Stage.In the computations region of Inst RAM, address from
The low to high instruction for successively putting Stage0-2, and record with PC0-PC3 the whole story location of instruction of each Stage.
2.Stage feedback mechanism
Instruction issue control method of the invention is towards the coarse grain degree with more physics contexts and more logical contexts
According to flow structure.In the application scenarios, multiple physics contexts share same instructions, correspond to several Stage, and synchronization is each
Stage is executed by same Different Logic context physically hereinafter.Due to the propulsion of Stage in a stream do not defer to it is solid
Fixed timeticks number, therefore feedback mechanism is used, each Stage is equipped with one valid, indicates that Stage instruction is
No to emit, when Stage receives corresponding ack feedback signal, by the position valid 1, representative can effectively emit.
3.Stage merges mechanism
Logic is selected to simplify context, to functional component provides more multiple instructions to further increase its element usage,
Instruction issue control method of the invention is that every class Stage adds a combining unit United Unit in systems.Due to
Each different Stage physically hereinafter correspond to different logical contexts, therefore there are the different Stage of same type
Missile situation simultaneously, and the instruction of same type is continuously arranged in same instruction ram region, then conjunction can be passed through
And unit, control function component continuously perform the instruction of multiple same type Stage.
In this method, combining unit merges Stage instruction by the straightforward procedure of manipulation PC pointer, and there is no refer to
Enable the process for moving copy.As shown in Fig. 2, combining unit by selecting unit obtain it is pending physically hereinafter, can connect
The continuous instruction area whole story PC pointer value PC_start and PC_end executed, and then the instruction execution of control function component.
4. physics context selection strategy
Instruction issue control method of the invention adds individual physics context selecting unit in multi-context system
Select Unit.While functional component executes some physics context data, by selecting unit according to it is other physically under
The valid numerical value situation of each Stage selects the physics context of secondary execution under functional component in text.In Select Unit
It is as follows to be specifically chosen policy depiction:
(1) by the physically hereinafter position valid of the different Stage of same type to be selected, according to Stage number by
The small position from low to high to big composition valid selection word；
(2) each valid selection word is successively analyzed, the wherein continuous physics context most for 1 digit is selected.This
Strategy, which guarantees to select, continuously to carry out Stage merging by the most physics context of firing order number；
(3) for tactful (2), if there are multiple serial numbers 1 with identical digit in valid selection word, preferentially
Several stage corresponding to a selection high position.Such as it is a certain include 5 same type Stage valid compare number of words value be 11011,
Then preferentially selection Stage3 and Stage4 is merged；
(4) for tactful (2) and (3), the valid of multiple physics contexts compares in word the continuously digit for 1 if it exists
It is equal, then select the largest number of physics context of combinable Stage.Tactful (3) and tactful (4) are in the iteration later period
Stage assigns high priority；
(5) for tactful (2)-(4), it is identical to compare word situation by multiple physics context valid if it exists, then selects
Number the smallest physics context.This strategy is that small number physics context assigns high priority；
(6) the starting PC value of first Stage corresponding to continuous 1 is denoted as PC_start, the end of the last one Stage
Only PC is denoted as PC_end, and recording the physics context numbers is Physical_id, and above- mentioned information are transmitted to combining unit.
Herein it should be noted that above-mentioned strategy (2) to (5), is that the one of the embodiment of the present invention is more preferably tactful,
Rather than the strategy that must be provided with, i.e., it is above-mentioned if there is a variety of same forms or when the identical context relation of priority, can
It is screened so that other preference strategies are arranged.Strategy given by the present invention (2) to (5) is only that therein can use for reference
Preferred embodiment one kind.And the serial number of above-mentioned strategy is only to be convenient for stating and using, and is not produced to the substantive content of strategy
Raw to influence, the range that more should not be construed as embodiment of the present invention limits.
Embodiment 3
In another embodiment, we carry out the implementation to instruction issue control method of the invention with a concrete scene
Mode is illustrated.Coarseness data flow system under the scene has 4 physics contexts, corresponding 4 parts of incoherent data
Space, it is assumed that the program segment being carrying out thereon can be effectively split into the 3 CAL Stage0-2 and 3 LOAD staggeredly executed
Stage0-2.Arrangement mode of the program segment directive in INST RAM is as shown in Fig. 3.The coarseness data flow of multi-context
Structure is as shown in Fig. 2, wherein only showing the selection of LOAD type Stage and merging access.
Attached drawing 4 lists under the exemplary scene, and the valid of similar Stage composition compares word pair in single physical context
All numerical value answered.And according to selection strategy (3), lists each valid and compare the PC whole story that number of words value corresponds to combinable Stage
Value.
Illustrate physics context selection logic and Stage merging process with 2 specific examples below.
It is different that the alternative valid of example 1. compares 1 continuous digit in word
This example is as shown in Fig. 5, current time, and LOAD functional component is handling No. 0 physics context data, selection
Unit will select 1-3 physics context.The valid of 1-3 physics context compares 1 continuous position in word in this example
Number is different, and steps are as follows for specific choice merging:
Step 501:1-3 physics context respectively by the position valid of LOAD Stage in it by Stage number from it is small to
Big group is combined into the position from low to high that valid compares word, i.e., it be 111, No. 2 is 101,3 that the valid of No. 1 physics context, which compares word,
Number be 011；
Valid is compared word and is sent into selecting unit Select Unit by step 502:1-3 physics context；
Step 503: selecting unit compares word to 1-3 valid and analyzes, and No. 1 valid compares the company that word 111 includes 1
Continuous digit be that compare the continuous digit that word 101 includes 1 be that 1, No. 3 valid compare the continuous position that word 011 includes 1 to 3, No. 2 valid
Number is 2.According to selection strategy (2), the 1 most physics context of continuous digit, i.e. No. 1 context should be selected；
Step 504: selection result information is passed to LOAD combining unit by selecting unit, and result information includes physics or more
Text number Physical_id is 1, and the starting PC value to be combined for executing Stage is PC0, and termination PC value is PC3；
Step 505:LOAD combining unit receives physics context and selects information, according to PC whole story value, controls LOAD function
The next time of component executes.
The alternative valid of example 2., which compares in word, has that 1 continuous digit is identical
This example is as shown in Fig. 6, current time, and LOAD functional component is handling No. 0 physics context data, selection
Unit will select 1-3 physics context.The valid of 1-3 physics context compares in word that there are 1 companies in this example
The identical situation of continuous digit, steps are as follows for specific choice merging:
Step 601:1-3 physics context respectively by the position valid of LOAD Stage in it by Stage number from it is small to
Big group is combined into the position from low to high that valid compares word, i.e., it be 011, No. 2 is 110,3 that the valid of No. 1 physics context, which compares word,
Number be 110；
Valid is compared word and is sent into selecting unit Select Unit by step 602:1-3 physics context；
Step 603: selecting unit compares word to 1-3 valid and analyzes, and No. 1 valid compares the company that word 111 includes 1
Continuous digit be that compare the continuous digit that word 110 includes 1 be that 2, No. 3 valid compare the continuous position that word 110 includes 1 to 2, No. 2 valid
Number is 2.1 continuous digit is all the same in 3 valid selection words, and according to selection strategy (3), No. 1 valid, which compares word correspondence, to be closed
And it is No. 1-2 that Stage, which is that No. 0-1, No. 2 and No. 3 valid compare word to correspond to combinable Stage, therefore should exclude No. 1 physically
Hereafter.Further accordance with selection strategy (5), lesser physics context, i.e. No. 2 contexts are numbered in preferential selection；
Step 604: selection result information is passed to LOAD combining unit by selecting unit, and result information includes physics or more
Text number Physical_id is 2, and the starting PC value to be combined for executing Stage is PC1, and termination PC value is PC3；
Step 605:LOAD combining unit receives physics context and selects information, according to PC whole story value, controls LOAD function
The next time of component executes.
Embodiment 4
In another specific embodiment, the present invention also provides one kind towards multi-context coarseness data flow architecture
Instruction issue control device, described device includes one or more processors,
Storage unit, wherein being stored with the computer instruction that can call and carry out operation by processor；
The computer instruction executes the above-mentioned instruction issue controlling party towards multi-context coarseness data flow architecture
Method.Specifically, method performed by the device, can be method cited in such as embodiment 2,3.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Relevant hardware is instructed to complete by computer program, the program can be stored in a computer-readable storage medium
In, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, the storage medium can be magnetic
Dish, CD, read-only memory (Read-Only Memory, ROM) or random access memory (Random Access
Memory, RAM) etc..
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify to technical solution documented by previous embodiment or equivalent replacement of some of the technical features；And
These are modified or replaceed, the spirit and model of technical solution of the embodiment of the present invention that it does not separate the essence of the corresponding technical solution
It encloses.
Claims (11)
1. a kind of instruction issue control method towards multi-context coarseness data flow architecture, which is characterized in that the method
Include:
The instruction in same type stage is continuously put in the corresponding region of instruction RAM；
Setup phase feedback mechanism, multiple physics contexts share identical instruction, and corresponding multiple stages, synchronization are each
Stage is executed by same Different Logic context physically hereinafter；And a marker is equipped with for each stage；
Setup phase merges mechanism, is to increase by a combining unit in the stage of each type, passes through the combining unit control function
Component continuously performs the instruction in the stage of multiple same types；
Physics context selection mechanism is set, while the functional component executes a physics context data, by the object
Context selection mechanism and the marker are managed, the physics context of secondary execution under the functional component is selected；
Merge mechanism, physics context selection mechanism based on the stage feedback mechanism, stage, controls the functional component and execute
Instruction.
2. the method according to claim 1, wherein in the corresponding region of described instruction RAM, if in a stage
Portion includes a plurality of instruction, then arranges by the dependence sequence between instruction；
The instruction segment of different phase is distinguished by multiple PC pointers.
3. the method according to claim 1, wherein the marker is for marking in the stage feedback mechanism
Know whether a phase instruction can emit；When receiving corresponding ack feedback signal in the stage, by the marker set, with
Representing it can emit.
4. according to the method described in claim 2, it is characterized in that, the combining unit passes through in the stage merging mechanism
Control the merging of the instruction of the PC pointer implementation phase.
5. the method according to claim 1, wherein the physics context selection mechanism includes physics context
Selection strategy executes the physics context selection strategy by setting physics context selecting unit.
6. according to the method described in claim 5, it is characterized in that, the physics context selection strategy includes:
(1) it by the physically hereinafter marker of the different phase of same type to be selected, is numbered according to the stage, it is ascending
Form the position from low to high of marker selection word；
(2) each marker selection word is successively analyzed, selection is wherein continuously set to the most physics of missile digit
Context；
(3) the starting PC for being continuously set to the corresponding first stage of missile selection word in (2) described in record refers to
The termination PC pointer value of needle value and the last stage, records the number of the physics context, and the information of above-mentioned record is transmitted
To combining unit.
7. according to the method described in claim 6, it is characterized in that, the physics context selection strategy further include:
(4) for (2), if in marker selection word, there are multiple to be continuously set to identical digit
Position can be emitted, then several stages corresponding to a preferential selection high position.
8. the method according to the description of claim 7 is characterized in that the physics context selection strategy further include:
(5) it for (2), (4), is continuously set to send out in the marker selection word of multiple physics contexts if it exists
The digit penetrated is equal, then selects the largest number of physics context of combinable stage.
9. according to the method described in claim 8, it is characterized in that, the physics context selection strategy further include:
(6) (2), (4), (5) are selected if multiple physics context markers are identical the case where selecting word
Number the smallest physics context.
10. a kind of instruction issue control system towards multi-context coarseness data flow architecture, which is characterized in that the system
Include:
The functional component executed instruction, the instruction RAM of store instruction, and
Feedback mechanism unit is equipped with a marker for each stage, so that multiple physics contexts share identical instruction, and
Corresponding multiple stages, synchronization each stage are executed by same Different Logic context physically hereinafter；
Several combining units, the stage of each type are respectively provided with a combining unit, pass through combining unit control function portion
Part continuously performs the instruction in the stage of multiple same types；
Physics context selecting unit, the functional component execute a physics context data while, by it is described physically
Hereafter selecting unit is according to the physically hereinafter marker in each stage, selects under the functional component secondary execution physically
Hereafter；
Wherein, the instruction in same type stage is continuously put in the corresponding region of instruction RAM.
11. a kind of instruction issue control device towards multi-context coarseness data flow architecture, which is characterized in that described device
Including one or more processors,
Storage unit, wherein being stored with the computer instruction that can call and carry out operation by processor；
The computer instruction perform claim requires any instruction towards multi-context coarseness data flow architecture of 1-9
Emission control method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810682382.9A CN109189477B (en) | 2018-06-27 | 2018-06-27 | Instruction emission control method oriented to multi-context coarse-grained data stream structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810682382.9A CN109189477B (en) | 2018-06-27 | 2018-06-27 | Instruction emission control method oriented to multi-context coarse-grained data stream structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109189477A true CN109189477A (en) | 2019-01-11 |
| CN109189477B CN109189477B (en) | 2021-09-28 |
Family
ID=64948585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810682382.9A Active CN109189477B (en) | 2018-06-27 | 2018-06-27 | Instruction emission control method oriented to multi-context coarse-grained data stream structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109189477B (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020107889A1 (en) * | 2001-02-08 | 2002-08-08 | Tilion Corporation | Markup language routing and administration |
| US7646318B2 (en) * | 2007-11-26 | 2010-01-12 | Electronics And Telecommunications Research Institute | H.264 CAVLC decoding method based on application-specific instruction-set processor |
| CN102508689A (en) * | 2011-11-08 | 2012-06-20 | 上海交通大学 | Data processing system capable of maintaining dependency relationship in advanced language program data flow diagram extraction |
| CN103702310A (en) * | 2013-12-30 | 2014-04-02 | 成都道永网络技术有限公司 | Multi-interface data merge implementation method |
| US9009448B2 (en) * | 2011-08-17 | 2015-04-14 | Intel Corporation | Multithreaded DFA architecture for finding rules match by concurrently performing at varying input stream positions and sorting result tokens |
| CN105279022A (en) * | 2010-05-04 | 2016-01-27 | 谷歌公司 | Parallel processing of data |
| CN106133690A (en) * | 2014-03-27 | 2016-11-16 | 国际商业机器公司 | Thread context in multi-threaded computer system retains |
| CN107273092A (en) * | 2017-05-03 | 2017-10-20 | 北京中科睿芯科技有限公司 | A kind of method and its system for optimizing data stream architecture memory access latency |
| CN108052347A (en) * | 2017-12-06 | 2018-05-18 | 北京中科睿芯智能计算产业研究院有限公司 | A kind of device for executing instruction selection, method and command mappings method |
-
2018
- 2018-06-27 CN CN201810682382.9A patent/CN109189477B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020107889A1 (en) * | 2001-02-08 | 2002-08-08 | Tilion Corporation | Markup language routing and administration |
| US7646318B2 (en) * | 2007-11-26 | 2010-01-12 | Electronics And Telecommunications Research Institute | H.264 CAVLC decoding method based on application-specific instruction-set processor |
| CN105279022A (en) * | 2010-05-04 | 2016-01-27 | 谷歌公司 | Parallel processing of data |
| US9009448B2 (en) * | 2011-08-17 | 2015-04-14 | Intel Corporation | Multithreaded DFA architecture for finding rules match by concurrently performing at varying input stream positions and sorting result tokens |
| CN102508689A (en) * | 2011-11-08 | 2012-06-20 | 上海交通大学 | Data processing system capable of maintaining dependency relationship in advanced language program data flow diagram extraction |
| CN103702310A (en) * | 2013-12-30 | 2014-04-02 | 成都道永网络技术有限公司 | Multi-interface data merge implementation method |
| CN106133690A (en) * | 2014-03-27 | 2016-11-16 | 国际商业机器公司 | Thread context in multi-threaded computer system retains |
| CN107273092A (en) * | 2017-05-03 | 2017-10-20 | 北京中科睿芯科技有限公司 | A kind of method and its system for optimizing data stream architecture memory access latency |
| CN108052347A (en) * | 2017-12-06 | 2018-05-18 | 北京中科睿芯智能计算产业研究院有限公司 | A kind of device for executing instruction selection, method and command mappings method |
Non-Patent Citations (2)
| Title |
|---|
| MILOŠ KRSTAJIĆ ET AL.: "Visualization of streaming data: Observing change and context in information visualization techniques", 《 2013 IEEE INTERNATIONAL CONFERENCE ON BIG DATA》 * |
| 申小伟 等: "一种面向科学计算的数据流优化方法", 《计算机学报》 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109189477B (en) | 2021-09-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104040492B (en) | Microprocessor accelerated code optimizer and dependency reordering method | |
| US10235398B2 (en) | Processor and data gathering method | |
| CN1267819C (en) | Computer system internal instruction processing device | |
| Fang et al. | swdnn: A library for accelerating deep learning applications on sunway taihulight | |
| CN104040490B (en) | Code optimizer for the acceleration of multi engine microprocessor | |
| KR101731752B1 (en) | Combined branch target and predicate prediction | |
| US4827403A (en) | Virtual processor techniques in a SIMD multiprocessor array | |
| US5226131A (en) | Sequencing and fan-out mechanism for causing a set of at least two sequential instructions to be performed in a dataflow processing computer | |
| US20080250227A1 (en) | General Purpose Multiprocessor Programming Apparatus And Method | |
| KR20160046331A (en) | High-performance processor system and method based on a common unit | |
| JPS59132049A (en) | Data processing system | |
| CN104040491A (en) | A microprocessor accelerated code optimizer | |
| DE69231762D1 (en) | RISC PROCESSOR WITH EXTENDABLE ARCHITECTURE | |
| CN105579967A (en) | GPU divergence barrier | |
| CN101373426A (en) | Data processing system for performing SIMD operations and method thereof | |
| US9836324B2 (en) | Interleave-scheduling of correlated tasks and backfill-scheduling of depender tasks into a slot of dependee tasks | |
| CN108052347A (en) | A kind of device for executing instruction selection, method and command mappings method | |
| US9785469B2 (en) | Detection of time points to voluntarily yield resources for context switching | |
| CN105528195B (en) | A kind of flight scoreboard processing method for supporting simultaneous multi-threading to instruct out of order transmitting | |
| CN110852046B (en) | Block induction sequencing method and system for text suffix index | |
| CN108776833A (en) | A kind of data processing method, system and computer readable storage medium | |
| US20210166156A1 (en) | Data processing system and data processing method | |
| CN109062604A (en) | A kind of launching technique and device towards the mixing execution of scalar sum vector instruction | |
| Haseeb et al. | Evaluating Performance and Portability of a core bioinformatics kernel on multiple vendor GPUs | |
| CN108845829A (en) | Method for executing system register access instruction |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 100095 room 135, 1st floor, building 15, Chuangke Town, Wenquan Town, Haidian District, Beijing Applicant after: Beijing Zhongke Ruixin Technology Group Co.,Ltd. Address before: 1 wensong Road, Zhongguancun environmental protection park, Beiqing Road, Haidian District, Beijing 100095 Applicant before: SMARTCORE (BEIJING) Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |