CN109166169A - A kind of hardware realization of GPGPU texture sampler - Google Patents
A kind of hardware realization of GPGPU texture sampler Download PDFInfo
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- CN109166169A CN109166169A CN201810853065.9A CN201810853065A CN109166169A CN 109166169 A CN109166169 A CN 109166169A CN 201810853065 A CN201810853065 A CN 201810853065A CN 109166169 A CN109166169 A CN 109166169A
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- 238000001914 filtration Methods 0.000 claims abstract description 11
- 238000005070 sampling Methods 0.000 claims abstract description 9
- 238000006243 chemical reaction Methods 0.000 claims 2
- 238000000034 method Methods 0.000 abstract description 6
- 238000013507 mapping Methods 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 238000004364 calculation method Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 abstract description 2
- 238000003786 synthesis reaction Methods 0.000 abstract description 2
- 230000003111 delayed effect Effects 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T15/00—3D [Three Dimensional] image rendering
- G06T15/04—Texture mapping
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Graphics (AREA)
- Image Generation (AREA)
- Image Processing (AREA)
Abstract
For in texture mapping application process a large amount of in GPGPU, if using common texture sampler, the problems such as upper layer logic needs cross the border according to the wraparound of texture coordinate, texture frame, need repeatedly to send texture reads request, then the operation such as synthesis is filtered to data according to multiple groups texture pixel, cause upper layer logic interface efficiency low, reduces overall performance.In order to solve this problem, the invention discloses a kind of hardware implementations of GPGPU texture sampling unit, the filtering operation of the texture picture pixel of address calculation and return when automatically completing texture wraparound and crossing the border, bottleneck effect of the texture sampler in 3 D image drawing engine is reduced, the overall operation speed of upper layer logic is greatly improved.
Description
Technical field
Present invention relates generally to the 3-D graphic in the design of GPGPU graph processing chips to generate field.Refer in particular to pixel line
The design of reason filling and the texture sampling unit of loading section.
Background technique
In the application of GPGPU graphics process, it is often necessary to use mapped pinup picture process (i.e. by the two dimension in caching
Image data is loaded into the graph image of 3 D stereo modeling).Under current application, texture mapping process needs frequent visit
Memory and the various operations of execution, design efficiency greatly restricts the speed and performance of three-dimensional drawing engine, in reality
Often become the bottleneck of three-dimensional drawing engine in design.During texture mapping, texture sampler is responsible for from 2 d texture
Multiple groups texture pixel color value is obtained in picture, and is translated into the real-texture pixel color component value of texture function needs
Task, designing efficient texture sampler has crucial promotion to make GPGPU entirety 3 D image drawing engine performance
With.
Summary of the invention
For in texture mapping application process a large amount of in GPGPU, if using common texture sampler, upper layer logic
The problems such as needing the wraparound according to texture coordinate, texture frame to cross the border needs repeatedly to send texture reads request, then according to more
Group texture pixel is filtered the operation such as synthesis to data, causes upper layer logic interface efficiency low, reduces overall performance.In order to
Solve the problems, such as this, the invention discloses a kind of hardware implementations of GPGPU texture sampling unit, automatically complete texture around
The filtering operation of the texture picture pixel of address calculation and return when returning and crossing the border reduces texture sampler in 3-D graphic
Bottleneck effect in drawing engine greatly improves the overall operation speed of upper layer logic.
Compared with prior art, advantages of the present invention is that 1, structure is simple: texture sampler list proposed by the present invention
Member is all to compare the algorithm realized conducive to chip hardware design, institutional framework is clear not using complicated algorithm;2, property
It can be excellent: using the executive mode of full flowing water in texture sampler unit actual design process proposed by the present invention, and protecting
In the case where demonstrate,proving operation execution efficiency, hardware resource is reduced as far as possible;3, it is widely used: texture sampler proposed by the present invention
Unit not only can be used in GPGPU, can also be widely used in handle the pictures application;3, easy to use: the present invention
The texture sampler unit input/output port signal and timing of proposition are clearly penetrating, have readable, reusability well
And portability.
Detailed description of the invention
Fig. 1 texture sampler unit internal structure of the present invention;
Fig. 2 texture sampler coordinate system (rectangle of 16x16).
Specific embodiment
The present invention is described in further details below with reference to the drawings and specific embodiments.
As shown in Figure 1, texture sampler internal structure disclosed by the invention includes sample request parsing, sampling address life
Five groups of unit modules are had altogether at data buffer storage, data texturing parsing, texture filtering processing in, piece.
Sample request parsing: this module receives the texture coordinate that top level control unit is sent and is parsed and decoupled;Such as
Shown in Fig. 2, when overflow and underflow occurs in the coordinate of texture, need to read the border color value and texture picture face of respective texture
Color executes filtering operation;When wraparound occurs in texture, need to read current line from texture picture according to different wraparound modes
The pixel color value of coordinate and texture wraparound coordinate is managed, and records and send wraparound mode, instructs subsequent texture filtering
Module is properly received the texture picture data that data buffer storage returns in piece.
Texture address generates: this module, which is responsible for being generated in corresponding piece according to the texture coordinate that texture resolution unit is sent, to be delayed
Corresponding inquiry address is deposited, the tissue for inquiring address need to consider that the particularity of texture sampling algorithm is handled, and guarantee necessity
Piece in cache reading efficiency.
Data buffer storage in piece: this module is as the data high-speed caching built in texture sampling unit, reasonable cache
Internal data structure can reduce sampler to the number of external memory access, reduce the dependence to external memory bandwidth.
Data texturing resolution unit: according to current texture format, the texture picture data that data buffer storage in piece is exported
It is parsed, is split as the texture component letter of the three-dimensional drawings engines such as transparency, red, green, blue coloration, intensity and depth support
Breath.
Texture filtering processing unit: the filtering algorithm that this module is specified according to top level control unit, texture filtering algorithm branch
The filtering algorithms such as nearest value algorithm and linear interpolation are held, nearest value algorithm is directly rounded according to the fractional part of texture coordinate
Choose corresponding pixel;Line style interpolation carries out Weight operation to adjacent pixel according to texture coordinate fractional part, obtains true
The real corresponding texture pixel component value of texture coordinate.
Claims (5)
1. texture sampling request analysis: being crossed the border situation according to texture coordinate and texture wraparound and texture frame, work as texture coordinate
When there is overflow (i.e. developed width and height of the coordinate more than texture picture) and underflow (texture coordinate is calculated as negative), carry out
The parsing of sample request is sent and the generation of cache access address conversion.
2. texture sampling address generates: the particularity accessed according to texture sampling, by texture transverse and longitudinal coordinate as unit of bit position
It is divided into image rectangular block, the adjacent texture picture piecemeal of Low-level coordinate is stored.
3. interior data buffer storage: data high-speed caching is using image rectangular block as basic unit in piece;Carry out the loading of data texturing
And replacement.
4. data texturing parses: according to the particularity of texture requirements for access, data buffer storage carries out efficient data access simultaneously in piece
Picture pixels value in real-time return cache is completed at the same time image data to pixel transparent degree (Alpha), red (Red), green
(Green), the conversion and parsing of blue (Blue) component.
5. texture filtering algorithm: texture filtering algorithm carries out on the basis of using nearest value algorithm and line style interpolation algorithm.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112233159A (en) * | 2020-09-23 | 2021-01-15 | 华夏芯(北京)通用处理器技术有限公司 | Texture processing method and device |
CN113194266A (en) * | 2021-04-28 | 2021-07-30 | 深圳迪乐普数码科技有限公司 | Image sequence frame real-time rendering method and device, computer equipment and storage medium |
Citations (6)
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US5764237A (en) * | 1994-10-07 | 1998-06-09 | Kaneko; Koichi | Texture mapping apparatus computing texture address by fill address |
EP1434171A2 (en) * | 1995-08-04 | 2004-06-30 | Microsoft Corporation | Method and system for texture mapping a source image to a destination image |
CN101810485A (en) * | 2009-02-23 | 2010-08-25 | 株式会社东芝 | Medical image-processing apparatus and medical image processing method |
US20110050687A1 (en) * | 2008-04-04 | 2011-03-03 | Denis Vladimirovich Alyshev | Presentation of Objects in Stereoscopic 3D Displays |
US20140215453A1 (en) * | 2013-01-31 | 2014-07-31 | Htc Corporation | Methods for application management in an electronic device supporting hardware acceleration |
CN106201390A (en) * | 2015-05-29 | 2016-12-07 | 三星电子株式会社 | Method and the electronic installation of support the method for output screen |
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2018
- 2018-07-30 CN CN201810853065.9A patent/CN109166169A/en active Pending
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US5764237A (en) * | 1994-10-07 | 1998-06-09 | Kaneko; Koichi | Texture mapping apparatus computing texture address by fill address |
EP1434171A2 (en) * | 1995-08-04 | 2004-06-30 | Microsoft Corporation | Method and system for texture mapping a source image to a destination image |
US20110050687A1 (en) * | 2008-04-04 | 2011-03-03 | Denis Vladimirovich Alyshev | Presentation of Objects in Stereoscopic 3D Displays |
CN101810485A (en) * | 2009-02-23 | 2010-08-25 | 株式会社东芝 | Medical image-processing apparatus and medical image processing method |
US20140215453A1 (en) * | 2013-01-31 | 2014-07-31 | Htc Corporation | Methods for application management in an electronic device supporting hardware acceleration |
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Non-Patent Citations (1)
Title |
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刘俞辰: "基于CUDA的快速三维超声成像研究", 《中国优秀硕士学位论文全文数据库(电子期刊)信息科技辑》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112233159A (en) * | 2020-09-23 | 2021-01-15 | 华夏芯(北京)通用处理器技术有限公司 | Texture processing method and device |
CN113194266A (en) * | 2021-04-28 | 2021-07-30 | 深圳迪乐普数码科技有限公司 | Image sequence frame real-time rendering method and device, computer equipment and storage medium |
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Application publication date: 20190108 |