CN109151620B - Aggregation group port switching method and device and Optical Line Terminal (OLT) equipment - Google Patents
Aggregation group port switching method and device and Optical Line Terminal (OLT) equipment Download PDFInfo
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- CN109151620B CN109151620B CN201710509797.1A CN201710509797A CN109151620B CN 109151620 B CN109151620 B CN 109151620B CN 201710509797 A CN201710509797 A CN 201710509797A CN 109151620 B CN109151620 B CN 109151620B
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
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- H04L47/10—Flow control; Congestion control
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Abstract
The invention provides a method and a device for switching ports of an aggregation group and Optical Line Terminal (OLT) equipment, wherein the method comprises the following steps: a network processor receives a control message sent by a CPU, wherein the message header of the control message carries port information of an aggregation group member to be switched; the network processor switches the ports of the aggregation group members according to the information of the ports of the aggregation group members, and solves the problem of long port switching time caused by process communication between CPUs in the related art by using a general hardware resource mode of the network processor, thereby improving the switching rate of the ports of the aggregation group members.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a method and an apparatus for switching an aggregation group port, and an optical line terminal OLT device.
Background
A network processor is a programmable device that is specifically adapted for various tasks of a communication network, such as packet processing, protocol analysis, route lookup, QoS, etc. A multi-kernel parallel processor structure is adopted, and an on-chip processor is roughly divided into a core processor and a forwarding engine according to tasks. The special hardware coprocessor is used for realizing general functional modules requiring high-speed processing by adopting special hardware so as to improve the system performance. Multiple network processors can be interconnected to form a network processor cluster to support larger high-speed network processing.
Port aggregation is to aggregate a plurality of ports together to form an aggregation group, so as to realize load sharing among each member port, and simultaneously provide higher connection reliability. Port aggregation may be configured on the ports within a group so that traffic may be automatically load balanced on those ports. To reduce the number of network packets lost during the addition or deletion of aggregation group member ports, we need to shorten the port switching time as much as possible.
The traditional port switching of the aggregation group adopts a centralized processing mode, inter-board communication is utilized, a line card sends a message to a main control board, and the main control board sends a processing result to the line card for processing.
The traditional port switching steps of the aggregation group are as follows: the change of the port state is informed to the main control board, the main control board sends a processing message to the line card, the central processing unit CPU of the line card sends an instruction to the protocol layer of the network processor, the protocol layer configures the port information and sends the port information to the bottom layer of the network processor, and the bottom layer calls microcode to read and write the hardware port information table, so that the switching of the port state is completed. How to simplify the above process, reduce the communication time of each step, and control the switching time within ms becomes one of the technical difficulties in developing network processors.
For the problem of long port switching time caused by process communication between CPUs in the related art, no solution is provided.
Disclosure of Invention
The embodiment of the invention provides a method and a device for switching ports of an aggregation group and an Optical Line Terminal (OLT) device, which are used for at least solving the problem of longer port switching time caused by process communication between CPUs in the related art.
According to an embodiment of the present invention, a method for switching an aggregation group port is provided, including:
a network processor receives a control message sent by a CPU, wherein the message header of the control message carries port information of an aggregation group member to be switched;
and the network processor performs switching processing on the port of the aggregation group member according to the information of the port of the aggregation group member.
Optionally, the switching, by the network processor, the aggregation group member port according to the aggregation group member port information includes:
and the network processor adds or deletes the port of the aggregation group member according to the port information of the aggregation group member.
Optionally, the adding or deleting, by the network processor, the aggregation group member port according to the aggregation group member port information includes:
the network processor searches a hardware table according to the port information of the aggregation group member through a corresponding microcode program;
and adding or deleting the corresponding aggregation group member port in the hardware table.
Optionally, the method further comprises:
and when the corresponding port of the aggregation group member is added or deleted in the hardware table, the protocol layer of the network processor performs configuration according to the message header information of the control message, and adds or deletes the item of the software table corresponding to the port information of the aggregation group member.
Optionally, the receiving, by the network processor, the control packet sent by the CPU includes:
the control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when aggregation group member port information carried by a message header of the control message is a port of the network processor, the network processor receives the unicast packet insertion message sent by the CPU;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, the network processor receives a broadcast packet insertion message sent by the CPU, and broadcasts the broadcast packet insertion message out through a microcode program, wherein the broadcast packet insertion message is used for the network processor of the corresponding port to process through the microcode program.
According to another embodiment of the present invention, there is also provided an aggregation group port switching method, including:
the CPU polls whether the port state of the aggregation group member changes or not;
when the status of the port of the aggregation group member changes, the CPU sends a control packet to a network processor, where a packet header of the control packet carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to perform switching processing on the port of the aggregation group member.
Optionally, the sending, by the CPU, the control packet to the network processor includes:
and the CPU sends a control message to the network processor by adopting an interrupt reporting mechanism.
Optionally, the sending, by the CPU, the control packet to the network processor includes:
the control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the CPU sends the unicast packet insertion message to the network processor;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, the CPU sends a broadcast packet insertion message to the network processor, wherein the broadcast packet insertion message is used for being broadcasted by the network processor through a microcode program, and the network processor of the corresponding port processes the broadcast packet insertion message through the microcode program.
According to another embodiment of the present invention, there is also provided an aggregation group port switching apparatus applied to a network processor, including:
the receiving module is used for receiving a control message sent by the CPU, wherein the message header of the control message carries port information of the aggregation group member to be switched;
and the switching processing module is used for switching the port of the aggregation group member according to the information of the port of the aggregation group member.
Optionally, the switching processing module is further configured to
And the network processor adds or deletes the port of the aggregation group member according to the port information of the aggregation group member.
Optionally, the switching processing module is further configured to
Searching a hardware table according to the port information of the aggregation group member through a corresponding microcode program;
and adding or deleting the corresponding aggregation group member port in the hardware table.
Optionally, the apparatus further comprises:
and the adding or deleting module is used for configuring according to the message header information of the control message through a protocol layer while adding or deleting the corresponding port of the aggregation group member in the hardware table, and adding or deleting the item of the software table corresponding to the port information of the aggregation group member.
Optionally, the receiving module is further used for
The control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the unicast packet insertion message sent by the CPU is received;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, receiving a broadcast packet insertion message sent by the CPU, and broadcasting the broadcast packet insertion message through a microcode program, wherein the broadcast packet insertion message is used for the network processor of the corresponding port to process through the microcode program.
According to another embodiment of the present invention, there is also provided an aggregation group port switching apparatus applied to a CPU, including:
the polling module is used for polling whether the port state of the aggregation group member changes;
and a sending module, configured to send a control packet to a network processor when the status of the port of the aggregation group member changes, where a packet header of the control packet carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to perform switching processing on the port of the aggregation group member.
Optionally, the sending module is further configured to send a control packet to the network processor by using an interrupt reporting mechanism.
Optionally, the sending module is further configured to
The control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the unicast packet insertion message is sent to the network processor;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, sending a broadcast packet insertion message to the network processor, wherein the broadcast packet insertion message is used for being broadcasted by the network processor through a microcode program, and the network processor of the corresponding port processes the broadcast packet insertion message through the microcode program.
There is also provided in accordance with yet another embodiment of the present invention an optical line termination, OLT, device comprising an add-on card including a CPU and a network processor, wherein,
the CPU is used for polling whether the port state of the aggregation group member changes; when the port state of the aggregation group member changes, sending a control message to a network processor, wherein the message header of the control message carries port information of the aggregation group member to be switched;
and the network processor is used for receiving the control message and switching the ports of the aggregation group members according to the port information of the aggregation group members.
Optionally, the network processor further comprises:
and the microcode module is used for searching a hardware table according to the port information of the aggregation group member, and adding or deleting the corresponding port of the aggregation group member in the hardware table.
Optionally, the network processor is further configured to, while adding or deleting the corresponding aggregation group member port in the hardware table, perform configuration according to header information of the control packet through a protocol layer, and add or delete a software table entry corresponding to the aggregation group member port information.
According to yet another embodiment of the present invention, there is also provided a storage medium including a stored program, wherein the program performs any one of the above methods when executed.
According to yet another embodiment of the present invention, there is also provided a processor for executing a program, wherein the program executes to perform the method of any one of the above.
According to the invention, a network processor receives a control message sent by a CPU, wherein the message head of the control message carries the port information of the aggregation group member to be switched; the network processor switches the ports of the aggregation group members according to the information of the ports of the aggregation group members, and solves the problem of long port switching time caused by process communication between CPUs in the related art by using a general hardware resource mode of the network processor, thereby improving the switching rate of the ports of the aggregation group members.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
fig. 1 is a first flowchart of an aggregation group port switching method according to an embodiment of the present invention;
fig. 2 is a flowchart ii of an aggregation group port switching method according to an embodiment of the present invention;
FIG. 3 is a first flowchart of a CPU issuing a control message according to an embodiment of the present invention;
FIG. 4 is a flowchart II of a CPU issuing a control message according to an embodiment of the present invention;
figure 5 is a network topology diagram of line card master card logical connections according to an embodiment of the present invention;
FIG. 6 is a diagram illustrating a control message format according to an embodiment of the present invention;
fig. 7 is a schematic diagram of an SG hardware table format according to an embodiment of the present invention;
FIG. 8 is a block diagram of an aggregation group port switching device according to an embodiment of the present invention;
fig. 9 is a block diagram of a second configuration of the aggregation group port switching device according to the embodiment of the present invention.
Detailed Description
The invention will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Example 1
In this embodiment, a method for switching an aggregation group port is provided, and fig. 1 is a first flowchart of a method for switching an aggregation group port according to an embodiment of the present invention, as shown in fig. 1, the flowchart includes the following steps:
step S102, a network processor receives a control message sent by a CPU, wherein the message head of the control message carries port information of a polymerization group member to be switched;
and step S104, the network processor performs switching processing on the port of the aggregation group member according to the information of the port of the aggregation group member.
Through the steps, the network processor receives a control message sent by the CPU, wherein the message header of the control message carries the port information of the aggregation group member to be switched; the network processor switches the ports of the aggregation group members according to the information of the ports of the aggregation group members, and solves the problem of long port switching time caused by process communication between CPUs in the related art by using a general hardware resource mode of the network processor, thereby improving the switching rate of the ports of the aggregation group members.
Optionally, the switching, by the network processor, the aggregation group member port according to the aggregation group member port information may include: and the network processor adds or deletes the port of the aggregation group member according to the port information of the aggregation group member.
Optionally, the adding or deleting, by the network processor, the aggregation group member port according to the aggregation group member port information may include: the network processor searches a hardware table according to the port information of the aggregation group member through a corresponding microcode program; and adding or deleting the corresponding aggregation group member port in the hardware table.
Optionally, the method further comprises: and when the corresponding port of the aggregation group member is added or deleted in the hardware table, the protocol layer of the network processor performs configuration according to the message header information of the control message, and adds or deletes the item of the software table corresponding to the port information of the aggregation group member.
Optionally, the receiving, by the network processor, the control packet sent by the CPU may include: the control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when aggregation group member port information carried by a message header of the control message is a port of the network processor, the network processor receives the unicast packet insertion message sent by the CPU;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, the network processor receives a broadcast packet insertion message sent by the CPU, and broadcasts the broadcast packet insertion message out through a microcode program, wherein the broadcast packet insertion message is used for the network processor of the corresponding port to process through the microcode program.
Example 2
According to another embodiment of the present invention, there is further provided an aggregation group port switching method, and fig. 2 is a second flowchart of the aggregation group port switching method according to the embodiment of the present invention, as shown in fig. 2, the flowchart includes the following steps:
step S202, the CPU polls whether the port state of the aggregation group member changes;
step S204, when the status of the port of the aggregation group member changes, the CPU sends a control message to a network processor, wherein the message header of the control message carries the port information of the aggregation group member to be switched, and the port information of the aggregation group member is used for the network processor to switch the port of the aggregation group member.
Through the steps, when the port state of the aggregation group member changes, a control message is sent to a network processor, wherein the message header of the control message carries the port information of the aggregation group member to be switched; the network processor switches the ports of the aggregation group members according to the information of the ports of the aggregation group members, and solves the problem of long port switching time caused by process communication between CPUs in the related art by using a general hardware resource mode of the network processor, thereby improving the switching rate of the ports of the aggregation group members.
Optionally, the sending, by the CPU, the control packet to the network processor may include: and the CPU sends a control message to the network processor by adopting an interrupt reporting mechanism.
Optionally, the sending, by the CPU, the control packet to the network processor may include: the control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the CPU sends the unicast packet insertion message to the network processor;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, the CPU sends a broadcast packet insertion message to the network processor, wherein the broadcast packet insertion message is used for being broadcasted by the network processor through a microcode program, and the network processor of the corresponding port processes the broadcast packet insertion message through the microcode program.
A method for improving the port switching rate of the aggregation group member is provided by utilizing a general hardware resource mode of a network processor, and the problem that the port switching time is long due to process communication between the traditional CPUs is solved. The embodiment of the invention adopts a distributed in-band transmission communication mode, utilizes an interrupt reporting mechanism of a local CPU, the local CPU sends a control message to a network processor, the control message comprises information of the port of an aggregation group member to be deleted or added, and the network processor realizes the addition or deletion of the port of the aggregation group member according to the port information of the control message. Fig. 3 is a first flowchart of a CPU issuing a control message according to an embodiment of the present invention, and as shown in fig. 3, the specific steps are as follows:
step S302, when the CPU detects that the port state of the aggregation group member is changed from up to down or from down to up, the CPU sends a control message to a network processor NP, and the head of the message carries the information of the port of the aggregation group member to be added or deleted;
step S304, controlling the message to enter a microcode module of the network processor;
step S306, the corresponding microcode program looks up the hardware table according to the port information and the like, corresponding aggregation group member ports are added or deleted in the hardware table when the table is looked up, and missed microcode does not operate;
step S308, after the network processor protocol layer receives the control message, the configuration is carried out according to the message header information, and the corresponding software table entry is added or deleted.
When the aggregation group receives the network stream, the deleted port does not receive the stream any more, so that the rapid convergence of the aggregation group is realized; the port just added will receive the flow, and fast load sharing of the aggregation group is realized. There are two triggers for fast port switching of the aggregation group: interrupts and port polling. But the interrupt is only responsive to the plugging and unplugging action of the fibre, so the worst performance of fast switching depends on the period of port polling and thread priority.
Fig. 4 is a flowchart of a second process for issuing a control message by a CPU according to an embodiment of the present invention, and as shown in fig. 4, the specific steps are as follows:
the control messages are divided into unicast control messages and broadcast control messages. When the port information carried by the message header is the port of the network processor, the CPU of the local board sends a unicast packet insertion message for microcode processing; when the port information carried by the message head is not the port of the network processor, the CPU of the local board sends a broadcast packet insertion message, the microcode broadcasts the message out, the network processor microcode of the corresponding port processes the message, and the processed message is returned.
The polling method is that the CPU sends a request to inquire whether the port information is updated or not, and the CPU may inquire the updated information, but returns the empty information most of the time. Regardless of the query result, the CPU will continue the next round of queries at the next point in time. It can be seen that the port polling CPU has a long response time and low efficiency, and the switching performance may reach the ms level only after the priority of the polling port thread is increased to the maximum and the polling period is set as short as possible.
Step S402, CPU interruption begins, and control message is sent;
step S404, judging whether the message type is the port switching of the aggregation group, if so, executing step S406, otherwise, executing step S408;
step S406, determining whether the microcode checks the port information of the hardware table, and executing step S410, otherwise, executing step S412;
step S408, other microcode processing flows;
step S410, the microcode adds/deletes the port of the aggregation group;
in step S412, the microcode discards the message.
The interrupt mode adopts the interrupt packet insertion of the CPU of the board, and the microcode is directly processed, and the intermediate steps are omitted as follows: the protocol layer of the network processor issues configuration to the bottom layer, and the bottom layer receives the configuration information and enters microcode processing. This way, the switching time can be controlled within ms.
The traditional port switching adopts a centralized distribution scheme, an inter-board communication mechanism is utilized to inform a main control board of the state change of the port, the main control board processes a message and sends the message to a line card, and a line card CPU performs corresponding processing according to the message type, so that the efficiency is low; the interrupt mode does not need to send messages by the main control board for port switching, an in-band transmission mode is adopted, and the interrupt packet sending is directly processed by the line card CPU according to the change of the port state, so that the port switching efficiency is greatly improved.
It is important that the interruption of reporting enables fast port switching and also adds anti-jitter (anti-jitter) operations. By link jitter, it is understood that repeated rapid plugging of the port fiber results in the port state continuing during the up- > down, down- > up variation. Because the port link jitter triggers fast switching, the aggregation group member port which has been added back or deleted by the network processor is mistakenly deleted or added, and the network processor does not respond to the jitter and does not delete or add the member port again, so that the port which should be added is deleted, and the port which should be deleted still exists, which causes member port configuration information error.
The anti-jitter method for port fast switching is that when port jitter occurs for the first time, the network processor adds or deletes the corresponding port of the aggregation group member, records the time, ignores the change if the CPU detects the change of the port state again in the specified time, and triggers the interrupt operation again if the change is more than the specified time, thus effectively avoiding the repeated configuration error of the port in a short time.
In addition, the advantages of the method for realizing the quick port switching by the CPU interrupt of the board are also embodied in that: the CPU only needs to send specific control information to the network processor, and the microcode of the network processor carries out the read-write operation of hardware table resource according to the type of the control information, and directly completes the quick switching of the port. Compared with the traditional switching, the inter-board communication step is omitted.
The response time of the embodiment of the invention is composed of two parts: when the CPU reaches the microcode processing time, the network processor reads and writes the software table time. The former is a hardware flow, and the microcode module is very efficient in processing messages. The reading and writing can be directly carried out without microcode, so the speed is very high. Therefore, the response time of the method is much shorter than that of the general port fast switching process.
Therefore, the method of the invention adopts a distributed in-band transmission mode, can effectively reduce the average response time of port switching of the aggregation group, does not need special hardware to search hardware, and can be realized by depending on common hardware resources of a common network processor.
The following describes embodiments of the present invention in further detail with reference to specific examples.
In an EPON network, an OLT includes a master card, an add-on card, a pon card, and onu. The add-on cards and pon cards are collectively referred to as line cards, and only one line card of a network processor is considered here. Fig. 5 is a network topology diagram of a line card master card logical connection according to an embodiment of the present invention, and as shown in fig. 5, the uplink and downlink flow directions are opposite.
The aggregation group function is implemented only on the add-on card, and the pon card does not have this function. And the CPU of the upper connection card generates an interrupt report when detecting that the state of the member port changes, and calls a port interrupt processing function to perform unicast or broadcast packet insertion. Fig. 6 is a schematic diagram of a control packet format according to an embodiment of the present invention, and as shown in fig. 6, the packet format is divided into two parts: control message type and port information. The control message type is designated as an aggregation group member to be updated, the port information comprises an effective flag bit valid, an aggregation group ID, a port value portId, and the port operation is as follows: add/delete, MAC address MAC _ addr, vlan value vlan id, etc. Fig. 7 is a schematic diagram of an SG hardware table format according to an embodiment of the present invention, and as shown in fig. 7, the SG hardware table format uses an aggregation group ID number as a table lookup key value, and the table entry content is member port information corresponding to the ID number. And adding/deleting the corresponding port from the aggregation group when the SG table is checked, and discarding the message when the SG table is not checked. In addition, in order to keep the consistency of the contents of the hardware table and the software cache table, the CPU sends a control message to a protocol layer of the network processor, and the protocol layer updates the port cache information.
Without loss of generality, the information acquired by the line card CPU and not the aggregation port of the circuit board is considered. The treatment process is as follows: the CPU of the line card interrupts the report and calls a port interrupt processing function to perform broadcast packet insertion. The microcode of the network processor receives the plug-in packet, judges that the plug-in packet is not the port of the line card, broadcasts the packet out, and the remote end completes the updating operation of the aggregation port after the corresponding upper connection card receives the broadcast packet and sends a notification message. The microcode of the network processor updates the SG hardware table according to the notification message.
In the embodiment of the invention, a distributed in-band transmission mode is adopted, the line card sends the port change information to the main control board, the main control board sends the information to the line card after the processing is finished, the line card CPU sends the aggregation port update information to the protocol layer, and the protocol layer configures the aggregation port information to the network processor.
Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
Example 3
In this embodiment, a port switching device of an aggregation group is further provided, and the device is used to implement the foregoing embodiments and preferred embodiments, and details of which have been already described are omitted. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 8 is a block diagram of a first configuration of an aggregation group port switching device according to an embodiment of the present invention, as shown in fig. 8, the device includes:
a receiving module 82, configured to receive a control packet sent by a CPU, where a packet header of the control packet carries port information of a to-be-switched aggregation group member;
and a switching processing module 84, configured to perform switching processing on the aggregation group member port according to the aggregation group member port information.
Optionally, the switching processing module 84 is further configured to
And the network processor adds or deletes the port of the aggregation group member according to the port information of the aggregation group member.
Optionally, the switching processing module 84 is further configured to
Searching a hardware table according to the port information of the aggregation group member through a corresponding microcode program;
and adding or deleting the corresponding aggregation group member port in the hardware table.
Optionally, the apparatus further comprises:
and the adding or deleting module is used for configuring according to the message header information of the control message through a protocol layer while adding or deleting the corresponding port of the aggregation group member in the hardware table, and adding or deleting the item of the software table corresponding to the port information of the aggregation group member.
Optionally, the receiving module 82 is further configured to
The control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the unicast packet insertion message sent by the CPU is received;
and when the aggregation group member port information carried by the message header of the control message is not the port of the network processor, receiving a broadcast packet insertion message sent by the CPU, and broadcasting the broadcast packet insertion message through a microcode program, wherein the broadcast packet insertion message is used for processing by the network processor of the corresponding port through the microcode program.
Example 4
According to another embodiment of the present invention, there is further provided an aggregation group port switching apparatus applied to a CPU, and fig. 9 is a block diagram of a structure of the aggregation group port switching apparatus according to the embodiment of the present invention, as shown in fig. 9, the apparatus includes:
a polling module 92, configured to poll whether a port status of an aggregation group member changes;
a sending module 94, configured to send a control packet to a network processor when the status of the port of the aggregation group member changes, where a packet header of the control packet carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to perform switching processing on the port of the aggregation group member.
Optionally, the sending module 94 is further configured to send a control packet to the network processor by using an interrupt reporting mechanism.
Optionally, the sending module 94 is further configured to
The control message comprises a unicast packet insertion message and a broadcast packet insertion message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the unicast packet insertion message is sent to the network processor;
and when the information of the port of the aggregation group member carried by the message header of the control message is not the port of the network processor, sending a broadcast packet insertion message to the network processor, wherein the broadcast packet insertion message is used for being broadcasted by the network processor through a microcode program, and the network processor of the corresponding port processes the broadcast packet insertion message through the microcode program.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
Example 5
There is also provided in accordance with yet another embodiment of the present invention an optical line termination, OLT, device comprising an add-on card including a CPU and a network processor, wherein,
the CPU is used for polling whether the port state of the aggregation group member changes; when the port state of the aggregation group member changes, sending a control message to a network processor, wherein the message header of the control message carries port information of the aggregation group member to be switched;
and the network processor is used for receiving the control message and switching the port of the aggregation group member according to the port information of the aggregation group member.
Optionally, the network processor further comprises:
and the microcode module is used for searching a hardware table according to the port information of the aggregation group member, and adding or deleting the corresponding port of the aggregation group member in the hardware table.
Optionally, the network processor is further configured to, while adding or deleting the corresponding aggregation group member port in the hardware table, perform configuration according to header information of the control packet through a protocol layer, and add or delete a software table entry corresponding to the aggregation group member port information.
Example 6
An embodiment of the present invention further provides a storage medium including a stored program, where the program executes any one of the methods described above.
Alternatively, in the present embodiment, the storage medium may be configured to store program codes for performing the following steps:
s11, receiving a control message sent by a CPU, wherein the message header of the control message carries the information of the port of the aggregation group member to be switched;
and S12, switching the port of the aggregation group member according to the information of the port of the aggregation group member.
Optionally, the storage medium is further arranged to store program code for performing the steps of:
s21, polling whether the port state of the aggregation group member changes;
and S21, when the status of the port of the aggregation group member changes, sending a control message to a network processor, wherein a message header of the control message carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to switch the port of the aggregation group member.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing program codes, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
Embodiments of the present invention also provide a processor configured to execute a program, where the program executes to perform any of the steps in the method.
Optionally, in this embodiment, the program is configured to perform the following steps:
s31, receiving a control message sent by a CPU, wherein the message header of the control message carries the information of the port of the aggregation group member to be switched;
and S32, switching the port of the aggregation group member according to the information of the port of the aggregation group member.
Optionally, the program is further configured to perform the following steps:
s41, polling whether the port state of the aggregation group member changes;
and S41, when the status of the port of the aggregation group member changes, sending a control message to a network processor, wherein a message header of the control message carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to switch the port of the aggregation group member.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented in a general purpose computing device, they may be centralized on a single computing device or distributed over a network of two computing devices, and optionally they may be implemented in program code executable by a computing device, such that they may be stored in a memory device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into separate integrated circuit modules, or two of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the principle of the present invention should be included in the protection scope of the present invention.
Claims (15)
1. An aggregation group port switching method, comprising:
a network processor receives a control message sent by a Central Processing Unit (CPU), wherein the message header of the control message carries port information of a polymerization group member to be switched;
and the network processor performs switching processing on the port of the aggregation group member according to the information of the port of the aggregation group member.
2. The method according to claim 1, wherein the network processor performing a switching process on the aggregation group member port according to the aggregation group member port information includes:
and the network processor adds or deletes the port of the aggregation group member according to the port information of the aggregation group member.
3. The method of claim 2, wherein the network processor adding or deleting aggregation group member ports according to the aggregation group member port information comprises:
the network processor searches a hardware table according to the port information of the aggregation group member through a corresponding microcode program;
and adding or deleting the corresponding aggregation group member port in the hardware table.
4. The method of claim 3, further comprising:
and when the corresponding port of the aggregation group member is added or deleted in the hardware table, the protocol layer of the network processor performs configuration according to the message header information of the control message, and adds or deletes the item of the software table corresponding to the port information of the aggregation group member.
5. The method according to any one of claims 1 to 4, wherein the network processor receiving the control message sent by the CPU comprises:
the control message comprises a unicast control message and a broadcast control message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the network processor receives the unicast control message sent by the CPU;
and when the aggregation group member port information carried by the message header of the control message is not the port of the network processor, the network processor receives the broadcast control message sent by the CPU, and broadcasts the broadcast control message out through a microcode program, wherein the broadcast control message is used for the network processor of the corresponding port to process through the microcode program.
6. An aggregation group port switching method, comprising:
a Central Processing Unit (CPU) polls whether the port state of the aggregation group member changes;
when the status of the port of the aggregation group member changes, the CPU sends a control packet to a network processor, where a packet header of the control packet carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to perform switching processing on the port of the aggregation group member.
7. The method of claim 6, wherein sending, by the CPU, a control message to the network processor comprises:
and the CPU sends a control message to the network processor by adopting an interrupt reporting mechanism.
8. The method of claim 6 or 7, wherein sending, by the CPU, a control message to the network processor comprises:
the control message comprises a unicast control message and a broadcast control message, and when the port information of the aggregation group member carried by the message header of the control message is the port of the network processor, the CPU sends the unicast control message to the network processor;
and when the port information of the aggregation group member carried by the message header of the control message is not the port of the network processor, the CPU sends a broadcast control message to the network processor, wherein the broadcast control message is used for being broadcasted by the network processor through a microcode program, and the network processor of the corresponding port processes the broadcast control message through the microcode program.
9. An aggregation group port switching device applied to a network processor, comprising:
the system comprises a receiving module, a switching module and a switching module, wherein the receiving module is used for receiving a control message sent by a Central Processing Unit (CPU), and a message header of the control message carries port information of a to-be-switched aggregation group member;
and the switching processing module is used for switching the port of the aggregation group member according to the information of the port of the aggregation group member.
10. A port switching device of an aggregation group is applied to a Central Processing Unit (CPU), and is characterized by comprising:
the polling module is used for polling whether the port state of the aggregation group member changes;
and a sending module, configured to send a control packet to a network processor when the status of the port of the aggregation group member changes, where a packet header of the control packet carries information of the port of the aggregation group member to be switched, and the information of the port of the aggregation group member is used for the network processor to perform switching processing on the port of the aggregation group member.
11. An optical line terminal OLT device comprises an upper connection card, characterized in that the upper connection card comprises a central processing unit CPU and a network processor, wherein,
the CPU is used for polling whether the port state of the aggregation group member changes; when the port state of the aggregation group member changes, sending a control message to a network processor, wherein the message header of the control message carries port information of the aggregation group member to be switched;
and the network processor is used for receiving the control message and switching the port of the aggregation group member according to the port information of the aggregation group member.
12. The device of claim 11, wherein the network processor further comprises:
and the microcode module is used for searching a hardware table according to the port information of the aggregation group member, and adding or deleting the corresponding port of the aggregation group member in the hardware table.
13. The apparatus of claim 12,
the network processor is further configured to, while adding or deleting the corresponding aggregation group member port in the hardware table, perform configuration according to header information of the control packet through a protocol layer, and add or delete a software table entry corresponding to the aggregation group member port information.
14. A storage medium comprising a stored program, wherein the program when executed performs the method of any one of claims 1 to 5, 6 to 8.
15. A processor, configured to run a program, wherein the program when running performs the method of any one of claims 1 to 5, 6 to 8.
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| CN115347942B (en) * | 2022-08-31 | 2024-05-07 | 云合智网(上海)技术有限公司 | Method, device, equipment and storage medium for realizing anti-jitter of optical fiber path |
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