CN109065689B - Micro LED packaging structure and preparation method thereof - Google Patents
Micro LED packaging structure and preparation method thereof Download PDFInfo
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- CN109065689B CN109065689B CN201810788191.0A CN201810788191A CN109065689B CN 109065689 B CN109065689 B CN 109065689B CN 201810788191 A CN201810788191 A CN 201810788191A CN 109065689 B CN109065689 B CN 109065689B
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 238000002360 preparation method Methods 0.000 title description 5
- 239000010410 layer Substances 0.000 claims abstract description 47
- 229910000679 solder Inorganic materials 0.000 claims abstract description 14
- 239000011241 protective layer Substances 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims abstract description 9
- 239000000126 substance Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 7
- 238000001465 metallisation Methods 0.000 claims description 6
- 239000011810 insulating material Substances 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- 238000005086 pumping Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000002834 transmittance Methods 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 238000009616 inductively coupled plasma Methods 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a Micro LED packaging structure, which comprises a CMOS structure, a light emitting diode, solder paste used for connecting the CMOS structure and the light emitting diode, and a transparent protective layer arranged on the upper surface of the light emitting diode; the light emitting diode comprises a P pole, an N pole arranged below the P pole at intervals and a quantum well arranged between the lower surface of the P pole and the upper surface of the N pole; and a layer of insulating substance for improving the luminous efficiency of the light-emitting diode is arranged at the gap formed between the N pole and the P pole. The Micro LED is of a common P-N structure, so that the influence on a CMOS structure caused by first Bonding and then etching existing in the common N-type structure is effectively avoided; the problem of precision and the problem of release caused by the mass transfer of the separated LED chips are effectively solved; the Micro LED packaging structure can effectively improve the light efficiency, the electrical conductivity and the light transmittance of the Micro chip.
Description
Technical Field
The invention belongs to the technical field of semiconductor illumination. And more particularly, to a Micro LED package structure and a method of manufacturing the same.
Background
Micro LED technology, namely LED miniaturization and matrixing technology; refers to the high density micro-sized LED size integrated on a chip, such as an LED display screen, where each pixel is addressable and individually driven to light, reducing the pixel level from millimeter level to micrometer level. The Micro LED not only inherits the advantages of high efficiency, high brightness, high reliability and quick response time of the traditional LED, but also has the characteristics of energy conservation, simple mechanism, small volume, thinness and no need of backlight source for light emission.
Micro LEDs typically have a PN junction diode that is made up of a direct bandgap semiconductor. At present, three major categories are mainly presented for the Micro LED process; the first is Chip bonding (Chip bonding), cutting the LEDs directly into Micro LEDs of micron level, and bonding Micro LEDs chips of micron level one by one on a display substrate by using SMT technology or COB technology; the second is epitaxial bonding (Wafer bonding), in which inductively coupled plasma etching (ICP) is used to directly form nano-scale Micro LED pump crystal film structure on the epitaxial film layer of the LED, the fixed interval of the structure is the interval required by display scribing, then the LED Wafer is directly bonded on the drive circuit substrate, and finally the substrate is peeled off by using a physical or chemical mechanism; and thirdly, film transfer (Thin film transfer), namely peeling the LED substrate by using a physical or chemical mechanism to temporarily load the LED pump crystal film layer on the substrate, forming a Micro-scale Micro LED pump crystal film structure by utilizing ICP, and finally, carrying out batch transfer by utilizing a specific transfer jig and bonding the Micro LED pump crystal film structure on the drive circuit substrate to form the display scriber.
Disclosure of Invention
To solve the above technical problems, a first object of the present invention is to provide a Micro LED package structure. The Micro LED packaging structure is a common P-N structure and has excellent light efficiency, conductivity and light transmittance.
The second object of the invention is to provide a preparation method of the Micro LED packaging structure.
In order to achieve the above purpose, the invention adopts the following technical scheme:
a Micro LED packaging structure comprises a CMOS structure, a light emitting diode, solder paste used for connecting the CMOS structure and the light emitting diode, and a transparent protective layer arranged on the upper surface of the light emitting diode;
the light emitting diode comprises a P pole, an N pole arranged below the P pole at intervals and a quantum well arranged between the lower surface of the P pole and the upper surface of the N pole; and a layer of insulating substance for improving the luminous efficiency of the light-emitting diode is arranged at the gap formed between the N pole and the P pole.
Preferably, the transparent protection layer is disposed on the upper surface of the P-electrode and is used for protecting the P-electrode from the external environment so as to improve the service life thereof.
Preferably, the lower surface of the N pole of the light emitting diode is metallized and then connected with the CMOS structure through solder paste.
Preferably, the CMOS structure includes a substrate, an insulating layer disposed on the substrate, and a metal layer spaced apart on the insulating layer.
Preferably, the upper surface of the metal layer and the metallized lower surface of the N electrode are just connected through solder paste.
Preferably, the substrate is a GaN/Si substrate.
Preferably, the metal layer includes, but is not limited to, an Au layer or an Ag layer.
Preferably, the transparent protective layer includes, but is not limited to, ITO or FTO.
Preferably, the P-poles are electrically connected and the N-poles are electrically independent of each other.
A preparation method of a Micro LED packaging structure comprises the following steps:
1) Sequentially arranging a continuous N pole, a continuous quantum well and a continuous P pole on the GaN/Si substrate from bottom to top to form a pumping layer; then, fixing the P electrode of the pump crystal layer on the lower surface of the temporary transfer substrate so as to protect the P electrode;
2) Removing the GaN/Si substrate by laser stripping, carrying out metallization treatment on the lower surface of the exposed N pole, and then carrying out etching treatment on the N pole after the metallization treatment until the P pole is etched, so that the continuous N pole is divided into N pole structures with a certain interval, thereby forming a plurality of independent LEDs;
3) Filling a layer of insulating material at the independent LED interval, fixing the LED with the insulating layer on the metal layer of the CMOS structure through solder paste, finally stripping the temporary transfer substrate on the P electrode, and covering the surface of the P electrode with a transparent protective layer; and obtaining the Micro LED packaging structure.
The beneficial effects of the invention are as follows:
1. according to the Micro LED co-P N-division structure, the process mode of etching first and then Bonding is adopted, so that the influence on a CMOS structure caused by the fact that the co-N-type structure exists in the mode of Bonding first and then etching can be effectively avoided.
2. Due to the small size of the Micro LED packaging structure and the precision problem of mass transfer, the method can avoid the single chip alignment problem of independent micron-level chip mass transfer, and simultaneously avoid the single chip position deviation movement and the like caused by the mass transfer.
3. The Micro LED packaging structure can effectively improve the light efficiency, the electrical conductivity and the light transmittance of the Micro chip.
Drawings
The following describes the embodiments of the present invention in further detail with reference to the drawings.
Fig. 1 shows a schematic diagram of a Micro LED package structure of the present invention.
Fig. 2 shows a schematic process for preparing the Micro LED package structure of the present invention.
Wherein, 1, a transparent protective layer, 2, solder paste, 3, insulating substances, 4, a CMOS structure, 5, a light emitting diode, 6, a temporary transfer substrate, 401, a GaN/Si substrate, 402, an insulating layer, 403, a metal layer, 501, an N pole, 502, a P pole, 503 and a quantum well.
Detailed Description
In order to more clearly illustrate the present invention, the present invention will be further described with reference to preferred embodiments and the accompanying drawings. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and that this invention is not limited to the details given herein.
In one embodiment of the present invention, as shown in fig. 1, a Micro LED package structure is provided, which includes a CMOS structure 4, a light emitting diode 5, a solder paste 2 for connecting the CMOS structure 4 and the light emitting diode 5, and a transparent protective layer 1 disposed on an upper surface of the light emitting diode 5.
The light emitting diode 5 comprises a P electrode 502 and an N electrode 501 which is arranged below the P electrode 502 at intervals; and a quantum well 503 disposed between the P-pole 502 and the N-pole 501; the CMOS structure 4 includes a substrate 401, an insulating layer 402 disposed on the substrate 401, and a metal layer 403 disposed on the insulating layer 402 at intervals; the gap formed between the N pole 501 and the P pole 502 is filled with a layer of insulating material 3, and the insulating material 3 not only can ensure that the cut side face of the N pole 501 chip is smooth, but also can limit light in the N pole chip, thereby improving the luminous efficiency of the light-emitting diode 5.
In the embodiment of the invention, the lower surface of the N pole 501 of the light emitting diode 5 is connected with the CMOS structure 4 through the solder paste 2 after being metallized; preferably, the lower surface of the N electrode 501 after being metallized is in one-to-one correspondence with the upper surface of the metal layer 403, and the areas are the same; the upper surface of the metal layer 403 is connected with the lower surface of the metallized N-electrode 501 by solder paste.
In an embodiment of the present invention, the substrate is a GaN/Si substrate 401; the metal layer 403 can improve the light emitting efficiency of the light emitting diode 5; the metal layer 403 includes, but is not limited to, an Au layer or an Ag layer; the transparent protective layer 1 is disposed on the upper surface of the P-electrode 502, and is used for protecting the P-electrode 502 from the external environment, and improving the light transmittance of the light emitting diode 5; the transparent protective layer 1 includes, but is not limited to, ITO or FTO.
In the embodiment of the present invention, the P-poles 502 are electrically connected, and the N-poles 501 are electrically independent from each other.
In embodiments of the present invention, the insulating substance 3 at the gap formed between the N-pole 501 and the P-pole 502 and the insulating layer 402 of the CMOS structure 4 may be the same or different insulating materials.
The light emitting diode 5 in the Micro LED packaging structure is arranged below the P electrode 502 at intervals to form a plurality of independent LEDs as the N electrode 501 is arranged; therefore, the problem of single chip alignment existing in the huge amount transfer of the independent micron-sized chips can be avoided, and the problems of single chip position deviation movement and the like caused by the huge amount transfer can be avoided. In addition, the Micro LED packaging structure can effectively improve the light efficiency, the light transmittance and the electrical conductivity of the Micro chip.
As shown in fig. 2, a preparation method of a Micro LED package structure includes the following steps:
step one: a continuous N pole 501, a quantum well 503 and a P pole 502 are sequentially arranged on a GaN/Si substrate 401 from bottom to top to form a pumping layer; then, fixing the P electrode 502 of the pumping crystal layer on the lower surface of the temporary transfer substrate 6 to protect the P electrode 502;
step two: removing the GaN/Si substrate 401 by laser lift-off (LLC), and performing metallization treatment on the lower surface of the exposed N pole 501;
step three: etching the metallized N electrode 501 until the N electrode 502 is etched, so that the continuous N electrode 501 and the quantum well 503 are divided into N electrode structures with a certain interval, and a P-N sharing structure is formed, namely a plurality of independent LEDs are formed;
step four: filling a layer of insulating substance 3 at the intervals of the independent LEDs, and fixing the LEDs with the insulating substance 3 on the upper surface of the metal layer 403 of the CMOS structure 4 through the solder paste 2; and finally, stripping the temporary transfer substrate 6 on the P electrode 502, and covering the transparent protective layer 1 on the upper surface of the P electrode 502 to obtain the Micro LED packaging structure.
According to the Micro LED co-P N-division structure, the process mode of etching first and then Bonding is adopted, so that the influence on a CMOS structure caused by the fact that the Bonding is firstly conducted and then the etching is conducted in the prior art is effectively avoided.
It should be understood that the foregoing examples of the present invention are provided merely for clearly illustrating the present invention and are not intended to limit the embodiments of the present invention, and that various other changes and modifications may be made therein by one skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims (4)
1. The Micro LED packaging structure is characterized by comprising a CMOS structure, a light-emitting diode, solder paste used for connecting the CMOS structure and the light-emitting diode, and a transparent protective layer arranged on the upper surface of the light-emitting diode;
the light emitting diode comprises a P pole, an N pole arranged below the P pole at intervals and a quantum well arranged between the lower surface of the P pole and the upper surface of the N pole; a layer of insulating substance for improving the luminous efficiency of the light-emitting diode is arranged at the gap formed between the N pole and the P pole;
the transparent protective layer is arranged on the upper surface of the P electrode and is used for protecting the P electrode from the influence of external environment so as to prolong the service life of the P electrode;
the lower surface of the N pole of the light-emitting diode is metallized and then connected with the CMOS structure through solder paste;
the CMOS structure comprises a substrate, an insulating layer arranged on the substrate and a metal layer arranged on the insulating layer at intervals;
the upper surface of the metal layer and the lower surface of the N electrode after metallization treatment are just connected through solder paste;
the P poles are electrically connected, and the N poles are electrically independent of each other.
2. The Micro LED package structure of claim 1, wherein the metal layer is an Au layer or an Ag layer.
3. The Micro LED package structure of claim 1, wherein the transparent protective layer is ITO or FTO.
4. A method for manufacturing the Micro LED package structure according to any one of claims 1 to 3, comprising the steps of:
1) Sequentially arranging a continuous N pole, a quantum well and a P pole on a GaN-on-Si substrate from bottom to top to form a pumping layer; then, fixing the P electrode of the pump crystal layer on the lower surface of the temporary transfer substrate so as to protect the P electrode;
2) Removing the GaN-on-Si substrate by laser stripping, carrying out metallization treatment on the lower surface of the exposed N pole, and then carrying out etching treatment on the N pole after the metallization treatment until the P pole is etched, so that the continuous N pole is divided into N pole structures with a certain interval, and a plurality of independent LEDs are formed;
3) Filling a layer of insulating material at the independent LED interval, fixing the LED with the insulating layer on the metal layer of the CMOS structure through solder paste, finally stripping the temporary transfer substrate on the P electrode, and covering the surface of the P electrode with a transparent protective layer; and obtaining the Micro LED packaging structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810788191.0A CN109065689B (en) | 2018-07-18 | 2018-07-18 | Micro LED packaging structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810788191.0A CN109065689B (en) | 2018-07-18 | 2018-07-18 | Micro LED packaging structure and preparation method thereof |
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| Publication Number | Publication Date |
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| CN109065689A CN109065689A (en) | 2018-12-21 |
| CN109065689B true CN109065689B (en) | 2023-09-29 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110660897A (en) * | 2019-11-06 | 2020-01-07 | 苏州市奥视微科技有限公司 | Ultra-high resolution micro display screen and manufacturing process thereof |
| CN111128716B (en) * | 2019-11-15 | 2023-10-17 | 西安电子科技大学 | Heterogeneous integration method for large-area graph self-alignment |
| CN111710689A (en) * | 2020-05-23 | 2020-09-25 | 信阳市谷麦光电子科技有限公司 | Micro LED packaging structure with high color rendering property |
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| JP2006196693A (en) * | 2005-01-13 | 2006-07-27 | Sony Corp | Method for forming semiconductor device and method for mounting semiconductor device |
| CN106206872A (en) * | 2016-08-04 | 2016-12-07 | 南京大学 | GaN base visible ray micron post array LED device that Si CMOS array drive circuit controls and preparation method thereof |
| CN107068665A (en) * | 2017-04-18 | 2017-08-18 | 天津三安光电有限公司 | Micro-led device and preparation method thereof |
| CN208352328U (en) * | 2018-07-18 | 2019-01-08 | 易美芯光（北京）科技有限公司 | A kind of Micro LED encapsulation structure |
-
2018
- 2018-07-18 CN CN201810788191.0A patent/CN109065689B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006196693A (en) * | 2005-01-13 | 2006-07-27 | Sony Corp | Method for forming semiconductor device and method for mounting semiconductor device |
| CN106206872A (en) * | 2016-08-04 | 2016-12-07 | 南京大学 | GaN base visible ray micron post array LED device that Si CMOS array drive circuit controls and preparation method thereof |
| CN107068665A (en) * | 2017-04-18 | 2017-08-18 | 天津三安光电有限公司 | Micro-led device and preparation method thereof |
| CN208352328U (en) * | 2018-07-18 | 2019-01-08 | 易美芯光（北京）科技有限公司 | A kind of Micro LED encapsulation structure |
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| CN109065689A (en) | 2018-12-21 |
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