CN108989747A - Video-splicing method and device across more GPU chips - Google Patents
Video-splicing method and device across more GPU chips Download PDFInfo
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- CN108989747A CN108989747A CN201810732002.8A CN201810732002A CN108989747A CN 108989747 A CN108989747 A CN 108989747A CN 201810732002 A CN201810732002 A CN 201810732002A CN 108989747 A CN108989747 A CN 108989747A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/265—Mixing
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Studio Circuits (AREA)
Abstract
The invention discloses a kind of video-splicing method and device across more GPU chips, method includes: the input decoded video source of GPU or CPU；Video source is split into at least two video area according to configuration file；Video area is distributed to some GPU to show；AMD GPU, NVIDIA GPU or INTEL GPU is chosen to show the video area being assigned to；Carry out the buffering of AMD GPU, NVIDIA GPU or NVIDIA GPU video；Buffered video after fractionation is spliced；The different GPU video sources of same time period are subjected to picture synchronization broadcasting；Original complete image after display splicing.The present invention is able to achieve the chip partially or fully picture that carries out picture splicing, one or more GPU can arbitrarily be selected to carry out one image of tiled display of tri- kinds of across NVIDIA GPU, AMD GPU, INTEL GPU different manufacturers.
Description
Technical field
The present invention relates to protection and monitor field, in particular to a kind of video-splicing method and device across more GPU chips.
Background technique
When safety defense monitoring system is there are when several hundred thousands of road videos, since picture is too many, display is limited, and display screen
General size is within 55 cun, and most monitoring room indicator screens are at 22 cun or so.Screen is smaller, and picture is also smaller.So needing
Numerous display screens is spliced into a large-size screen monitors and does display output, for realizing details monitoring and refinement.
105072353 A of Publication No. CN, name of patent application are a kind of " image decoding spelling control calculation based on more GPU
In the application for a patent for invention of method ", multiple GPU can be called to decode, however it has following defects that and 1) does not support AMD video card
Tiled display, i.e., only support the GPU of multiple NVIDIA chips to do tiled display, does not support the GPU processing video solution with AMD chip
Tiled display after code；2) it does not support to show across different GPU chip processing video-splicings, i.e., does not support to connect NVIDIA chip simultaneously
GPU and AMD chip GPU splices an image simultaneously and shows；3) do not support simultaneously using INTEL CPU, INTEL GPU,
NVIDIA tetra- kinds of processors of chip GPU, AMD chip GPU show some of the same image simultaneously, then are spliced into a completion
Image；4) the GT series of multiple NVIDIA or the GPU tiled display of low side series are only supported；5) hardware selects when product marketization
It selects and is limited, the GPU of NVIDIA can only be selected to do tiled display.
In addition, image mosaic mostly uses the splicer of external hardware, splicing matrix in the market；It needs individually to buy hardware
Equipment is to realize, and with complicated for operation, there is also external hardware connection, need installation wiring, increase many costs.?
The video-splicing system of large-scale multichannel number: in such as monitoring system on 1000 tunnels, expensive, occupancy monitoring room sky is spliced with hardware
Between, complicated for operation, needing to carry out detailed training just will use.
Summary of the invention
The technical problem to be solved in the present invention is that in view of the above drawbacks of the prior art, provide one kind be able to achieve across
NVIDIA GPU, AMD GPU, tri- kinds of different manufacturers of INTEL GPU chip carry out picture splicing, can arbitrarily select one or more
GPU carries out the video-splicing method and device across more GPU chips of the partially or fully picture of one image of tiled display.
The technical solution adopted by the present invention to solve the technical problems is: constructing a kind of video-splicing across more GPU chips
Method includes the following steps:
A the decoded video source of GPU or CPU) is inputted；
B) according to configuration file, the video source is split into at least two video area；
C the video area) is distributed to some GPU according to the configuration file to show, execute step D), D ')
Or D ＂)；
D it) chooses AMD GPU to show the video area being assigned to, executes step E)；
D ') choose NVIDIA GPU to show the video area being assigned to, execute step E ')；
D ＂) choose INTEL GPU to show the video area being assigned to, execute step E ＂)；
E the buffering for) carrying out AMD GPU video, executes step F)；
E ') carry out NVIDIA GPU video buffering, execute step F)；
E ＂) carry out INTEL GPU video buffering, execute step F)；
F) buffered video after fractionation is spliced；
G the different GPU video sources of spliced same time period) are subjected to picture synchronization broadcasting；
H) the original complete image after display splicing.
In the video-splicing method of the present invention across more GPU chips, the number of the video area is 2~16
It is a.
In the video-splicing method of the present invention across more GPU chips, the slow of the AMD GPU video is being carried out
Punching, the buffering of NVIDIA GPU video or INTEL GPU video buffering when, be the video area is temporarily put into memory into
Row caching.
The invention further relates to a kind of devices for realizing the above-mentioned video-splicing method across more GPU chips, comprising:
Input unit: for inputting the decoded video source of GPU or CPU；
Split cells: for according to configuration file, the video source to be split at least two video area；
GPU display unit: it is shown for the video area to be distributed to some GPU according to the configuration file；
AMD GPU selected cell: for choosing AMD GPU to show the video area being assigned to；
NVIDIA GPU selected cell: NVIDIA GPU is chosen to show the video area being assigned to；
INTEL GPU selected cell: for choosing INTEL GPU to show the video area being assigned to；
AMD GPU video buffer unit: for carrying out the buffering of AMD GPU video；
NVIDIA GPU video buffer unit: for carrying out the buffering of NVIDIA GPU video；
INTEL GPU video buffer unit: for carrying out the buffering of INTEL GPU video；
Concatenation unit: for splicing the buffered video after splitting；
Unit is played simultaneously: for the different GPU video sources of spliced same time period to be carried out picture synchronization broadcasting；
Spliced display unit: for the original complete image after display splicing.
In device of the present invention, the number of the video area is 2~16.
In device of the present invention, in buffering, the buffering of NVIDIA GPU video for carrying out the AMD GPU video
Or INTEL GPU video buffering when, be temporarily to be put into the video area in memory to cache.
Implement the video-splicing method and device of the invention across more GPU chips, has the advantages that due to that will regard
Frequency source splits at least two video area；Video area some GPU is distributed to according to configuration file to show；Choose AMD
GPU shows the video area being assigned to；NVIDIA GPU is chosen to show the video area being assigned to；INTEL GPU is chosen to show
The video area being assigned to；Carry out the buffering of AMDGPU video；Carry out the buffering of NVIDIA GPU video；Carry out INTEL GPU
The buffering of video；Buffered video after fractionation is spliced；The different GPU video sources of spliced same time period are carried out
Picture synchronization plays；Original complete image after display splicing, therefore it is able to achieve across NVIDIA GPU, AMD GPU, INTEL
The chip of tri- kinds of different manufacturers of GPU carries out picture splicing, one or more GPU can arbitrarily be selected to carry out one image of tiled display
Partially or fully picture.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the flow chart of method in video-splicing method and device one embodiment of the invention across more GPU chips；
Fig. 2 is the structural schematic diagram of device in the embodiment.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
In video-splicing method and device embodiment of the present invention across more GPU chips, the video across more GPU chips is spelled
The flow chart for connecing method is as shown in Figure 1.In Fig. 1, the video-splicing method across more GPU chips of being somebody's turn to do includes the following steps:
Step S01 inputs the decoded video source of GPU or CPU: in this step, inputting the decoded video of GPU or CPU
Source.
Step S02 splits at least two video area according to configuration file, by video source: in this step, according to configuration text
Video source is split at least two video area, that is, a complete video is split, the video area split out by part
At least 2, domain, in the present embodiment, the number of the video area split out can be 2~16.Such as: it is complete by one
Video is split as 4 video areas, 4 video areas after being split, i.e. the first video area, the second video area,
Third video area and the 4th video area.
Video area is distributed to some GPU according to configuration file and shown by step S03: in this step, according to configuration
Video area after fractionation is distributed to some GPU and shown by file.This step has been executed, step S04, step S04 ' are executed
Or step S04 ＂.
Step S04 chooses AMD GPU to show the video area being assigned to: in this step, choosing AMDGPU to show and is assigned to
Video area, specifically, AMD GPU receives the video area that is arbitrarily designated and shows.This step has been executed, step is executed
Rapid S05.
Step S04 ' chooses NVIDIA GPU to show the video area being assigned to: in this step, choosing NVIDIA GPU aobvious
Show the video area being assigned to, specifically, NVIDIA GPU receives the video area being arbitrarily designated and shows.It has executed
Step executes step S05 '.
Step S04 ＂ chooses INTEL GPU to show the video area being assigned to: in this step, INTELGPU being chosen to show point
The video area being fitted on, specifically, INTEL GPU receives the video area being arbitrarily designated and shows.This step has been executed,
Execute step S05 ＂.
The buffering of step S05 progress AMD GPU video: after video is split, when being shown by different hardware, can exist
Video first can temporarily be put that memory etc. is to be shown at this time by delay, to realize the slow of the progress AMD GPU video in this step
Punching.This step has been executed, step S06 is executed.
The buffering of step S05 ' carry out NVIDIA GPU video: after video is split, when being shown by different hardware, meeting
There are delays, video first temporarily can be put that memory etc. is to be shown at this time, to realize the carry out NVIDIA GPU view in this step
The buffering of frequency.This step has been executed, step S06 is executed.
The buffering of step S05 ＂ progress INTEL GPU video: after video is split, when being shown by different hardware, meeting
There are delays, video first temporarily can be put that memory etc. is to be shown at this time, to realize the carry out INTEL GPU video in this step
Buffering.This step has been executed, step S06 is executed.
It can be seen that by step S05, step S05 ' and step S05 ＂ in buffering, the NVIDIA for carrying out AMD GPU video
It is temporarily to be put into video area in memory to cache when the buffering of GPU video or the buffering of INTEL GPU video.
Step S06 splices the buffered video after fractionation: in this step, reading the view of the same time period in memory
Frequency is spliced, and is spliced the buffered video after fractionation with realizing.
The different GPU video sources of spliced same time period are carried out picture synchronization broadcasting by step S07: in this step,
The different GPU video sources of spliced same time period are subjected to picture synchronization broadcasting, that is, different GPU video sources are carried out
Picture, which plays, to be synchronized.
Original complete image after step S08 display splicing: will form original complete image after splicing, in this step, show
Show the spliced original complete image.
Video-splicing method across more GPU chips of the invention is the video-splicing across more producer GPU, and a width is complete
For image segmentation at more than two video areas, each GPU, which is obtained, shows one of video area, of the invention across more GPU
It is existing that the video-splicing method of chip can solve the asynchronous of picture, generation image offset and delay when each GPU shows image
As the problem of.It can solve and splice stationary problem across same type GPU card, also can solve across variety classes GPU stationary problems.This hair
The bright video-splicing method across more GPU chips solves across variety classes GPU decodings first, then does tiled display.It can be seen that
One image segmentation is first multiple video areas (display area) by the video-splicing method across more GPU chips of the invention,
Video-splicing and display across variety classes GPU are carried out again.Video-splicing method across more GPU chips of the invention may be implemented
Multi-channel video hardware splicing in the market, and it is able to achieve across NVIDIA GPU, AMD GPU, INTEL GPU tri- kinds of different manufacturers
The partially or fully picture that chip carries out picture splicing, one or more GPU can arbitrarily be selected to carry out one image of tiled display.
The present embodiment further relates to a kind of device for realizing the video-splicing method across more GPU chips, and the structure of the device is shown
It is intended to as shown in Figure 2.In Fig. 2, which includes that input unit 1, split cells 2, GPU display unit 3, AMD GPU choose list
Member 4, NVIDIA GPU selected cell 5, INTEL GPU selected cell 6, AMD GPU video buffer unit 7, NVIDIA GPU view
INTEL GPU video buffer unit 9, concatenation unit 10, unit 11 and spliced display unit 12 is played simultaneously in frequency buffer cell 8；
Wherein, input unit 1 is for inputting the decoded video source of GPU or CPU；Split cells 2 is used for according to configuration file, by video source
Split at least two video area；Namely a complete video is split, the video area split out at least 2,
In the present embodiment, the number of the video area split out can be 2~16.Such as: a complete video is split as 4
Video area, 4 video areas after being split, i.e. the first video area, the second video area, third video area and
4th video area.
GPU display unit 3 is shown for video area to be distributed to some GPU according to configuration file；AMD GPU choosing
Middle unit 4 is for choosing AMD GPU to show the video area being assigned to；Specifically, AMD GPU receives the video being arbitrarily designated
Region is simultaneously shown.NVIDIA GPU selected cell 5 chooses NVIDIA GPU to show the video area being assigned to；Specifically,
NVIDIA GPU receives the video area being arbitrarily designated and shows.INTEL GPU selected cell 6 is for choosing INTEL GPU
Show the video area being assigned to；Specifically, INTEL GPU receives the video area being arbitrarily designated and shows.
AMD GPU video buffer unit 7 is used to carry out the buffering of AMD GPU video；NVIDIA GPU video buffer unit 8
For carrying out the buffering of NVIDIA GPU video；INTEL GPU video buffer unit 9 is used to carry out the slow of INTEL GPU video
Punching；Concatenation unit 10 is used to splice the buffered video after splitting；Pass through AMD GPU video buffer unit 7, NVIDIA
GPU video buffer unit 8 and INTEL GPU video buffer unit 9 as can be seen that the buffering for carrying out AMD GPU video,
It is temporarily to be put into video area in memory to cache when the buffering of NVIDIAGPU video or the buffering of INTEL GPU video
's.Unit 11 is played simultaneously for the different GPU video sources of spliced same time period to be carried out picture synchronization broadcasting；Also
It is that different GPU video sources are carried out picture to play synchronization.Spliced display unit 12 is used for the original complete image after display splicing.
In short, in the present embodiment, the splicing of multi-channel video hardware in the market is may be implemented in the present invention, and be able to achieve across
NVIDIA GPU, AMD GPU, tri- kinds of different manufacturers of INTEL GPU chip carry out picture splicing, can arbitrarily select one or more
The partially or fully picture of GPU progress one image of tiled display.Present invention could apply to safety defense monitoring systems, can also apply
It shows in large screen splicing advertisement machine, multi-screen decoded output, large screen splicing decoding, various outdoor mosaic screens, and high definition is needed to decode
The product of display.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (6)
1. a kind of video-splicing method across more GPU chips, which comprises the steps of:
A the decoded video source of GPU or CPU) is inputted；
B) according to configuration file, the video source is split into at least two video area；
C the video area) is distributed to some GPU according to the configuration file to show, execute step D), D ') or
D ＂)；
D it) chooses AMD GPU to show the video area being assigned to, executes step E)；
D ') choose NVIDIA GPU to show the video area being assigned to, execute step E ')；
D ＂) choose INTEL GPU to show the video area being assigned to, execute step E ＂)；
E the buffering for) carrying out AMD GPU video, executes step F)；
E ') carry out NVIDIA GPU video buffering, execute step F)；
E ＂) carry out INTEL GPU video buffering, execute step F)；
F) buffered video after fractionation is spliced；
G the different GPU video sources of spliced same time period) are subjected to picture synchronization broadcasting；
H) the original complete image after display splicing.
2. the video-splicing method according to claim 1 across more GPU chips, which is characterized in that the video area
Number is 2~16.
3. the video-splicing method according to claim 1 or 2 across more GPU chips, which is characterized in that described in progress
It is by the video area when buffering of the buffering of AMD GPU video, the buffering of NVIDIA GPU video or INTEL GPU video
Domain is temporarily put into be cached in memory.
4. a kind of device for realizing the video-splicing method as described in claim 1 across more GPU chips, which is characterized in that packet
It includes:
Input unit: for inputting the decoded video source of GPU or CPU；
Split cells: for according to configuration file, the video source to be split at least two video area；
GPU display unit: it is shown for the video area to be distributed to some GPU according to the configuration file；
AMD GPU selected cell: for choosing AMD GPU to show the video area being assigned to；
NVIDIA GPU selected cell: NVIDIA GPU is chosen to show the video area being assigned to；
INTEL GPU selected cell: for choosing INTEL GPU to show the video area being assigned to；
AMD GPU video buffer unit: for carrying out the buffering of AMD GPU video；
NVIDIA GPU video buffer unit: for carrying out the buffering of NVIDIA GPU video；
INTEL GPU video buffer unit: for carrying out the buffering of INTEL GPU video；
Concatenation unit: for splicing the buffered video after splitting；
Unit is played simultaneously: for the different GPU video sources of spliced same time period to be carried out picture synchronization broadcasting；
Spliced display unit: for the original complete image after display splicing.
5. device according to claim 4, which is characterized in that the number of the video area is 2~16.
6. device according to claim 4 or 5, which is characterized in that the buffering for carrying out the AMD GPU video,
It is that the video area is temporarily put into memory to carry out when the buffering of NVIDIA GPU video or the buffering of INTEL GPU video
Caching.
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Application publication date: 20181211 |