CN108962745A - The production method of patterned method and semiconductor devices - Google Patents
The production method of patterned method and semiconductor devices Download PDFInfo
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- CN108962745A CN108962745A CN201710386698.9A CN201710386698A CN108962745A CN 108962745 A CN108962745 A CN 108962745A CN 201710386698 A CN201710386698 A CN 201710386698A CN 108962745 A CN108962745 A CN 108962745A
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- 238000000034 method Methods 0.000 title claims abstract description 60
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 72
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 238000005530 etching Methods 0.000 claims abstract description 50
- 239000007789 gas Substances 0.000 claims abstract description 33
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 21
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 21
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 18
- 239000001301 oxygen Substances 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 51
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 26
- JJWKPURADFRFRB-UHFFFAOYSA-N carbonyl sulfide Chemical compound O=C=S JJWKPURADFRFRB-UHFFFAOYSA-N 0.000 claims description 22
- 230000003667 anti-reflective effect Effects 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 16
- 239000011248 coating agent Substances 0.000 claims description 15
- 238000000576 coating method Methods 0.000 claims description 15
- 238000001312 dry etching Methods 0.000 claims description 15
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 claims description 13
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 13
- 239000001569 carbon dioxide Substances 0.000 claims description 13
- 229910002091 carbon monoxide Inorganic materials 0.000 claims description 13
- 239000006117 anti-reflective coating Substances 0.000 claims description 10
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 6
- 229910052731 fluorine Inorganic materials 0.000 claims description 6
- 239000011737 fluorine Substances 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 229920005591 polysilicon Polymers 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 4
- 230000001939 inductive effect Effects 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 description 11
- 230000008569 process Effects 0.000 description 11
- 239000003795 chemical substances by application Substances 0.000 description 7
- 230000008859 change Effects 0.000 description 4
- 238000001459 lithography Methods 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- DXHPZXWIPWDXHJ-UHFFFAOYSA-N carbon monosulfide Chemical compound [S+]#[C-] DXHPZXWIPWDXHJ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910003481 amorphous carbon Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 102100022717 Atypical chemokine receptor 1 Human genes 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 101000678879 Homo sapiens Atypical chemokine receptor 1 Proteins 0.000 description 1
- YZCKVEUIGOORGS-IGMARMGPSA-N Protium Chemical compound [1H] YZCKVEUIGOORGS-IGMARMGPSA-N 0.000 description 1
- 241000720974 Protium Species 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000007385 chemical modification Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32131—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
- H01L21/32132—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only of silicon-containing layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention discloses a kind of patterned method and the production methods of semiconductor devices, including a photoresist pattern is formed in a substrate；Using photoresist pattern as mask, required pattern is formed in the substrate by etching technics, and the gas of carbon containing-oxygen is at least passed through in etching technics.More accurate being transferred in substrate of photoresist pattern can be formed required pattern by the gas that carbon containing-oxygen is passed through in etching technics, can be improved patterned precision, be helped to improve the performance of semiconductor devices.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to the production of a kind of patterned method and semiconductor devices
Method.
Background technique
In technical field of semiconductors, lithography and etching technique is the technology being commonly used in semiconductor devices production, is led to
Often, photoetching process, which is included in above substrate, coats resist (or photoresist), and photoresist is exposed to such as deep ultraviolet (Deep
Ultra Violet, DUV) ray or extreme ultraviolet (Extreme Ultra Violet, EUV) ray radiation it is (i.e. exposed
Journey), and development and partly stripping photoresist to form photoetching agent pattern above substrate；Then, with photoetching agent pattern into
The photoetching agent pattern of design is transferred in substrate by row etching technics, with formed structure needed for semiconductor devices (or figure
Case).In etching technics, as photoetching agent pattern line width roughness (Line Width Roughness, abbreviation LWR) and/or
Some features such as line edge roughness (Line Edge Roughness, abbreviation LER) will be all transferred in substrate (as partly led
In the structures such as the grid in body device), therefore, lithography and etching technique is also referred to as patterned process.
With the reduction of dimensions of semiconductor devices, the requirement for lithography and etching technique is especially stringent, needs constantly to mention
Rise patterned precision, wherein the selection in the LWR and/or LER and etching technics of photoetching agent pattern is than being the weight paid close attention to
Want index.As the LWR of photoetching agent pattern and/or LER smaller, more pattern can be accurately transferred in substrate；Moreover, working as
When etching selection ratio is higher, patterned process window is bigger, is conducive to etching precision.As it can be seen that smaller LWR and/or LER,
And higher etching selection ratio more helps to improve the performance of semiconductor devices.
Therefore, how to reduce the LWR and/or LER of photoetching agent pattern and improve etching selection ratio in patterned process
In have very important significance.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of patterned methods, and pattern is transferred to more accurately
In substrate, to improve the performance of semiconductor devices.
To solve above-mentioned technical problem and relevant issues, patterned method provided by the invention, comprising:
A photoresist pattern is formed in a substrate；
Using the photoresist pattern as mask, pattern needed for being formed in the substrate by etching technics, and described
The gas of carbon containing-oxygen is at least passed through in etching technics.
Optionally, in the patterned method, the gas of the carbon containing-oxygen include carbonyl sulfide, carbon dioxide,
Any one or more combination gas in carbon monoxide.
Optionally, in the patterned method, the etching technics is dry etching.
Optionally, in the patterned method, the dry etching is that inductive coupled plasma etches or holds
Property coupled plasma etch.
Further, in the patterned method, fluorine base gas is also passed through in the dry etching.
Optionally, in the patterned method, the fluorine base gas includes any one in CF4, CF2, SF6
Or multiple combinations gas.
It further, include: that a substrate is provided the step of forming a photoresist pattern in a substrate；It applies on the substrate
Cover photoresist layer；Expose, develop the photoresist layer, form the photoresist pattern on the substrate.
Optionally, in the patterned method, the substrate includes semiconductor substrate；And in the semiconductor
The etachable material layer formed on substrate.
Optionally, in the patterned method, the etachable material layer includes being located in the semiconductor substrate
Polysilicon layer；And the dielectric layer on the polysilicon layer.
Optionally, in the patterned method, the substrate further includes anti-reflection coating, the anti-reflective coating
Coating is located on the etachable material layer.
Further, in the patterned method, the anti-reflection coating includes being located at the etachable material
Dielectric anti reflective coat on layer and the bottom anti-reflective coating layer on the dielectric anti reflective coat.
Further, in the etching technics, the bottom anti-reflective is sequentially etched using the photoresist pattern as mask
Coat and dielectric anti reflective coat are penetrated, to form required pattern.
Another side according to the present invention, the present invention also provides a kind of production method of semiconductor devices, the production method
Including using above-mentioned patterned method, to form the required pattern in the semiconductor devices.
Compared with prior art, the invention has the following advantages:
Patterned method of the invention includes that a photoresist pattern is formed in a substrate；Using the photoresist pattern as covering
Mould forms required pattern by etching technics in the substrate, and the gas of carbon containing-oxygen is at least passed through in the etching technics
Body.Be passed through in etching technics carbon containing-oxygen gas can by photoresist pattern it is more accurate be transferred in substrate formed needed for
Pattern can improve patterned precision, help to improve the performance of semiconductor devices.
Further, when in the gas of the carbon containing-oxygen including CO2 and/or CO, because CO2 and/or CO is in etching technics
In can issue vacuum-ultraviolet light (Vacuum Ultra Violet, VUV), VUV can induce photoresist pattern occur chemistry change
Property, cause chain therein to rearrange, finally make photoresist pattern smooth, i.e., be passed through in the etching technics CO2 and/or
CO can reduce the LWR and/or LER of photoresist pattern, is conducive to accurately to shift photoresist pattern as required pattern, obtain accurate
Critical size structure (or pattern), help to improve the performance of semiconductor devices.
Further, when in the gas of the carbon containing-oxygen including carbonyl sulfide gas, because of carbonyl sulfide gas energy
Enough to form carbon-sulfide linkage (C-S) with the photoresist pattern, C-S has certain protective effect to photoresist pattern, so that photoresist pattern
More etch resistant is conducive to increase patterned process window to improve etching selection ratio, to improve etching precision, improves
The performance of semiconductor devices.
Detailed description of the invention
Fig. 1 is the flow chart of patterned method described in the embodiment of the present invention；
Fig. 2 to Fig. 4 is the corresponding structural schematic diagram of step each in patterned method described in the embodiment of the present invention.
Specific embodiment
Below in conjunction with flow chart and schematic diagram to the production side of patterned method and semiconductor devices of the invention
Method is described in more detail, and which show the preferred embodiment of the present invention, it should be appreciated that those skilled in the art can repair
Change invention described herein, and still realizes advantageous effects of the invention.Therefore, following description should be understood as this
Field technical staff's is widely known, and is not intended as limitation of the present invention.
The present invention is more specifically described by way of example referring to attached drawing in the following passage.It is wanted according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
One of core of the invention thought is that the present invention provides a kind of patterned method, comprising:
Step S1, a photoresist pattern is formed in a substrate；
Step S2, using the photoresist pattern as mask, pattern needed for being formed in the substrate by etching technics, and
The gas of carbon containing-oxygen is at least passed through in the etching technics.
Correspondingly, the production method includes using above-mentioned the present invention also provides a kind of production method of semiconductor devices
Patterned method, to form the required pattern in the semiconductor devices.
Patterned method of the invention includes that a photoresist pattern is formed in a substrate；Using the photoresist pattern as covering
Mould forms required pattern by etching technics in the substrate, and the gas of carbon containing-oxygen is at least passed through in the etching technics
Body.Be passed through in etching technics carbon containing-oxygen gas can by photoresist pattern it is more accurate be transferred in substrate formed needed for
Pattern can improve patterned precision, help to improve the performance of semiconductor devices.
It is exemplified below the embodiment of the production method of the patterned method and semiconductor devices, clearly to illustrate this
The content of invention, it is understood that, the contents of the present invention are not restricted to following embodiment, other to pass through the common skill in this field
The improvement of the conventional technical means of art personnel is also within thought range of the invention.
Referring to FIG. 1 to FIG. 4, wherein, Fig. 1 shows the flow chart of patterned method described in the embodiment of the present invention；
Fig. 2 to Fig. 4 shows the corresponding structural schematic diagram of each step in patterned method described in the embodiment of the present invention.
Firstly, executing step S1, a photoresist pattern is formed in a substrate.The substrate can be multilayer packed structures,
As in the present embodiment, the substrate 1 includes semiconductor substrate 10 and the etachable material formed in the semiconductor substrate 10
The material of layer 11, the semiconductor substrate 10 can be monocrystalline silicon (Si), monocrystalline germanium (Ge), SiGe (GeSi) or silicon carbide
(SiC)；It is also possible to silicon-on-insulator (SOI) or germanium on insulator (GOI)；It or can also be other materials, such as arsenic
Change III-V compounds of group such as gallium；It could be formed with semiconductor device structure, such as source/drain region etc. in the semiconductor substrate 10；
It can be formed in the manufacturing process of subsequent semiconductor devices as gate structure, or production are mutual in the etachable material layer 11
Components, the present invention such as conductive plunger are not limited in any way this in connection structure.Such as in the present embodiment, the etachable material layer 11
It can be, but not limited to include the polysilicon layer 110 and dielectric layer sequentially formed from bottom to top in the semiconductor substrate 10, institute
Giving an account of electric layer can be silica (SiO2) layer, silicon nitride (SiN) layer, tetraethoxysilance (TEOS) layer or amorphous carbon
Any one layer or multiple layer combination layer in (Amorphous Carbon, A-C) layer, preferably, in the present embodiment, being given an account of
Electric layer includes the first silicon oxide layer 111, silicon nitride layer 112, the second silicon oxide layer 113 and A-C layer 114, as shown in Figure 2.
In addition, before the lithography and etching technique (pattern) of semiconductor devices, generated in photoetching to reduce
Influence of phenomena such as diffraction, reflection to photoetching process, the final effect for improving etching, it is preferred that in the present embodiment, at the quarter
Anti-reflection coating 12 is additionally provided between corrosion material layer 11 and subsequent photoresist layer (because mainly containing carbon member in anti-reflection coating
Element, protium and oxygen element), then the substrate 1 further includes anti-reflection coating 12；Further, the anti-reflection coating
12 can also include dielectric anti reflective coat (the Dielectric Anti-Reflect on the etachable material layer 11
Coating, DARC) the 120 and bottom anti-reflective coating layer (Bottom on the dielectric anti reflective coat 120
Anti-Reflect Coating, BARC) 121, as shown in Figure 2.In this way, in the present embodiment, forming one on the substrate
The specific steps of photoresist pattern include: first to coat a photoresist layer (i.e. on the BARC 121) in the substrate 1；Then sharp
Photoresist is formed in the substrate 1 (i.e. on the BARC 121) by exposure, developing process with designed mask
Pattern 20, as shown in Figure 3.It should be noted that the distribution of the photoresist pattern 20 and structure are needed to form according to subsequent
Device architecture designs, and the material of photoresist layer may be either positive photoresist, or negative photoresist, the present invention is herein
These are not construed as limiting, and the photoresist pattern 20 is obtained by the photoetching process that those of ordinary skill in the art are known
It arrives, this will not be repeated here.
Then, step S2 is executed, using the photoresist pattern as mask, needed for being formed in the substrate by etching technics
Pattern, and at least it is passed through in the etching technics gas of carbon containing-oxygen.Preferably, in the present embodiment, the etching technics is
Dry etching, the dry etching can for inductive coupled plasma etching (Inductively Coupled Plasa,
ICP) or capacitively coupled plasma etches (Capouticely Coupled Plasa, CCP), it is clear that the dry etching is also
It can be other kinds of plasma etching.Specifically, being mask with the photoresist pattern 20, successively in the present embodiment
Etch the bottom anti-reflective coating layer 121 and dielectric anti reflective coat 120, obtain bottom antireflective coat pattern 121 ' and
Dielectric anti reflective coats pattern 120 ', structure chart as shown in Figure 4.
In order to enable the photoresist pattern 20 to be accurately transferred in anti-reflection coating 12, in the dry etching
At least it is passed through the gas of carbon containing-oxygen.Preferably, in the present embodiment, the gas of the carbon containing-oxygen can for carbonyl sulfide (COS),
Any one or more combination gas in carbon dioxide (CO2), carbon monoxide (CO).
For example, when passing through CO2 and/or CO in the dry etching, because CO2 and/or CO can be sent out in dry etching
Vacuum-ultraviolet light (Vacuum Ultra Violet, VUV) out, VUV can induce the photoresist pattern 20 that chemical modification occurs,
Rearrange its chain, finally make the photoresist pattern 20 smoothing (can reduce photoresist pattern 20 LWR and/or
LER), the photoresist pattern 20 can be accurately transferred to the bottom anti-reflective coating layer 121 and dielectric anti reflective coating
In layer 120, the required structure (or required pattern) of accurate critical size is obtained, such as bottom antireflective coat pattern 121 ' and Jie
Matter antireflection coats pattern 120 ', to improve the performance of semiconductor devices.
For another example, it is passed through COS in the dry etching, because COS can form carbon-sulfide linkage with the photoresist pattern 20
(C-S), C-S has certain protective effect to the photoresist pattern 20, so that the more etch resistant of photoresist pattern 20 (exists
In etching technics, 20 amount of being consumed of photoresist pattern will be reduced), to improve etching selection ratio, in this way, being conducive to increase patterned
The photoresist pattern 20 can also be accurately transferred to the bottom anti-reflective and applied by process window to improve etching precision
In coating 121 and dielectric anti reflective coat 120, the required structure (or required pattern) of accurate critical size is obtained, the bottom of as
Portion's antireflection coats pattern 121 ' and dielectric anti reflective coats pattern 120 ', can also improve the performance of semiconductor devices.
It for another example, not only can be to the photoresist pattern when passing through COS and CO2 and/or CO in the dry etching
20 have certain protective effect, so that the photoresist pattern 20 more etch resistant is conducive to increase to improve etching selection ratio
Patterned process window；But also the photoresist pattern 20 is enabled to smooth, reduce the LWR of the photoresist pattern 20
And/or LER, it is more conducive to the photoresist pattern 20 being accurately transferred to the bottom anti-reflective coating layer 121 and medium
In anti-reflection coating 120, the required structure (or required pattern) of more accurate critical size is obtained, such as bottom antireflective coat
Pattern 121 ' and dielectric anti reflective coating pattern 120 ' (as shown in Figure 4), further increase the performance of semiconductor devices.
Certainly, it also will use fluorine base gas in above-mentioned dry etching, the fluorine base gas may include CF4, CF2, SF6
In any one or more combination gas.This is that those of ordinary skill in the art are known, is not described in detail herein.
Therefore, photoresist pattern can be made to smooth, and/or improve etching selection ratio by above-mentioned patterned method, all
The required pattern in semiconductor devices is advantageously formed, the performance of semiconductor devices is helped to improve.It should be noted that this hair
Bright required pattern be not limited to the above embodiments in bottom antireflective coat pattern 121 ' and dielectric anti reflective coat pattern
120 ', in other embodiments, required pattern can also be the pattern of the interconnection structure formed in the dielectric layer；Or
The pattern of the gate structure formed in polysilicon layer；And pattern of the corresponding construction formed in other layers etc., the present invention couple
This is not construed as limiting.
To sum up, patterned method of the invention includes that a photoresist pattern is formed in a substrate；With the photoresist pattern
As mask, pattern needed for being formed in the substrate by etching technics, and be at least passed through in the etching technics it is carbon containing-
The gas of oxygen.Be passed through in etching technics carbon containing-oxygen gas can by photoresist pattern it is more accurate be transferred to shape in substrate
At required pattern, patterned precision can be improved, helps to improve the performance of semiconductor devices.
Further, when in the gas of the carbon containing-oxygen including CO2 and/or CO, because CO2 and/or CO is in etching technics
In can issue vacuum-ultraviolet light (Vacuum Ultra Violet, VUV), VUV can induce photoresist pattern occur chemistry change
Property, cause chain therein to rearrange, finally make photoresist pattern smooth, i.e., be passed through in the etching technics CO2 and/or
CO can reduce the LWR and/or LER of photoresist pattern, is conducive to accurately to shift photoresist pattern as required pattern, obtain accurate
Critical size structure (or pattern), help to improve the performance of semiconductor devices.
Further, when in the gas of the carbon containing-oxygen including carbonyl sulfide gas, because of carbonyl sulfide gas energy
Enough to form carbon-sulfide linkage (C-S) with the photoresist pattern, C-S has certain protective effect to photoresist pattern, so that photoresist pattern
More etch resistant is conducive to increase patterned process window to improve etching selection ratio, to improve etching precision, improves
The performance of semiconductor devices.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (13)
1. a kind of patterned method characterized by comprising
A photoresist pattern is formed in a substrate；
Using the photoresist pattern as mask, pattern needed for being formed in the substrate by etching technics, and in the etching
The gas of carbon containing-oxygen is at least passed through in technique.
2. patterned method as described in claim 1, which is characterized in that the gas of the carbon containing-oxygen include carbonyl sulfide,
Any one or more combination gas in carbon dioxide, carbon monoxide.
3. patterned method as described in claim 1, which is characterized in that the etching technics is dry etching.
4. patterned method as claimed in claim 3, which is characterized in that the dry etching is inductive coupled plasma
Etching or capacitively coupled plasma etching.
5. patterned method as claimed in claim 3, which is characterized in that be also passed through fluorine-based gas in the dry etching
Body.
6. patterned method as claimed in claim 5, which is characterized in that the fluorine base gas includes in CF4, CF2, SF6
Any one or more combination gas.
7. the patterned method as described in claim 1 to 6 any one, which is characterized in that form a light in a substrate
Hinder pattern the step of include:
One substrate is provided；
Photoresist layer is coated on the substrate；
Expose, develop the photoresist layer, form the photoresist pattern on the substrate.
8. the patterned method as described in claim 1 to 6 any one, which is characterized in that the substrate includes semiconductor
Substrate；And the etachable material layer formed on the semiconductor substrate.
9. patterned method as claimed in claim 8, which is characterized in that the etachable material layer includes partly leading positioned at described
Polysilicon layer in body substrate；And the dielectric layer on the polysilicon layer.
10. patterned method as claimed in claim 8, which is characterized in that the substrate further includes anti-reflection coating, institute
Anti-reflection coating is stated to be located on the etachable material layer.
11. patterned method as claimed in claim 10, which is characterized in that the anti-reflection coating includes positioned at described
Dielectric anti reflective coat on etachable material layer and the bottom anti-reflective coating layer on the dielectric anti reflective coat.
12. patterned method as claimed in claim 11, which is characterized in that in the etching technics, with the photoresist
Pattern is sequentially etched the bottom anti-reflective coating layer and dielectric anti reflective coat as mask, to form required pattern.
13. a kind of production method of semiconductor devices, which is characterized in that including using as described in claim 1-12 any one
Patterned method, to form the required pattern in the semiconductor devices.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109698121A (en) * | 2018-12-27 | 2019-04-30 | 上海华力集成电路制造有限公司 | The manufacturing method of integrated circuit |
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| CN102150244A (en) * | 2008-09-18 | 2011-08-10 | 朗姆研究公司 | Sidewall forming processes |
| US8329585B2 (en) * | 2009-11-17 | 2012-12-11 | Lam Research Corporation | Method for reducing line width roughness with plasma pre-etch treatment on photoresist |
| CN105977149A (en) * | 2016-05-11 | 2016-09-28 | 上海华虹宏力半导体制造有限公司 | Passivation layer etching method, manufacture method of pad and manufacture method of semiconductor device |
| CN106019849A (en) * | 2015-03-27 | 2016-10-12 | 台湾积体电路制造股份有限公司 | Patterning Process of a Semiconductor Structure with a Wet Strippable Middle Layer |
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| CN102150244A (en) * | 2008-09-18 | 2011-08-10 | 朗姆研究公司 | Sidewall forming processes |
| CN102012644A (en) * | 2009-09-04 | 2011-04-13 | 中芯国际集成电路制造(上海)有限公司 | Method for reducing characteristic dimension of photoresist pattern |
| US8329585B2 (en) * | 2009-11-17 | 2012-12-11 | Lam Research Corporation | Method for reducing line width roughness with plasma pre-etch treatment on photoresist |
| CN106019849A (en) * | 2015-03-27 | 2016-10-12 | 台湾积体电路制造股份有限公司 | Patterning Process of a Semiconductor Structure with a Wet Strippable Middle Layer |
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| CN109698121A (en) * | 2018-12-27 | 2019-04-30 | 上海华力集成电路制造有限公司 | The manufacturing method of integrated circuit |
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