CN108923771B - First-order Gaussian pulse power synthesis circuit - Google Patents

First-order Gaussian pulse power synthesis circuit Download PDF

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CN108923771B
CN108923771B CN201810652524.7A CN201810652524A CN108923771B CN 108923771 B CN108923771 B CN 108923771B CN 201810652524 A CN201810652524 A CN 201810652524A CN 108923771 B CN108923771 B CN 108923771B
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赵青
徐文强
马春光
赵怿哲
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University of Electronic Science and Technology of China
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    • H03—ELECTRONIC CIRCUITRY
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Abstract

The invention discloses a first-order Gaussian pulse power synthesis circuit, belongs to the field of electronic circuits, and mainly aims to improve the power of a radar transmitter in a well and improve the detection distance of a radar under the condition of not losing resolution. And power superposition is carried out on the pulse sub-sources of the two avalanche transistor marx circuits by a coherent synthesis method, and a high-amplitude pulse signal is output to be connected with a transmitting antenna in a matching manner. In order to improve the detection distance or depth under the condition of fixed detection frequency, namely, under the condition of determining resolution, the invention develops a first-order Gaussian pulse power synthesis circuit which can greatly improve the pulse power and improve the signal-to-noise ratio of a transmitter to a certain extent by improving the amplitude. According to the synthesis scheme, two paths of first-order Gaussian pulses with pulse width of 1.52ns, amplitude of 1.1kv and basically consistent pulse waveforms pass through a Wilkinson power synthesizer, and then the output pulse amplitude is 1.53kv, and the pulse width waveform is basically unchanged. The power superposition efficiency is about 98%, and the amplitude superposition rate is 70%.

Description

First-order Gaussian pulse power synthesis circuit
Technical Field
The invention belongs to the field of electronic circuits, and mainly aims to improve the power of a radar transmitter in a well and improve the detection distance of a radar under the condition of not losing resolution. And power superposition is carried out on the pulse sub-sources of the two avalanche transistor marx circuits by a coherent synthesis method, and a high-amplitude pulse signal is output to be connected with a transmitting antenna in a matching manner.
Background
With the development of economy, the demand of oil and gas resources in various countries in the world is continuously increased, the exploration area of the oil and gas resources is gradually enlarged, the exploration depth is gradually deepened, the exploration difficulty is gradually increased, and the trial and error cost is higher and higher, so that an accurate and efficient well logging method is urgently needed in the field of oil and gas resource exploration. The radar well logging system in well is a product of applying radar technology to deep well, and its working mechanism is that the transmission characteristic of transient pulse in rock stratum is used to obtain the formation information of well periphery, and then the formation structure is imaged, its resolution ratio is relatively high, and its radial detection distance can be up to several tens of meters, and is far higher than the detection distance (less than 3m) of traditional well logging method. Therefore, the radar system in the well has the advantages of long detection distance, high resolution, capability of imaging the stratum structure, economy, high efficiency and the like, and becomes a hot spot of disputed research in all countries in the world.
The radar well logging system in the well is developed based on the drilling radar technology, and mainly focuses on exploration of oil and gas resources. At present, most of drilling radars belong to radars of a time domain system, which radiate nanosecond-level or even picosecond-level time domain narrow pulse signals into a stratum, and when the narrow pulse signals encounter a medium with discontinuous electromagnetic characteristics in the stratum, echo signals are generated, and the stratum information around a well can be extracted according to the echo signals received by a radar system. In general, a gaussian pulse signal is selected by a radar well logging system in a well, the pulse width of the gaussian pulse signal is narrow, but the covered frequency spectrum information is quite rich, and the gaussian pulse signal belongs to an ultra-wideband pulse signal. The attenuation of the low-frequency part in the signal in the rock stratum is small, so that a longer detection distance can be realized; while the high frequency part has a relatively short wavelength in the same formation, so that a relatively high resolution can be achieved. However, the radial detection distance and the target resolution of the radar logging system in the well in the time domain system are in a pair of contradictory relations, after the detection frequency is determined, the detection resolution is determined, and the transmitter power is increased for increasing the detection distance.
Most of radar signal sources in wells at present are realized by adopting avalanche transistor marx circuits, impact pulses are generated by continuous charging and instantaneous discharging, the output amplitude of a marx block is improved by increasing the stage number of avalanche transistors, but due to the characteristics of the avalanche transistors, after the stage number of the avalanche transistors is increased to a certain degree, the amplitude increase can be gradually slowed until the avalanche transistors approach saturation, meanwhile, excessive stage numbers can bring great debugging difficulty to pulse synchronization, and in addition, in order to ensure that the marx circuit blocks of the avalanche transistors can stably work, an under-capacitance mode is generally adopted, so that the amplitude of the output pulses is greatly reduced, and especially when a subnanosecond pulse source is designed, the output amplitude is smaller. Therefore, power synthesis of the Gaussian pulses output by the marx circuit block of the avalanche diode is necessary, and the amplitude of the output pulses can be greatly improved.
Disclosure of Invention
In order to improve the detection distance or depth under the condition of fixed detection frequency, namely, under the condition of determining resolution, the invention develops a first-order Gaussian pulse power synthesis circuit which can greatly improve the pulse power and improve the signal-to-noise ratio of a transmitter to a certain extent by improving the amplitude. According to the synthesis scheme, two paths of first-order Gaussian pulses with pulse width of 1.52ns, amplitude of 1.1kv and basically consistent pulse waveforms pass through a Wilkinson power synthesizer, and then the output pulse amplitude is 1.53kv, and the pulse width waveform is basically unchanged. The power superposition efficiency is about 98%, and the amplitude superposition rate is 70%.
The technical scheme adopted by the invention is as follows:
a first order gaussian pulse power combining circuit comprising: the power supply module, the FPGA, the driving circuit, the isolation transformer, the first delay circuit, the second delay circuit, the first one-order Gaussian pulse sub-source, the second one-order Gaussian pulse sub-source and the Wilkinson power synthesizer;
the power supply module supplies power to the FPGA, the driving circuit, the isolation transformer, the first delay circuit, the second delay circuit, the first one-order Gaussian pulse sub-source, the second one-order Gaussian pulse sub-source and the Wilkinson power synthesizer, an output signal of the FPGA serves as the input of the driving circuit, is output to the isolation transformer after being amplified and shaped by the driving circuit, the isolation transformer distributes the signal to the first delay circuit and the second delay circuit in parallel, the signal is input to the first one-order Gaussian pulse sub-source after passing through the first delay circuit, the signal is input to the second one-order Gaussian pulse sub-source after passing through the second delay circuit, and output signals of the first one-order Gaussian pulse sub-source and the second one-order Gaussian pulse sub-source are synthesized by the Wilkinson power synthesizer and then output.
Furthermore, the FPGA outputs PWM signals with the voltage of 3.3V, the frequency of 10KHz, the duty ratio of 1 percent and the rising edge of 10ns, and the drive circuit adopts PM 8834.
Furthermore, the isolation transformer adopts a radio frequency transformer ADT1.5-1+, and the working frequency is 0.5-650 MHz.
Furthermore, the first delay circuit and the second delay circuit adopt a programmable delay chip SY89297U, the minimum delay stepping value is 5ps, or a delay short line is adopted for manual adjustment.
Further, the first and second first order Gaussian pulse sources include: the pulse shaping circuit, the pulse shaping circuit and the pulse coupling circuit; the pulse forming circuit adopts a marx circuit block connection mode, and the switching device adopts an avalanche transistor FMMT415 or FMMT 417; the pulse shaping circuit adopts an inductor and a capacitor to shape the output Gaussian pulse; the pulse coupling circuit is formed by short-circuit coaxial lines or microstrip lines.
Furthermore, the Wilkinson power synthesizer circuit is characterized in that three sections of quarter-wavelength microstrip lines are used for impedance matching and frequency band widening, isolation between ports is increased by adopting an isolation resistor in the middle, an input port and an output port are both matched to 50 ohms, the two input ports are connected to the output of a first-order Gaussian pulse source and a second-order Gaussian pulse source, and the output port is directly connected with an antenna feed or is connected with an attenuator for testing by using an oscilloscope.
Further, the power supply module inputs voltage of 48V, generates a 300V high-voltage power supply through the isolation DC/DC module FHP18-50S300 to supply power to a pulse forming circuit in a first-order Gaussian pulse sub-source, generates a 12V power supply through the isolation DC/DC module WRB4812LT-3W to supply power to the pulse driving circuit PM8834, and generates a 3.3V power supply through 7805 and AMS1117-3.3 to supply power to the FPGA and the delay chip.
Has the advantages that:
1. the pulse amplitude is greatly improved, the power superposition efficiency is 98%, and the voltage superposition efficiency is 70%. And the pulse waveform after synthesis is basically consistent with that before synthesis, the pulse width is basically unchanged, and the tailing amplitude is within 10% -15%.
2. The trigger pulse driving circuit formed by the FPGA has large trigger pulse amplitude and steep front edge, can improve the stability of a pulse sub-source and reduce time base jitter.
Drawings
Fig. 1 is a diagram of a first-order gaussian pulse power combining circuit.
Fig. 2 shows a trigger pulse generation and driving circuit formed by an FPGA.
FIG. 3 is a circuit diagram of a first order Gaussian pulse source.
Fig. 4 is a schematic diagram of a wilkinson power combiner.
Fig. 5 is a three-section wilkinson power combiner ADS simulation S parameter.
Fig. 6 shows first-order gaussian pulse waveforms before and after synthesis.
Detailed Description
As shown in fig. 4, this is a three-port network, and the input signals are added from ports 1 and 2, respectively matched by three quarter-wavelength microstrip lines, and finally the synthesized signal is output at port 3. The added resistance between the ports is to increase the isolation between the ports. The specific power superposition method comprises the following steps:
defining a basic Gaussian pulse shape of
Figure BDA0001704493680000031
In the formula of U0Pulse peak amplitude, α is the pulse time parameter, called the pulse shaping factor;
the first derivative of the fundamental gaussian pulse is:
Figure BDA0001704493680000032
to make the pulse peak value be U0Is corrected to
Figure BDA0001704493680000033
In the formula
Figure BDA0001704493680000034
Is the maximum peak value U of the pulse0The corresponding time;
when V is1＝V2＝VevenI.e. input ports 2 and 3 plus the in-phase signal, then the signal is output
Figure BDA0001704493680000041
When V is1＝-V2＝VoddThat is, when the input ports 1 and 2 are added with the inverted signal, the input signal will be consumed on the isolation resistor, and the output signal V will be output 30; for the input signal s1(t) and s2(t), the odd and even mode signals of which can be expressed as:
Figure BDA0001704493680000042
Figure BDA0001704493680000043
if the even mode signal is consumed on the isolation resistor, the output signal of the port 1 is:
Figure BDA0001704493680000044
assuming that the two input signals are identical in phase and amplitude, the two signals are combined
Figure BDA0001704493680000045
It can be seen that the method can superpose two first-order Gaussian pulses and output signal amplitude to obtain a signal with a high amplitude
Figure BDA0001704493680000046
The factor increases.
Fig. 1 is a diagram showing a first-order gaussian pulse power combining circuit. The power supply comprises an FPGA driving module, a first-order Gaussian pulse sub-source module, a delay line module, a Wilkinson power synthesizer module, a power supply and the like.
The FPGA driving module generates PWM signals with the frequency of 10KHz, the duty ratio of 1% and the amplitude of 3.3V (LVTTL), the PWM signals are amplified and pulse-shaped after passing through a driving circuit, and then the PWM signals are coupled to a triggering end of a first-order Gaussian pulse sub-source through an isolation transformer. The first-order Gaussian pulse sub-source module is composed of 16-stage avalanche tube marx circuits, two pulse sub-sources respectively generate first-order Gaussian pulses with basically consistent amplitude and pulse width, and bipolar first-order Gaussian pulses are generated by adding a short-circuit emission line at a load end in a pulse coupling mode. The delay line module is composed of a trigger transmission line with adjustable length, and the delay time is adjusted to compensate the time base discreteness of the two paths of first-order Gaussian pulse sub-sources, so that the two paths of sub-source signals can reach two input ends of the Wilkinson power combiner in a consistent manner. The Wilkinson power synthesizer module is formed by three sections of quarter-wavelength microstrip lines, a snake-shaped microstrip line structure is adopted for reducing the circuit wiring area, the whole body is a 3-port network, two input ends are respectively connected with two pulse sub-sources, the output end after power synthesis is directly connected with a wire, and the port impedance is 50 ohms.
Fig. 2 shows a trigger pulse generating circuit, in which an FPGA generates a PWM trigger signal of TTL/CMOS level, the trigger signal is shaped and amplified by a driving module, and a radio frequency transformer couples with an input end of a value delay chip to output two paths of delay-adjustable trigger signals to trigger a pulse source. The delay chip may also be replaced by a manually adjustable delay signal line.
Fig. 3 is a circuit diagram of a first-order gaussian pulse sub-source, a drive stage of an avalanche transistor marx circuit is formed by single-shot impact pulses formed by single tubes of an avalanche transistor, a trigger signal with high amplitude and a jittering rising edge is output, and the amplitude and the rising edge of the trigger signal can be adjusted by adjusting a resistor and a capacitor.
Fig. 4 shows a schematic diagram of a wilkinson power combiner, which is a 3-port microwave element, two input ports are respectively connected to an output port through a quarter microstrip line, the input ports are isolated from each other through loading resistors, and 3 ports are all matched to 50 ohms and can be directly connected with a 50-ohm radio frequency component. The frequency band is limited by adopting single-section microstrip line matching, the frequency band is widened by generally using a multi-section asymptote mode, and the frequency band requirement of 3:1 can be met by adopting three-section matching in the patent.
FIG. 5 shows the simulation results of S parameters of three-section Wilkinson power synthesizer in ADS, with transmission parameters S in the frequency range from 125MHz to 375MHz31Near 3.1dB, flatness of 0.7dB, input and output return losses S11、S33Above 20dB, input port isolation S12Above 25 dB.
FIG. 6 is a waveform diagram of first-order Gaussian pulses before and after synthesis, the amplitudes of the two first-order Gaussian pulses before and after synthesis are 1.1kv, the pulse widths are 1.52ns, the pulse waveforms are basically consistent, the pulse widths after synthesis are 1.52ns, the pulse widths are basically consistent with those before synthesis, the amplitude of the synthesized output is 1.55kv, and the amplitude is basically consistent with the theoretical value.

Claims (6)

1. A first order gaussian pulse power combining circuit, the circuit comprising: the power supply module, the FPGA, the driving circuit, the isolation transformer, the first delay circuit, the second delay circuit, the first one-order Gaussian pulse sub-source, the second one-order Gaussian pulse sub-source and the Wilkinson power synthesizer;
the power supply module supplies power to the FPGA, the driving circuit, the isolation transformer, the first delay circuit, the second delay circuit, the first one-order Gaussian pulse sub-source, the second one-order Gaussian pulse sub-source and the Wilkinson power synthesizer, an output signal of the FPGA is used as an input of the driving circuit, is amplified and shaped by the driving circuit and then is output to the isolation transformer, the isolation transformer distributes the signal to the first delay circuit and the second delay circuit in parallel, the signal is input to the first one-order Gaussian pulse sub-source after passing through the first delay circuit, the signal is input to the second one-order Gaussian pulse sub-source after passing through the second delay circuit, and output signals of the first one-order Gaussian pulse sub-source and the second one-order Gaussian pulse sub-source are synthesized by the Wilkinson power synthesizer and then are output;
the Wilkinson power synthesizer circuit is characterized in that three sections of quarter-wavelength microstrip lines are used for impedance matching and frequency band widening, isolation between ports is increased by adopting an isolation resistor in the middle, an input port and an output port are both matched to 50 ohms, the two input ports are connected to the output of a first-order Gaussian pulse source and a second-order Gaussian pulse source, and the output port is directly connected with an antenna feed or is connected with an attenuator for testing by using an oscilloscope;
the Wilkinson power synthesizer circuit is characterized in that the power superposition method of the Wilkinson power synthesizer circuit comprises the following steps:
defining a basic Gaussian pulse shape of
Figure FDA0002595945210000011
In the formula of U0Pulse peak amplitude, α is the pulse time parameter, called the pulse shaping factor;
the first derivative of the fundamental gaussian pulse is:
Figure FDA0002595945210000012
to make the pulse peak value be U0Is corrected to
Figure FDA0002595945210000013
In the formula
Figure FDA0002595945210000014
Is the maximum peak value U of the pulse0The corresponding time;
when V is1＝V2＝VevenI.e. input ports 1 and 2 plus the in-phase signal, then the signal is output
Figure FDA0002595945210000015
When V is1＝-V2＝VoddThat is, when the input ports 1 and 2 are added with the inverted signal, the input signal will be consumed on the isolation resistor, and the output signal V will be output30; for the input signal s1(t) and s2(t) its odd and even mode signals are expressed as:
Figure FDA0002595945210000016
Figure FDA0002595945210000021
if the even mode signal is consumed on the isolation resistor, the output signal of the port 1 is:
Figure FDA0002595945210000022
assuming that the two input signals are identical in phase and amplitude, the two signals are combined
Figure FDA0002595945210000023
2. A first order gaussian pulse power combining circuit as defined in claim 1 wherein said first and second first order gaussian pulse sources comprise: the pulse shaping circuit, the pulse shaping circuit and the pulse coupling circuit; the pulse forming circuit adopts a marx circuit block connection mode, and the switching device adopts an avalanche transistor FMMT415 or FMMT 417; the pulse shaping circuit adopts an inductor and a capacitor to shape the output Gaussian pulse; the pulse coupling circuit is formed by short-circuit coaxial lines or microstrip lines.
3. The first-order Gaussian pulse power synthesis circuit as claimed in claim 1, wherein the input voltage of the power supply module is 48V, the isolated DC/DC module FHP18-50S300 generates a 300V high-voltage power supply to supply power to the pulse shaping circuit in the first-order Gaussian pulse sub-source, the isolated DC/DC module WRB4812LT-3W generates a 12V power supply to supply power to the pulse driving circuit PM8834, and the circuits 7805 and AMS1117-3.3 generate a 3.3V power supply to supply power to the FPGA and the delay chip.
4. The first-order Gaussian pulse power synthesis circuit as claimed in claim 1, wherein the FPGA outputs PWM signals with 3.3V voltage, 10KHz frequency, 1% duty cycle and 10ns rising edge, and the driving circuit adopts PM 8834.
5. The first-order Gaussian pulse power combining circuit as claimed in claim 1, wherein the isolation transformer is a radio frequency transformer ADT1.5-1+ with an operating frequency of 0.5-650 MHz.
6. The first-order Gaussian pulse power synthesis circuit as claimed in claim 1, wherein the first delay circuit and the second delay circuit use a programmable delay chip SY89297U, the delay step value is 5ps minimum, or a delay stub is used for manual adjustment.
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Publication number Priority date Publication date Assignee Title
CN101556377A (en) * 2009-04-30 2009-10-14 北京交通大学 Optical generator of Ultra wideband Gauss monocyclic pulse
CN101436873B (en) * 2008-12-18 2011-12-28 北京交通大学 Apparatus for generating millimeter wave ultra-wideband pulse based on double-electrode modulator
CN104579250A (en) * 2014-12-01 2015-04-29 华南理工大学 Bipolar gauss single recurrent pulse generating circuit and method based on CMOS

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* Cited by examiner, † Cited by third party
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US9450689B2 (en) * 2013-10-07 2016-09-20 Commscope Technologies Llc Systems and methods for delay management in distributed antenna system with direct digital interface to base station

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101436873B (en) * 2008-12-18 2011-12-28 北京交通大学 Apparatus for generating millimeter wave ultra-wideband pulse based on double-electrode modulator
CN101556377A (en) * 2009-04-30 2009-10-14 北京交通大学 Optical generator of Ultra wideband Gauss monocyclic pulse
CN104579250A (en) * 2014-12-01 2015-04-29 华南理工大学 Bipolar gauss single recurrent pulse generating circuit and method based on CMOS

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