CN108900830B - Platform for verifying accuracy of infrared video image processing algorithm - Google Patents

Platform for verifying accuracy of infrared video image processing algorithm Download PDF

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CN108900830B
CN108900830B CN201810511616.3A CN201810511616A CN108900830B CN 108900830 B CN108900830 B CN 108900830B CN 201810511616 A CN201810511616 A CN 201810511616A CN 108900830 B CN108900830 B CN 108900830B
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video stream
infrared
video
thread
hardware
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CN108900830A (en
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张佳逊
隋修宝
徐致东
郝玉婷
陈宇翔
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00Diagnosis, testing or measuring for television systems or their details
    • H04N17/002Diagnosis, testing or measuring for television systems or their details for television cameras
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors

Abstract

The invention discloses a platform for verifying the accuracy of an infrared video image processing algorithm, which can transmit an original video image of an infrared detector and an image processed by hardware to a video receiving and comparing module, perform software simulation processing on the original video image in the video receiving and comparing module, compare the image processed by hardware and the image simulated by software frame by frame and pixel by pixel, and judge whether the two images are consistent, thereby judging the accuracy of the hardware processing algorithm. The invention realizes the synchronous output of the original infrared video stream and the infrared video stream processed by hardware, transmits the video stream to the video receiving and comparing module by using the gigabit Ethernet, compares the video image simulated by software and the video image processed on the infrared detector by using a digital means, finds the difference of the processing results of the software and the hardware, and is more efficient and accurate compared with the traditional manual comparison mode.

Description

Platform for verifying accuracy of infrared video image processing algorithm
Technical Field
The invention belongs to the field of hardware algorithm verification tools, and particularly relates to a platform for verifying the accuracy of an infrared video image processing algorithm.
Background
The currently used infrared detection devices generally have non-uniformity and even blind pixels; the original infrared video image directly output by the detector has low contrast and is difficult to distinguish the target. Therefore, in the practical application process, an image processing algorithm must be implemented on hardware to reduce noise interference in the original infrared video and highlight the detection target.
For processing algorithms for infrared video, the development process is generally divided into two stages: the first stage is The simulation of The algorithm, and at present, The Matlab software developed by The MathWorks company is usually adopted to write code files, and The simulation is carried out on a computer to verify The function of The algorithm. The second phase is to port the algorithm to hardware, such as an FPGA. However, hardware resources are limited, and if the resources consumed by the algorithm are too large, the hardware system is unstable; if the algorithm is simplified, the processing capability may be reduced. In summary, there may be a gap between the effects of hardware processing and software simulation during algorithm migration.
In the process of debugging a hardware algorithm by a developer at present, firstly, an infrared detector is used for collecting a video, the video is displayed on a monitor, and an original image is observed; and then, introducing an image processing algorithm to be developed into hardware, collecting the video by using the detector again, and observing the processed image on a monitor through hardware processing so as to judge whether the algorithm achieves the expected effect. The disadvantages of this approach are evident: firstly, subjective evaluation is inaccurate, video images are various and complex, and the difference between hardware algorithm processing and software simulation is difficult to find by directly observing the images purely by naked eyes. Secondly, the output of the infrared detector is unpredictable, and the images acquired each time are different, so that the effect of hardware algorithm processing cannot be really compared. In addition, the judging method has low efficiency, long hardware debugging period, repeated starting of the detector and long service life.
Disclosure of Invention
The invention aims to provide a platform for verifying the accuracy of the infrared video image processing algorithm, which is used for judging whether the hardware processing of an infrared detector is effective or not.
The technical solution for realizing the purpose of the invention is as follows: a platform for verifying the accuracy of an infrared video image processing algorithm comprises a cross video coding module, a cross video decoder, a video transmitter and a video receiving and comparing module which are sequentially connected; the cross video coding module runs on a controller in the infrared detector, acquires an original infrared video stream and an infrared video stream processed by infrared detector hardware, compresses the two video streams into a cross video stream by using cross coding, and outputs the cross video stream to a cross video decoder from a parallel output interface; the cross video decoder decodes the crossed video stream to obtain an original infrared video stream and a video stream processed by a hardware algorithm, the original infrared video stream and the video stream processed by the hardware algorithm are respectively transmitted to a video transmitter through a hardware circuit interface, the video transmitter reads the original infrared video stream and the video stream processed by the hardware algorithm and transmits the original infrared video stream and the video stream to a video receiving and comparing module through a gigabit Ethernet, the video receiving and comparing module collects the original infrared video stream and the infrared video stream processed by the hardware algorithm through a network receiving thread of the video receiving and comparing module, the original infrared video stream passes through an algorithm simulation thread to obtain a simulated infrared video stream, the infrared video stream processed by the hardware algorithm and the simulated infrared video stream pass through a comparison thread to obtain a software and hardware algorithm comparison video, and the original infrared video stream, the infrared video stream processed by the hardware, the simulated infrared video stream and the software and hardware algorithm comparison video are respectively and synchronously displayed on a user interface, and stored.
Compared with the prior art, the invention has the remarkable advantages that: the synchronous output of the original infrared video stream and the infrared video stream after hardware processing is realized, the video stream is transmitted to the video receiving and comparing module by utilizing the gigabit Ethernet, so that the video receiving and comparing module uses a digital means to compare a video image simulated by software and a video image processed on an infrared detector, and the difference of software and hardware processing results is found.
Drawings
FIG. 1 is a block diagram of a platform structure for verifying accuracy of an infrared video image processing algorithm according to the present invention.
FIG. 2 is a block diagram of a cross video coding module according to the present invention.
Fig. 3 is a block diagram of a video transmitter according to the present invention.
Fig. 4 is a block diagram of the thread call relationship of the video reception and comparison module according to the present invention.
FIG. 5 is a diagram illustrating a video cross-coding format according to the present invention.
Fig. 6 is a thread connection diagram of an infrared video image acquisition function.
Fig. 7 is a thread connection diagram of the acquisition of infrared video images and the real-time simulation contrast function.
FIG. 8 is a thread connection diagram for the re-emulation and contrast function for a local file.
Fig. 9 is a thread connection diagram of the local file playing function.
Detailed Description
The present invention is described in further detail below with reference to the attached drawing figures.
With reference to fig. 1 to 5, a platform for verifying accuracy of an infrared video image processing algorithm includes a cross video encoding module 3, a cross video decoder 5, a video transmitter 7, and a video receiving and comparing module 10, which are connected in sequence; the cross video coding module 3 runs on a controller in the infrared detector 1 to obtain an original infrared video stream and an infrared video stream processed by the infrared detector 1 hardware, compresses the two video streams into a cross video stream by using cross coding, and outputs the cross video stream to a cross video decoder 5 from a parallel output interface 4 of the detector; the cross video decoder 5 decodes the crossed video stream to obtain an original infrared video stream and a video stream processed by a hardware algorithm, the original infrared video stream and the video stream processed by the hardware algorithm are transmitted to the video transmitter 7 through the GPIO interface 6, the video transmitter 7 reads the original infrared video stream and the video stream processed by the hardware algorithm and transmits the original infrared video stream and the video stream to the video receiving and comparing module 10 through the gigabit Ethernet 8, the video receiving and comparing module 10 collects the original infrared video stream and the infrared video stream processed by the hardware algorithm through the network receiving thread 18 of the video receiving and comparing module, the original infrared video stream can pass through the algorithm simulation thread 19 to obtain a simulated infrared video stream, the infrared video stream processed by the hardware algorithm and the simulated infrared video stream can pass through the comparison thread 22 to obtain a software and hardware algorithm comparison video, and the original infrared video stream, the infrared video stream processed by the hardware, the simulated infrared video stream and the software and hardware algorithm comparison video can pass through the display thread 24 on the user interface respectively Step (b) is shown and may be stored as a local file 25 by the storage thread 24 and the local file 25 may be read by the read thread 26.
The cross video coding module 3 can alternately output the pixels of the coded original infrared video stream and the pixels at the corresponding positions of the infrared video stream after hardware processing through the parallel output interface 4 of the infrared detector 1.
For an original infrared video stream and an infrared video stream processed by hardware, the sequence of pixel output accords with the sequence of line-by-line scanning; the output information of each pixel point is encoded into two data segments, the length of each data segment is the same as the bit width of the parallel output interface 4, the first bit of the first segment is a valid bit 27, if the pixel is valid, the pixel is 1, otherwise, the pixel is 0; the second bit is a fragment flag 28, which is 1, indicating that the fragment is the first fragment; the third bit is the pixel source flag bit 29, which is 1 if the pixel is from the original video stream, and 0 if the pixel is from the hardware-processed infrared video stream; the fourth bit and the fifth bit are respectively a frame start flag bit 30 and a frame end flag bit 31, if the pixel is a start pixel or an end pixel of a frame, the corresponding flag position is set to 1, otherwise, 0 is set; the remaining bits of the first word are the line number 32 where the pixel is located; the first bit of the second word is the valid bit 33, which should be the same as the first bit of the first word; the second bit is a segment flag 34, which is 0, indicating that the segment is the second segment; the remaining bits are pixel grayscale information 35.
The video receiving and comparing module 10 comprises a user interface thread 17, a network receiving thread 18, a simulation thread 19, a comparing thread 22, a display thread 23, a storage thread 24 and a reading thread 26, wherein the user interface thread 17 acquires parameters set by a user and calls other threads, the network receiving thread 18 establishes an Ethernet server, receives an original infrared video stream and an infrared video stream processed by hardware and unpacks the original infrared video stream and the infrared video stream; the original infrared video stream is transmitted to a simulation thread 19, the thread calls an infrared video processing algorithm simulation program written by a user to simulate the original infrared video stream, and a simulated infrared video stream is obtained; the simulated infrared video stream and the infrared video stream processed by hardware pass through a contrast thread 22, the similarity of the two is calculated, and the two are subjected to frame-by-frame pixel-by-pixel difference contrast to obtain a software and hardware algorithm contrast video; the display thread 23 synchronously displays the original infrared video, the infrared video processed by hardware, the simulated infrared video and the image of the software and hardware algorithm comparison video on the user interface, and the storage thread 24 stores the four video streams as a local file 25; the read thread 26 is able to read the stored local file 25.
The network receiving thread 18, the simulation thread 19, the comparison thread 22, the display thread 23, the storage thread 24 and the reading thread 26 of the video receiving and comparing module 10 can realize high-speed data transmission through a bidirectional dynamic linked list, and the user interface thread 17 sets the connection of the dynamic linked list when calling other threads, so that the functions of infrared video acquisition and real-time simulation comparison, local infrared video re-simulation and comparison and local infrared video playing are realized.
The infrared detector hardware processing is matched with the infrared video processing algorithm simulation program, and when the infrared video processing algorithm simulation program written by a user is effective, the infrared detector hardware processing method can be used for judging whether the infrared detector hardware processing is effective.
Example 1
With reference to fig. 1 to 5, a platform for verifying accuracy of an infrared video image processing algorithm includes a cross video encoding module 3, a decoder 5, a video transmitter 7, and a video receiving and comparing module 10. The cross video coding module 3 runs on a controller in the infrared detector 1 to obtain an original infrared video stream and an infrared video stream processed by detector hardware, and because the bit width of the parallel output interface 4 is limited, the two video streams are compressed into one video stream by using cross coding, and the video stream is output to the cross video decoder 5 from the parallel output interface 4. The cross video decoder 5 decodes the cross video stream, so as to obtain the original infrared video stream and the video stream processed by the hardware algorithm, which are respectively transmitted to the video transmitter 7 through a hardware circuit, such as a GPIO interface 6. The video transmitter 7 reads the two video streams through the FPGA, and transmits the two video streams to the video receiving and comparing module 10 through the gigabit ethernet 8. The video receiving and comparing module 10 can be operated on the PC 9, and collects an original infrared video stream and an infrared video stream processed by a hardware algorithm, the original infrared video stream is simulated by a software algorithm to obtain an infrared video stream simulated by software, the infrared video stream processed by the hardware algorithm and the infrared video stream simulated by software are subjected to comparing operation to obtain a software and hardware algorithm comparison video, and the four video streams are synchronously displayed on a user interface and stored.
The cross video coding module 3 can obtain an original infrared video stream and an infrared video stream after hardware processing from an Avalon st bus 2 of a detector main control chip, respectively input the two video streams into an asynchronous FIFO11 for buffering, simultaneously use a cross video algorithm 12 to code the video stream in the asynchronous FIFOs so that the video stream conforms to a cross video format, since the coding speed needs to be higher than the input speed of the Avalon st bus 2, a PLL13 is used to multiply the frequency of a main clock of the module, the coded video stream passes through a parallel interface 4 of the detector to alternately output pixels corresponding to the two video streams, for example, a program obtains the original infrared video with a bit depth of 14 bits and the infrared video after hardware processing from the Avalon st bus 2, the parallel output interface 4 is 16 bits, the video streams respectively pass through FIFO11 for buffering, after cross coding, data of each pixel point occupies two words, a first bit of a first word is an effective bit 27, if the pixel is valid, it is 1; the second bit is the fragment flag 28, which is 1; the third bit is the pixel source flag bit 29, which is 1 if the pixel is from the original video stream, and 0 if the pixel is from the hardware-processed infrared video stream; the fourth bit and the fifth bit are respectively a frame start flag bit 30 and a frame end flag bit 31, if the pixel is a start pixel or an end pixel of a frame, the corresponding flag position is set to 1, otherwise, 0 is set; the last 11 bits of the first word are the line number 32 where the pixel is located; the first bit of the second word is the valid bit 33, which should be the same as the first bit of the first word; the second bit is the fragment flag 34, which is 0; the remaining 14 bits are pixel grayscale information 35. The pixels of the two video streams are output in a crossed manner through the parallel interface 4 of the detector 1, the output sequence can be that the first word of the first pixel of the first line of the first frame of the original infrared video stream or the infrared video stream after hardware processing is output in the first step, the second word of the pixel is output in the second step, the first word of the pixel at the corresponding position of the corresponding frame of the other video stream is output in the third step, the second word of the pixel in the third step is output in the fourth step, and then the first word of the next pixel is output after the fourth step is circulated to the first step. For the original infrared video stream and the infrared video stream processed by the hardware, the pixel output sequence conforms to the progressive scanning sequence.
The video transmitter 7 may read video stream data in the GPIO interface 6 by using the FPGA minimum system 14, encapsulate the infrared video stream into a datagram using UDP or TCP, encapsulate the infrared video stream into a data packet using IP, connect to the PHY chip 16 through the GMII bus 15, and transmit the video stream to the PC 9 as a gigabit ethernet client.
The video receiving and comparing module 10 comprises a user interface thread 17, a network receiving thread 18, a simulation thread 19, a comparing thread 22, a display thread 23, a storage thread 24 and a reading thread 26, and data can be transmitted among the other threads except the user interface thread 17 through a bidirectional dynamic linked list. The user interface thread 17 can call other threads, and set the connection of the bidirectional dynamic linked list between the threads, so as to realize the transmission of data stream between the threads, thereby realizing various functions of the module.
With reference to fig. 6, when the infrared video image acquisition function is implemented, the user interface thread 17 simultaneously calls the storage thread 24, the display thread 23, and the network receiving thread 18, where the network receiving thread 18 establishes an ethernet server based on a TCP or UDP protocol, can receive an original infrared video stream and an infrared video stream processed by hardware using a socket, and transmits the two video streams to the display thread 23; the display thread 23 synchronously displays the images of the two videos on the user interface; the storage thread 24 stores the two video streams as a local file 25.
With reference to fig. 7 and 4, on the basis of realizing the acquisition function of the infrared video image, when the real-time simulation and comparison functions are realized, the user interface thread 17 simultaneously calls the storage thread 24, the display thread 23, the simulation thread 19, the comparison thread 22 and the network receiving thread 18, wherein the network receiving thread 18 receives an original infrared video stream and an infrared video stream processed by hardware, the original infrared video stream is input into the simulation thread 19, and the simulation thread 19 can call an algorithm simulation program 21 written by a user through Matlab Engine20 to simulate the original infrared video stream to obtain the infrared video stream after software simulation; inputting the video after software simulation and the video after hardware processing into a comparison thread 22, calculating the similarity of the two video streams by the comparison thread 22, and subtracting the gray value of the pixel at the corresponding position in each frame of the two video streams to obtain a software and hardware algorithm comparison video; the display thread 23 synchronously displays the original infrared video, the infrared video processed by hardware, the infrared video simulated by software and the image of the comparison video of software and hardware algorithms on the user interface. The storage thread 24 stores the above four video streams as a local file 25.
With reference to fig. 8, when the function of re-simulating and comparing the local file is implemented, the user interface 17 may invoke the storage thread 24, the display thread 23, the simulation thread 19, the comparison thread 22, and the reading thread 26, where the reading thread 26 may read the stored local file 25, transmit the original infrared video therein to the simulation thread 19, transmit the infrared video processed by the hardware to the comparison thread 22, calculate the similarity with the infrared video stream simulated by the software, and compare the similarity with the infrared video stream simulated by the software to obtain the software and hardware algorithm comparison video. The display thread 23 synchronously displays the original infrared video, the infrared video processed by hardware, the infrared video simulated by software and the image of the comparison video of software and hardware algorithms on the user interface. The storage thread 24 stores the four video streams as new local files 25.
With reference to fig. 9, when the function of playing the local file is implemented, the user interface 17 may invoke the display thread 23 and the reading thread 26, where the reading thread 26 may read the stored local file 25, and transmit the original infrared video, the infrared video processed by the hardware, the infrared video simulated by the software, and the image of the software-hardware algorithm contrast video to the display thread 23, so that the images are synchronously displayed on the user interface.
The contrast thread 22 of the video receiving and contrast module 10 may calculate the similarity between the video after the software simulation and the video after the hardware processing, first regard the gray values of the pixels in the two video streams as statistical variables, calculate the manhattan distance, then divide the manhattan distance by the total number of pixels in a single video stream, and then divide by the total number of gray levels, so as to obtain the similarity between the two video streams, where the similarity may be used to determine whether the hardware processing algorithm of the infrared detector is valid, for example, when the similarity is less than or equal to 0.04, the hardware processing algorithm of the infrared detector is valid, otherwise, the similarity is invalid. The user can also determine the threshold value of the similarity according to the self requirement.

Claims (2)

1. A system for verifying the accuracy of an infrared video image processing algorithm is characterized in that: the video coding and decoding device comprises a cross video coding module, a cross video decoder, a video transmitter and a video receiving and comparing module which are connected in sequence; the cross video coding module is operated on a controller in an infrared detector, acquires an original infrared video stream of the infrared detector and an infrared video stream which is processed by the infrared detector on the original infrared video stream through hardware, compresses the original infrared video stream and the infrared video stream which is processed by the hardware into a cross video stream by utilizing cross coding, and outputs the cross video stream to a cross video decoder from a parallel output interface; the cross video decoder decodes the crossed video stream to obtain a decoded original infrared video stream and a decoded hardware-processed infrared video stream, the decoded original infrared video stream and the decoded hardware-processed infrared video stream are respectively transmitted to the video transmitter through the hardware circuit interface, the video transmitter reads the infrared video stream sent by the cross video decoder and sends the infrared video stream to the video receiving and comparing module through gigabit Ethernet, the video receiving and comparing module collects the infrared video stream sent by the video transmitter through a network receiving thread, the original infrared video stream collected by the video receiving and comparing module passes through a software algorithm simulation thread to obtain a simulated infrared video stream, the hardware-processed infrared video stream collected by the video receiving and comparing module and the simulated infrared video stream pass through a comparison thread to obtain a software and hardware algorithm comparison video stream, and the original infrared video stream collected by the video receiving and comparing module and the collected hardware-processed infrared video stream, The simulated infrared video stream and the software and hardware algorithm contrast video stream are synchronously displayed and stored on a user interface respectively;
the cross video coding module alternately outputs pixels of the coded original infrared video stream and pixels of the corresponding position of the coded infrared video stream processed by hardware through a parallel output interface of the infrared detector;
for the coded original infrared video stream output by the cross video coding module and the coded infrared video stream processed by hardware, the pixel output sequence conforms to the progressive scanning sequence; the output information of each pixel point is encoded into two data segments, the length of each data segment is the same as the bit width of a parallel output interface of the infrared detector, wherein the first bits of the two data segments are both valid bits, if the pixel data of the pixel point is valid, the first bit is 1, otherwise, the first bit is 0; the second bits of the two data segments are both segment flag bits, the second bit of the first data segment is 0, and the second bit of the second data segment is 1; the third bit of the first data segment is a pixel source flag bit, if the pixel is from an original video stream, the pixel source flag bit is 1, and if the pixel is from an infrared video stream processed by hardware, the pixel source flag bit is 0; the fourth and fifth bits of the first data segment are respectively a frame start flag bit and a frame end flag bit, if the pixel is a start pixel of a frame, the frame start flag bit is 1, otherwise, the frame start flag bit is 0, if the pixel is an end pixel of the frame, the frame end flag bit is 1, otherwise, the frame end flag bit is 0; the rest bits of the first data segment are the line number of the pixel; the rest bits of the second data segment are the gray value of the pixel;
the video receiving and comparing module comprises a user interface thread, a network receiving thread, a simulation thread, a comparing thread, a display thread, a storage thread and a reading thread, wherein the user interface thread acquires parameters set by a user and calls the other threads, the network receiving thread establishes an Ethernet server, receives a video stream and unpacks the video stream; the original infrared video stream collected by the video receiving and comparing module is transmitted to a simulation thread, the simulation thread calls an infrared video processing algorithm simulation program written by a user, and the original infrared video stream collected by the video receiving and comparing module is simulated to obtain a simulated infrared video stream; the simulated infrared video stream and the hardware-processed infrared video stream collected by the video receiving and comparing module calculate the similarity of the simulated infrared video stream and the hardware-processed infrared video stream through a comparing thread, and compare the simulated infrared video stream and the hardware-processed infrared video stream frame by pixel to obtain a software and hardware algorithm comparing video stream; the display thread synchronously displays the original infrared video stream collected by the video receiving and comparing module, the infrared video stream processed by hardware, the simulated infrared video stream and the image of the software and hardware algorithm comparison video stream on a user interface, and the storage thread stores the four synchronously displayed video streams as local files; the reading thread is used for reading the stored local file.
2. The system for verifying accuracy of infrared video image processing algorithm implementation of claim 1, wherein: the network receiving thread, the simulation thread, the comparison thread, the display thread, the storage thread and the reading thread of the video receiving and comparison module realize high-speed data transmission through the bidirectional dynamic linked list, and the user interface thread sets the connection of the corresponding dynamic linked list when calling other threads, so that the functions of acquisition and real-time simulation comparison of infrared video streams, re-simulation and comparison of local infrared video streams and playing of local infrared videos are realized.
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