CN108776260A - Synchronisation source automatic selection circuit for power meter - Google Patents
Synchronisation source automatic selection circuit for power meter Download PDFInfo
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R22/00—Arrangements for measuring time integral of electric power or current, e.g. electricity meters
- G01R22/06—Arrangements for measuring time integral of electric power or current, e.g. electricity meters by electronic methods
- G01R22/10—Arrangements for measuring time integral of electric power or current, e.g. electricity meters by electronic methods using digital techniques
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Abstract
The present invention relates to a kind of synchronisation source automatic selection circuits for power meter, including power supply, external voltage input signal, external impressed current input signal, channel selection circuit, frequency input signal modulate circuit, frequency multiplication of phase locked loop circuit, circuit for checking input signals and channel control switching circuit.The present invention judges the presence or absence of input channel signal by the outputs level signals of frequency-selective network, and it is realized to the quick of channel selecting analog switch using this outputs level signals and logic gates phase operation, accurately, real-time control, to realize automatic switchover and the detection to voltage channel and current channel in hardware, it is unstable to solve running software caused by control of the tradition with software mode realization to voltage channel and current channel, the defects of ADC samplings trigger not in time, it may be implemented preferably to be distorted automatically simultaneously small, input signal of the channel signal of waveform stabilization as PLL phaselocked loops, efficiency and the accuracy of digital power meter measurement are improved to a certain extent.
Description
Technical field
The present invention relates to electronic surveying field, especially a kind of synchronisation source automatic selection circuits for power meter.
Background technology
With the rapid development of modern power electronic industry, power supply class, load class product are more and more, most of electric power electricity
Subsystem all be unable to do without power supply, load, since the relevant issues such as the transfer efficiency of power supply, load power consumption directly affect Related product
Performance, this just needs the energy consumption service condition that these systems are detected with dedicated measuring instrument, therefore for household electrical appliances manufactory
Demand of the quotient using digital power meter to the detection of power supply product, household appliances increases；Product speed is detected to digital power meter
It is required that also further increasing.
Digital power meter needs while sampling the instantaneous value of input voltage in complete cycle, current signal, utilizes numerical computations
Formula is other by sampled instantaneous value calculating input voltage, the virtual value of electric current, peak value, power and power factor of complete cycle etc.
Numerical value, eventually by the performance indicator of calculated value qualitative analysis measured piece.
For the instantaneous value for sampling input voltage in complete cycle, current signal of complete and accurate, digital power meter is main
Using following two modes：The first software-controlled manner based on timer, a kind of patent CN201621367496.7 " reductions
The device of power calculation error ", the microcontroller for using double A/D synchronize sampling to voltage and current signal, and the patent is real
In the operation of border, sample mode is timer sampling, it is necessary to required according to the frequency of institute's sampled signal and to a sampling period
The number of sampled point determine the timing cycle of timer, instantaneous value complete cycle is completed by timers trigger ADC samplings and is adopted
Sample；Second of software control method based on PLL phaselocked loop hardware circuits, this mode need to detect by frequency detection circuit first
Voltage channel frequency input signal value, using the frequency signal of voltage channel as the same of PLL phaselocked loops if there are voltage signal
Step source, switching frequency detection circuit believes the frequency of current channel if there are current signals to current channel if being not present
Synchronisation source number as PLL phaselocked loops, if there is no if acquiescence using the frequency signal of voltage channel as the synchronization of PLL phaselocked loops
Source, the sampling that signal after the frequency multiplication of synchronisation source is used as ADC by frequency multiplier circuit by PLL phaselocked loops trigger synchronizing signal.
But because there is the unstability of operation in software program, and for the higher input signal of frequency, timer
Timing it is shorter, there are the deficiencies that timing time delay, timing accuracy reduce, while this timer sample mode is limited to input
The limitation of signal frequency, it is necessary to which timing cycle, number of sampling are accurately configured according to frequency input signal；PLL phaselocked loops hardware electricity
Path method also need software calculation measure frequency input signal, to judge input signal whether there is or not；These are less than a side
Face, which rings ADC sampling promptnesses and accuracy, another aspect measurement frequency signal ancillary cost time of measuring, influences instrument test
Speed, against the demand for test speed on client's production line.
Invention content
The technical problem to be solved by the present invention is to：A kind of synchronisation source automatic selection circuit for power meter is provided, mainly
For digital power meter and other fields for needing accurately to sample using phaselocked loop progress input signal synchronization feeding ADC.
The technical solution adopted by the present invention to solve the technical problems is：A kind of synchronisation source for power meter automatically selects
Circuit, including the conditioning of power supply, external voltage input signal, external impressed current input signal, channel selection circuit, frequency input signal
Circuit, frequency multiplication of phase locked loop circuit, circuit for checking input signals and channel control switching circuit；The external voltage input letter
Number, the input terminal of external impressed current input signal interface channel selection circuit；The output end connection input of the channel selection circuit
The input terminal of signal frequency modulate circuit；The output end connection frequency multiplication of phase locked loop circuit of frequency input signal modulate circuit, input
The input terminal of signal deteching circuit；The input of the output end interface channel control switching circuit of the circuit for checking input signals
End；The control terminal of the output end interface channel selection circuit of channel control switching circuit；The frequency multiplication of phase locked loop circuit it is defeated
Go out the trigger signal sampled as ADC.
Further, power supply of the present invention is channel selection circuit, frequency input signal modulate circuit, phaselocked loop
Frequency multiplier circuit and circuit for checking input signals power supply.
It further says, channel selection circuit of the present invention includes the first analog switch, the first analog switch
Two input terminals are separately connected external voltage input signal, external impressed current input signal.
It further says, the periodic signal conditioning of input is same by frequency input signal modulate circuit of the present invention
The square-wave signal of frequency；Frequency input signal modulate circuit includes power supply+5V, first resistor, the first capacitance, first pair of two pole
Pipe, second resistance, 3rd resistor, the second capacitance, the first operational amplifier, the first voltage-stabiliser tube, the second voltage-stabiliser tube, the 4th resistance,
Third capacitance, second pair of diode, the 5th resistance, second operational amplifier, the 6th resistance, the 7th resistance, the 4th capacitance；First
One end of resistance connects the output end of the first analog switch, the other end of first resistor connect the first capacitance, first pair of diode,
Second capacitance, one end of 3rd resistor, the first voltage-stabiliser tube anode, the other end of first resistor connects the first operation amplifier simultaneously
The backward end of device, one end of the other end connection second resistance of first pair of diode, the other end of first pair of diode connect simultaneously
The end in the same direction of the first operational amplifier is connect, GND, the cathode of the first voltage-stabiliser tube connect the other end of second resistance with connecting digital signal
The second voltage stabilizing tube anode is connect, the output end of the first operational amplifier connects the second capacitance, the other end of 3rd resistor, the second voltage stabilizing
The anode of pipe, the output end of the first operational amplifier connect one end of the 4th resistance simultaneously, the other end connection of the 4th resistance the
One end of three capacitances, second pair of diode, the other end of the 4th resistance connect the end in the same direction of second operational amplifier, third simultaneously
The other end connection digital signal ground GND of capacitance, the other end of second pair of diode connect one end of the 5th resistance, second pair two
The other end of grade pipe connects the backward end of second operational amplifier simultaneously, the other end connection digital signal of the 5th resistance ground GND,
The output end of second operational amplifier connects one end of the 6th resistance, the 7th resistance, and the other end connection power supply of the 6th resistance+
5V, the other end of the 7th resistance connect one end of the 4th capacitance, the other end connection digital signal of the 4th capacitance ground GND.
It further says, circuit for checking input signals of the present invention includes LM567 audio decoders, input signal
Detection circuit detects whether that there are the input signals in nominated bandwidth；Including power supply+5V, the 5th capacitance, the 8th resistance, third is steady
Pressure pipe, the 4th voltage-stabiliser tube, the 9th resistance, the tenth resistance, eleventh resistor, third operational amplifier, twelfth resistor, the 13rd
Resistance, the 6th capacitance, the 7th capacitance, the 8th capacitance, the 9th capacitance, the first audio decoder, the 14th resistance, the 15th electricity
Resistance, the tenth capacitance；One end of 5th capacitance connects one end of the 4th capacitance, and the other end of the 5th capacitance connects the one of the 8th resistance
End, the other end connection cathode of third voltage-stabiliser tube of the 8th resistance, one end of the anode of the 4th voltage-stabiliser tube, the 9th resistance, the 8th
The other end of resistance connects the backward end of third operational amplifier simultaneously, the anode connection digital signal of third voltage-stabiliser tube ground GND,
The cathode connection digital signal ground GND of 4th voltage-stabiliser tube, the other end connection digital signal of the 9th resistance ground GND, the tenth resistance
One end connection digital signal ground GND, one end of the other end connection eleventh resistor of the tenth resistance, the other end of the tenth resistance
The end in the same direction of third operational amplifier is connected simultaneously, the output end of third operational amplifier connects the other end of eleventh resistor,
The output end of third operational amplifier connects one end of twelfth resistor simultaneously, and the other end of twelfth resistor connects the 6th capacitance
One end, the other end of the 6th capacitance connects 3 foots of the first audio decoder, one end connection digital signal of the 8th capacitance
GND, the other end of the 8th capacitance connect 2 foots of the first audio decoder, and one end of the 9th capacitance is with connecting digital signal
GND, the other end of the 9th capacitance connect 1 foot of the first audio decoder, and one end of thirteenth resistor connects power supply+5V, the
The other end of 13 resistance connects 4 foots of the first audio decoder, and the other end of thirteenth resistor connects the 7th capacitance simultaneously
One end, one end of the other end connection digital signal ground GND of the 7th capacitance, the 14th resistance connect power supply+5V, the 14th electricity
The other end of resistance connects 8 foots of the first audio decoder, the 7 foots connection digital signal of the first audio decoder ground GND, the
One end of 15 resistance connects 5 foots of the first audio decoder, and the other end of the 15th resistance connects the first audio decoder
6 foots, the other end of the 15th resistance connects one end of the tenth capacitance simultaneously, and the other end of the tenth capacitance connects digital signal
Ground GND.
It further says, channel control switching circuit of the present invention includes NOR gate circuit, the XOR gate electricity
The output end of one input terminal connection audio decoder on road, the output of another input terminal connection XOR gate of NOR gate circuit
End；The control signal for the signal and current first analog switch that channel control switching circuit is exported according to circuit for checking input signals
Logical operation is carried out, the output signal of generation continues on for the switching of the analog switch of control channel selection circuit.
It further says, frequency multiplication of phase locked loop circuit part of the present invention is responsible for frequency input signal modulate circuit
The trigger signal that the frequency signal conditioning obtained samples for the frequency signal of specified multiple as ADC, including power supply+5V, the
One counter, the 11st capacitance, the first phaselocked loop, the 16th resistance, the 17th resistance, the 18th resistance, the 19th resistance, the
12 capacitances；16 foots of the first counter connect power supply+5V, and 8 foots, 11 foots of the first counter are with connecting digital signal
GND, 13 foots of the first counter connect 3 foots of the first phaselocked loop, and 10 foots of the first counter connect the first phaselocked loop
4 foots, 5 foots of the first phaselocked loop, 8 foots connection digital signal GND, one end of the 11st capacitance connect the first locking phase
6 foots of ring, the other end of the 11st capacitance connect 7 foots of the first phaselocked loop, and the 16 foots connection voltage of the first phaselocked loop+
5V, one end of the 16th resistance connect 13 foots of the first phaselocked loop, and the other end of the 16th resistance connects the 9 of the first phaselocked loop
Foot, the other end of the 16th resistance connect one end of the 19th resistance simultaneously, and one end of the 17th resistance connects the first locking phase
12 foots of ring, the other end of the 17th resistance connect one end of the 18th resistance, and the other end of the 17th resistance connects simultaneously
Digital signal ground GND, the other end of the 18th resistance connect 11 foots of the first phaselocked loop, the other end connection of the 19th resistance
One end of 12nd capacitance, the other end connection digital signal ground GND of the 12nd capacitance.
Voltage input signal or current input signal are selected by the first analog switch, first resistor and the first electricity
Holding composition RC low-pass filter circuits, the end in the same direction of first pair of first operational amplifier of diode pair is protected with backward end, the
Two resistance, 3rd resistor, the second capacitance, the first voltage-stabiliser tube, the second voltage-stabiliser tube, the first operational amplifier form amplifying circuit, put
Greatly with output signal Vsg1 is generated after voltage stabilizing；4th resistance, third capacitance form RC filter circuits, the first operational amplifier it is defeated
Go out the end in the same direction that signal is sent into second operational amplifier after RC filtering, second pair of diode, the 5th resistance, the second operation
Amplifier, the 6th resistance, the 7th resistance, the 4th capacitance are built into Zero-cross comparator circuit, comparison circuit output signal Vsg2；Compare
On the one hand the signal Vsg2 of device output is sent into circuit for checking input signals part, third fortune is sent into through the 5th capacitance, the 8th resistance
Amplifier backward end is calculated, the 8th resistance, the 9th resistance, the tenth resistance, eleventh resistor, third operational amplifier composition are reversely put
Big circuit generates output signal Vsg3 after amplification；6th capacitance, the 7th capacitance, the 8th capacitance, the 9th capacitance, the tenth capacitance,
12 resistance, thirteenth resistor, the 14th resistance, the 15th resistance, the first audio decoder form circuit for checking input signals
Vsg3 signals are detected, detection terminates to generate output signal Vsg4；First XOR gate chip constitutes channel switching control electricity
Road carries out logical operation to output signal Vsg4 and the first analog switch control signal, and operation result generates output signal Vsg5,
For output signal Vsg5 again as an input signal of the first XOR gate, this output signal Vsg5 is sent into channel selection circuit simultaneously
Realize the control to the first analog switch；On the other hand the signal Vsg2 of comparator output is sent into frequency multiplication of phase locked loop circuit part,
First counter, the first phaselocked loop, the 11st capacitance, the 12nd capacitance, the 16th resistance, the 17th resistance, the 18th resistance,
19th resistance collectively constitutes frequency multiplication of phase locked loop circuit, and carrying out frequency multiplication to input signal Vsg2 exports Vsg6 signals, is adopted as ADC
Sample trigger signal.
It further says, the first analog switch of the present invention selects voltage input signal to pass through the first operation first
The amplifying circuit of amplifier composition generates output signal Vsg1, and signal Vsg1 passes through the Zero-cross comparator of second operational amplifier composition
Circuit generates output signal Vsg2；
If voltage input signal exists, signal Vsg2 is the square-wave signal of same frequency, and output signal Vsg2 is transported through third
The amplifying circuit output for calculating amplifier composition is sent into the first audio from the output signal Vsg3 of input signal Vsg2 different width with frequency
Decoder circuit；Output signal Vsg3 passes through the first audio decoder circuit output low level signal Vsg4, low level signal
Vsg4 and low level signal Vsg5 logical operations output low level signal Vsg5, which controls the first analog switch, to be continued to select voltage logical
Road signal；If voltage input signal is not present, signal Vsg2 is fixed level output signal, and signal Vsg2 is put through third operation
The fixed level output signal Vsg3 of the amplifying circuit output of big device composition and input signal Vsg2 difference width, signal Vsg3 pass through
First audio decoder circuit output high level signal Vsg4, high level signal Vsg4 and low level signal Vsg5 logical operations are defeated
Go out high level signal Vsg5 and controls the first analog switch switching selection current channel signal.
It further says, if current input signal exists, signal Vsg2 is the square-wave signal of same frequency, signal Vsg2
The output signal Vsg3 of amplifying circuit output and input signal Vsg2 different width with frequency through third operational amplifier composition, signal
Vsg3 is patrolled by the first audio decoder circuit output low level signal Vsg4, low level signal Vsg4 with high level signal Vsg5
Operation output high level signal Vsg5 the first analog switches of control are collected to continue to select current channel signal；If current input signal is not
In the presence of then signal Vsg2 is fixed level output signal, the amplifying circuit output that signal Vsg2 is formed through third operational amplifier
Pass through the first audio decoder circuit output with fixed level the output signal Vsg3, signal Vsg3 of input signal Vsg2 difference width
High level signal Vsg4, high level signal Vsg4 and high level signal Vsg5 logical operations output low level signal Vsg5 controls the
One analog switch switching selection voltage channel signal.
The present invention operation principle be：By selecting a kind of tone decoder chip LM567, collocation peripheral components to set up one
Kind frequency-selective network, when it receives an input signal being located in selected frequency band, internal switch is connected, and is exported fixed electric
It is flat；Judge the presence or absence of input channel signal by the outputs level signals of frequency-selective network, and using this outputs level signals with patrol
It collects gate circuit phase operation to realize to the quick, accurate of channel selecting analog switch, real-time control, to realization pair in hardware
The automatic switchover and detection of voltage channel and current channel are solved tradition and are realized with software mode and led to voltage channel and electric current
The defects of running software caused by the control in road is unstable, ADC samplings are triggered not in time, while automatic preferred mistake may be implemented
Input signal of very small, waveform stabilization the channel signal as PLL phaselocked loops improves digital power meter measurement to a certain extent
Efficiency and accuracy.
The beneficial effects of the invention are as follows：It is participated in without software programming, can realize the automatic choosing of synchronisation source in hardware
Switching is selected, makes phase locking frequency multiplying speed faster, the accuracy and real-time of ADC sampling trigger signals is improved, avoids software mode
The time delay of existing program fluctuation of service, program operation leads to problems such as triggering sampling inaccurate, improves the survey of instrument
Amount efficiency and accuracy.
Description of the drawings
Fig. 1 is the circuit structure functional block diagram of the present invention；
Fig. 2 is the circuit diagram of the present invention.
Specific implementation mode
Presently in connection with attached drawing and preferred embodiment, the present invention is described in further detail.These attached drawings are simplified
Schematic diagram, the basic structure of the invention will be illustrated schematically only, therefore it only shows the composition relevant to the invention.
It is a kind of synchronisation source automatic selection circuit for power meter, including power supply, external voltage input letter as shown in Figure 1
Number, external impressed current input signal, channel selection circuit, frequency input signal modulate circuit, frequency multiplication of phase locked loop circuit, input signal
Detection circuit, channel control switching circuit.External voltage input signal, external impressed current input signal interface channel selection circuit
Input terminal；The input terminal of the output end connection frequency input signal modulate circuit of channel selection circuit；Frequency input signal improves
The output end connection frequency multiplication of phase locked loop circuit of circuit, the input terminal of circuit for checking input signals；Circuit for checking input signals it is defeated
The input terminal of outlet interface channel control switching circuit；The control of the output end interface channel selection circuit of channel control switching circuit
End processed；The trigger signal that the output of frequency multiplication of phase locked loop circuit is sampled as ADC.
Circuit diagram is as shown in Figure 2：
Channel selection circuit is based on an analog switch and selects control source channel and electric current input channel, and simulation is opened
The signal for closing output is sent into frequency input signal modulate circuit part；Frequency input signal modulate circuit is based primarily upon an operation
Amplifier circuit is built with zero-crossing comparator circuit, if input periodic signal exists, the square-wave signal for being converted into same frequency is defeated
Go out, if input periodic signal is not present, on the one hand output signal is sent into circuit for checking input signals portion by stable level output
On the other hand output signal is sent into the input terminal of frequency multiplication of phase locked loop circuit part by the input terminal divided；Circuit for checking input signals
It is mainly built by operational amplifier and audio decoder, the signal presence or absence that detection circuit for checking input signals part is sent into,
And the input terminal that testing result signal feeding channel control switching circuit part will be exported；Channel control switching circuit is based on one
NOR gate circuit is realized, realizes the control signal of the output signal and channel selection circuit part of circuit for checking input signals part
As output signal, output signal is sent into newest control signal of the channel selection circuit as analog switch for logical operation；Locking phase
Ring frequency multiplier circuit is based primarily upon counter and is built with phase-locked loop circuit, by the output signal frequency multiplication of frequency input signal modulate circuit
Output, the trigger signal as ADC samplings.
As shown in Fig. 2, U1 be four select an analog switch model be 74HCT4052, U2 is integrated operational amplifier chip
Model LF353, U3 are that comparator chip model is LM311, and U4 is that integrated operational amplifier chip model is AD8512, and U5 is
Audio decoder model LM567, U6 be with or gate logic chip model be 74HC86, U7 is counter chip model
It is resistance that 74HC4040D, U8, which are phase-locked loop chip model 74HC4046, R1 to R19, and C1 to C12 is capacitance, and D1 to D2 is to protect
It is BAV99 to protect diode pair model, and W1 to W4 is voltage-stabiliser tube model LM385-1.2V.
The course of work：
U1 analog switches are according to control signal behavior voltage or current input signal V1, it is assumed that select voltage channel letter first
Number, therefore analog switch control signal is low level, R1, C1, D1, R2, W1, W2, C2, R3, U2 form reversed scale operation and put
The operation relation of big device, output signal and input signal is：
If there are periodic voltage signals for voltage channel, due to the effect of voltage-stabiliser tube W1, W2, the output of amplifying circuit U2 is clamped
Position is in ± 1.2V, so the square-wave signal that it is 1.2V with phase cycle amplitude that the output of amplifying circuit U2, which is,；R4,C3,D2,R5,U3,
R6, R7, C4 form Zero-cross comparator circuit, the output of operational amplifier U3 be 0-5V with input signal same period amplitude side
Wave signal；C5 is filter capacitor, plays the role of separated by direct communication；R8, W3, W4, R9, R10, R11, U4 form reversed scale operation
The operation relation of amplifier, output signal and input signal is：
So the square-wave signal that it is 200mV with input signal same period amplitude that the output of operational amplifier U4, which is,；C6,
C7, C8, C9, C10, R12, R13, R14, R15, U5 form audio decoder circuit, can be with by the combination of peripheral resistance, capacitance
The presence or absence of narrow inband signaling is detected, the formula of audio decoder setting detection input signal centre frequency is as follows：
Oscillator center frequency is
F0=1.1/ (R15 × C12) (3)
The value that capacitance C12 can be obtained according to formula (1) is
C12=1.1/ (f0 × R15) (4)
Here the unit (K Ω) of resistance, the unit (uF) of capacitance, the unit (KHz) of f0, the value of resistance R15 should 2 to
Within the scope of 20K Ω, the value of capacitance C10 is then determined by (4) again；C9 is mainly used for determining the detection bandwidth of audio decoder, increases
Add the value of C9 that can reduce bandwidth, bandwidth can be increased by reducing the value of C9, and C10 is mainly used for determining output switch time delay, generally
Substantially the 2 of C9 times of C10, C9 is generally 2 times of C12, can determine oscillator center according to circuit capacitance resistance component value herein
Frequency：
F0=1.1/ (R15 × C12)=1.1/ (4.7K Ω × 4.7uF) ≈ 0.05KHz=50Hz
Stable low level signal is exported if input periodic signal exists, input periodic signal exports fixation if being not present
High level signal exports low level since voltage channel signal has then audio decoder U5 herein；U6 logic chips are by audio
The control signal phase XOR operation of the output signal of decoder and analog switch U1, the newest control as analog switch U1 are believed
Number, logical operation truth table is as follows：
A:Logical operation front simulation switch control signal
B:Audio decoder output signal
C:Analog switch control signal after logical operation
Since the control signal of logical operation front simulation switch U1 is low level, and the output signal of audio decoder U5 is
Low, then U6 output signals are low, and analog switch U1 is not acted, and continue to select voltage channel；The phaselocked loop of U7 and U8 compositions
Frequency multiplier circuit carries out frequency multiplication output as ADC sampling trigger signals using the square-wave signal that U3 is exported as input signal.
If periodic voltage signal is not present in voltage channel, the output of amplifying circuit U2 is stable DC level signal；Operation
The output of amplifier U3 is stable DC level signal；Since the output of operational amplifier U4 is similarly stable DC level letter
Number, therefore C6, C7, C8, C9, C10, R12, R13, R14, R15, U5 composition audio decoder circuit can not detect specified narrowband
Interior signal, so audio decoder U5 exports high level；Since the control signal of logical operation front simulation switch is low level,
And the output signal of audio decoder is high level, then U6 outputs level signals, analog switch U1 are acted, switching channel choosing
Select current signal.
If there are periodic current signals for current channel, due to the effect of voltage-stabiliser tube W1, W2, the output of amplifying circuit U2 is clamped
Position is in ± 1.2V, so the square-wave signal that it is 1.2V with phase cycle amplitude that the output of amplifying circuit U2, which is,；Operational amplifier U3's
Output for be 0-5V with input signal same period amplitude square-wave signal；The output of operational amplifier U4 be and input signal phase
With the square-wave signal that period and amplitude are 200mV；Herein low electricity is exported since current channel signal has then audio decoder U5
Flat, since the control signal of logical operation front simulation switch U1 is high level, and the output signal of audio decoder is low level,
Then U6 exports high level signal, and analog switch U1 is not acted, and continues to select current channel；The phaselocked loop times of U7 and U8 compositions
Frequency circuit carries out frequency multiplication output as ADC sampling trigger signals using the square-wave signal that U3 is exported as input signal.
If periodic current signal is not present in current channel, the output of amplifying circuit U2 is stable DC level signal；Operation
The output of amplifier U3 is stable DC level signal；Since the output of operational amplifier U4 is similarly stable DC level letter
Number, therefore C6, C7, C8, C9, C10, R12, R13, R14, R15, U5 composition audio decoder circuit can not detect specified narrowband
Interior signal, so audio decoder circuit output high level；Since the control signal of logical operation front simulation switch U1 is height
Level, and the output signal of audio decoder is high level, then U6 exports low level signal, and analog switch U1 is acted, cut
Change channel selecting voltage signal.
It then passes through audio decoder circuit detection input channel and whether there is input signal, utilize XOR gate logic chip
Logic operation result realize to the hardware circuit automatic function selecting of voltage or current channel, reach real-time, fast and accurate
Measurement effect.
The specific implementation mode of the only present invention described in description above, various illustrations are not to the reality of the present invention
Matter Composition of contents limits, and person of an ordinary skill in the technical field can be to described in the past specific after having read specification
Embodiment is made an amendment or is deformed, without departing from the spirit and scope of invention.
Claims (9)
1. a kind of synchronisation source automatic selection circuit for power meter, it is characterised in that：Including power supply, external voltage input letter
Number, external impressed current input signal, channel selection circuit, frequency input signal modulate circuit, frequency multiplication of phase locked loop circuit, input signal
Detection circuit and channel control switching circuit；The external voltage input signal, external impressed current input signal interface channel
The input terminal of selection circuit；The input terminal of the output end connection frequency input signal modulate circuit of the channel selection circuit；It is defeated
Enter the output end connection frequency multiplication of phase locked loop circuit of signal frequency modulate circuit, the input terminal of circuit for checking input signals；It is described defeated
Enter the input terminal of the output end interface channel control switching circuit of signal deteching circuit；The output of the channel control switching circuit
Hold the control terminal of interface channel selection circuit；The trigger signal that the output of the frequency multiplication of phase locked loop circuit is sampled as ADC.
2. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：The power supply is
Channel selection circuit, frequency input signal modulate circuit, frequency multiplication of phase locked loop circuit and circuit for checking input signals power supply.
3. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：The channel choosing
It includes the first analog switch to select circuit, and two input terminals of the first analog switch are separately connected external voltage input signal, external
Current input signal.
4. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：The input letter
Number frequency modulate circuit is by the square-wave signal that the periodic signal conditioning of input is same frequency.
5. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：Input signal detection
Circuit includes LM567 audio decoders, and circuit for checking input signals detects whether that there are the input signals in nominated bandwidth.
6. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：It cuts in the channel
It includes NOR gate circuit to change control circuit, the output end of the input terminal connection audio decoder of the NOR gate circuit, different
The output end of another input terminal connection XOR gate of OR circuit；Channel control switching circuit is defeated according to circuit for checking input signals
The control signal of the signal gone out and current first analog switch carries out logical operation, and the output signal of generation continues on for control and leads to
The switching of the analog switch of road selection circuit.
7. being used for the synchronisation source automatic selection circuit of power meter as described in claim 1, it is characterised in that：The phaselocked loop
The frequency signal that frequency multiplier circuit is obtained frequency input signal modulate circuit improves the frequency signal for specified multiple, and conduct
The trigger signal of ADC samplings.
8. being used for the synchronisation source automatic selection circuit of power meter as claimed in claim 3, it is characterised in that：First mould
Quasi- switch selection voltage input signal first generates output signal Vsg1, letter by the amplifying circuit of the first operational amplifier composition
Number Vsg1 generates output signal Vsg2 by the Zero-cross comparator circuit of second operational amplifier composition；If voltage input signal is deposited
Then signal Vsg2 is the square-wave signal of same frequency, and the amplifying circuit that output signal Vsg2 is formed through third operational amplifier is defeated
Go out and is sent into the first audio decoder circuit from the output signal Vsg3 of input signal Vsg2 different width with frequency；Output signal Vsg3 is logical
Cross the first audio decoder circuit output low level signal Vsg4, low level signal Vsg4 and low level signal Vsg5 logical operations
Output low level signal Vsg5 controls the first analog switch and continues to select voltage channel signal afterwards；If voltage input signal is not deposited
, then signal Vsg2 is fixed level output signal, the output of amplifying circuit that signal Vsg2 form through third operational amplifier and
Fixed level the output signal Vsg3, signal Vsg3 of input signal Vsg2 difference width are high by the first audio decoder circuit output
Output high level signal Vsg5 controls the after level signal Vsg4, high level signal Vsg4 and low level signal Vsg5 logical operations
One analog switch switching selection current channel signal.
9. being used for the synchronisation source automatic selection circuit of power meter as claimed in claim 8, it is characterised in that：If electric current input letter
Number exist, then signal Vsg2 is the square-wave signal of same frequency, and the amplifying circuit that signal Vsg2 is formed through third operational amplifier is defeated
It is low by the first audio decoder circuit output to go out the output signal Vsg3 with different width frequently, signal Vsg3 from input signal Vsg2
Level signal Vsg4, low level signal Vsg4 and high level signal Vsg5 logical operations output high level signal Vsg5 controls first
Analog switch continues to select current channel signal；If current input signal is not present, signal Vsg2 is fixed level output letter
Number, the amplifying circuit output that signal Vsg2 is formed through third operational amplifier is defeated with the fixed level of input signal Vsg2 difference width
Go out signal Vsg3, signal Vsg3 by the first audio decoder circuit output high level signal Vsg4, high level signal Vsg4 with
High level signal Vsg5 logical operations export low level signal Vsg5 and control the first analog switch switching selection voltage channel signal.
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| CN201810622271.9A CN108776260A (en) | 2018-06-15 | 2018-06-15 | Synchronisation source automatic selection circuit for power meter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810622271.9A CN108776260A (en) | 2018-06-15 | 2018-06-15 | Synchronisation source automatic selection circuit for power meter |
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| CN201810622271.9A Pending CN108776260A (en) | 2018-06-15 | 2018-06-15 | Synchronisation source automatic selection circuit for power meter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114866129A (en) * | 2022-04-21 | 2022-08-05 | 成都贝尔普森电子技术有限公司 | Method for realizing multi-band switching of satellite communication equipment |
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