CN108769875A - Imitate the integrated circuit and warning device of alarm song - Google Patents
Imitate the integrated circuit and warning device of alarm song Download PDFInfo
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- CN108769875A CN108769875A CN201810667996.XA CN201810667996A CN108769875A CN 108769875 A CN108769875 A CN 108769875A CN 201810667996 A CN201810667996 A CN 201810667996A CN 108769875 A CN108769875 A CN 108769875A
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- 239000013641 positive control Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 12
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
- H04R3/12—Circuits for transducers, loudspeakers or microphones for distributing signals to two or more loudspeakers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2430/00—Signal processing covered by H04R, not provided for in its groups
Abstract
The invention belongs to electronic circuit technology fields, provide a kind of integrated circuit and warning device imitating alarm song；The integrated circuit includes：Control module, oscillator module, frequency division module, beat module, address module, ROM module, audio-frequency module and output module；Wherein control module obtains trigger signal and reset signal, and work or the halted state of the integrated circuit are can control by trigger signal, audible device cycle can be driven to sound the alarm by reset signal；When trigger signal is the first level state, oscillator module generates oscillator signal, multiplex coding signal is obtained by carrying out repeatedly frequency dividing for oscillator signal, if changing the coded combination in multiplex coding signal, audio-frequency module has obtained the audio signal with different audio frequencies after being divided to oscillator signal；Solve the problems, such as that existing integrated circuit can not change the audio frequency of alarm song and circuit structure and can not carry out flexible design through the invention.
Description
Technical field
The invention belongs to electronic circuit technology field more particularly to a kind of integrated circuits imitating alarm song and alarm dress
It sets.
Background technology
In existing fire fighting truck alarm device, the prior art realizes that fire fighting truck is sent out often through simulation sound chip
The function of alarm song passes through the simulation sound chip by the IC design containing simulation sound chip in alarm device
Driving audible device cycle sends out fire fighting truck alarm song；Therefore, the integrated electricity to sound the alarm is imitated in existing fire fighting truck
It is had at least the following problems in road：1, due to realizing generation alarm song using simulation sound chip, when will simulate sound chip
When applying in the integrated circuit for imitating alarm song, which can only intelligently drive the police of audible device generation fixed frequency
Report sound, the i.e. audio frequency of the alarm song can not be adjusted；2, it is described imitate alarm song integrated circuit circuit structure without
Method carries out simplifying design, and flexibility is low, reduces applicable generality of the integrated circuit in fire fighting truck warning device.
Invention content
The present invention provides a kind of integrated circuit and warning device imitating alarm song, it is intended to solve existing imitation alarm song
Integrated circuit can not change alarm song audio frequency and the problem of circuit structure can not carry out flexible design.
First aspect present invention provides a kind of integrated circuit imitating alarm song, including：
Pull up signal is accessed, is configured to obtain trigger signal and reset signal according to the pull up signal, clock signal
Control module；
It is connect with the control module, is configured to generate oscillator signal when the trigger signal is the first level state
Oscillator module；
It is connect with the control module and the oscillator module, is configured to believe the oscillation according to the reset signal
Number carry out for the first time frequency dividing obtain the frequency division module of the clock signal and fractional frequency signal；
It connect, is configured to according to the reset signal to the fractional frequency signal with the control module and the frequency division module
It carries out second of frequency dividing and obtains the beat module of carry signal；
It connect, is configured to according to the reset signal and the carry signal with the beat module and the control module
Obtain the address module of the roads N address signal；
It is connect with described address module, is configured to generate the ROM module of the roads N encoded signal according to the roads N address signal；
It connect, is configured to according to the roads N encoded signal to the oscillation with the oscillator module and the ROM module
Signal carries out third time frequency dividing and obtains the audio-frequency module of audio signal；And
It connect, is configured to when the trigger signal is in the first level state with the control module and the audio-frequency module
Logical operation is carried out to the audio signal and obtains the output module of sound driver signal；
The wherein described N is the positive integer more than or equal to 8.
Second aspect of the present invention provides a kind of warning device, including integrated circuit as described above, and：
It is connect with the integrated circuit, is configured to send out alarm signal according to the sound driver signal that the integrated circuit generates
Number audible device.
Acquired advantageous effects are the present invention compared with the existing technology：In the integrated circuit of above-mentioned imitation alarm song
In, since control module obtains trigger signal and reset signal according to pull up signal, clock signal, pass through the electricity of the trigger signal
Level state is that can control the integrated circuit conducting or shutdown of the imitation alarm song, can make integrated circuit by the reset signal
In modules execute reset operation, and then drive audible device cycle sound the alarm, scalability is strong, improves the collection
At the applicable generality of circuit；Coded combination by changing the roads N encoded signal is the audio frequency of changeable audio signal, into
And audible device is driven to generate the alarm song with different audio frequencies, improve the practicability of fire fighting truck；To effectively solve
Determined in the prior art imitate alarm song integrated circuit can not change the audio frequency of alarm song and the problem that flexibility is low.
Description of the drawings
Fig. 1 is a kind of application system frame diagram of integrated circuit imitating alarm song provided in an embodiment of the present invention；
Fig. 2 is a kind of function structure chart of integrated circuit imitating alarm song provided in an embodiment of the present invention；
Fig. 3 is a kind of function structure chart of control module provided in an embodiment of the present invention；
Fig. 4 is a kind of circuit structure diagram of power on reset unit provided in an embodiment of the present invention；
Fig. 5 is a kind of circuit structure diagram of signal generation unit provided in an embodiment of the present invention；
Fig. 6 is a kind of circuit structure diagram of oscillator module provided in an embodiment of the present invention；
Fig. 7 is a kind of circuit structure diagram of frequency division module provided in an embodiment of the present invention；
Fig. 8 is a kind of circuit structure diagram of beat module provided in an embodiment of the present invention；
Fig. 9 is a kind of circuit structure diagram of address module provided in an embodiment of the present invention；
Figure 10 is a kind of function structure chart of ROM module provided in an embodiment of the present invention；
Figure 11 is a kind of circuit structure diagram of translator unit provided in an embodiment of the present invention；
Figure 12 is a kind of circuit structure diagram of cell encoder provided in an embodiment of the present invention；
Figure 13 is a kind of circuit structure diagram of audio-frequency module provided in an embodiment of the present invention；
Figure 14 is a kind of circuit structure diagram of compound flip-flop array provided in an embodiment of the present invention；
Figure 15 is a kind of circuit structure diagram of output module provided in an embodiment of the present invention；
Figure 16 is a kind of internal circuit configuration figure of compound trigger provided in an embodiment of the present invention.
Specific implementation mode
The invention discloses a kind of integrated circuit 10 imitating alarm song, which is mainly used in fire fighting truck
In 400, wherein figure 1 illustrate the application system frames for the integrated circuit 10 that the embodiment of the present invention is provided；Optionally, sounding is set
Standby 20 be loudspeaker or piezo etc..
Fig. 2 shows the modular structures of the integrated circuit 10 provided in an embodiment of the present invention for imitating alarm song, such as Fig. 2 institutes
Show, which is：Control module 101, oscillator module 102, frequency division module 103, beat module 104, address module
105, ROM module 106, audio-frequency module 107 and output module 108；Wherein, control module 101 accesses pull up signal TG, according to
Pull up signal TG and clock signal S1 generate trigger signal EN and reset signal RESET；Since what control module 101 was generated touches
Signalling EN has varying level state, such as high level, low level, can domination set by the level state of trigger signal EN
Conducting at modules in circuit 10 or off state；Reset signal RESET can be used for realizing each in integrated circuit 10
The reset of unit operates, and so that the integrated circuit 10 is made a sound drive signal BD, BDB to the cycle of audible device 20, passes through sound
Drive signal BD, BDB driving cycle of audible device 20 sends out alarm song.
Oscillator module 102 is connect with control module 101, and trigger signal EN is transmitted to oscillator mould by control module 101
Block 102, when trigger signal EN is the first level state, 102 outputting oscillation signal OSC of oscillator module；Optionally, described to touch
Signalling EN is that the first level state is high level state or low level state, is not limited this herein；As a kind of excellent
The embodiment of choosing, it refer to trigger signal EN is high level state that trigger signal EN herein, which is the first level state, that is, is only had
When the trigger signal EN that control module 101 is generated is high level state, oscillator module 102 just understands outputting oscillation signal
OSC；Conversely, if trigger signal EN is second electrical level state, the second electrical level state refers to low level state, then oscillator mould
Block 102 is stopped, and not will produce oscillator signal OSC；Therefore pass through the i.e. controllable oscillation of the level state of trigger signal EN
Device module 102 stops or normal operating conditions.
Frequency division module 103 is connect with oscillator module 102 and control module 101, and frequency division module 103 is according to reset signal
RESET carries out frequency dividing for the first time to oscillator signal OSC and obtains clock signal S1 and fractional frequency signal H1；Optionally, clock signal S1
Frequency and fractional frequency signal H1 frequency can it is identical can not also be identical, on the one hand, integrated circuit 10 to fractional frequency signal H1 after
The continuous signal processing that carries out can be obtained sound driver signal BD, BDB with specific frequency, and on the other hand, frequency division module 103 will
Clock signal S1 is transmitted in control module 101, and trigger signal EN is generated by clock signal S1 drive control modules 101；
Beat module 104 is connect with frequency division module 103 and control module 101, and beat module 104 is according to reset signal RESET to frequency dividing
Signal H1 carries out second of frequency dividing and obtains carry signal RLCK；Since the fractional frequency signal H1 that frequency division module 103 is generated has spy
Fixed audio frequency obtains carry signal RLCK, the carry after beat module 104 carries out second dividing to fractional frequency signal H1
Signal can play the role of carry in integrated circuit 10, and integrated circuit 10 makes a sound driving letter to the cycle of audible device 20
Number BD, BDB, and then audible device 20 is driven switch broadcasting alarm song in order.
Address module 105 is connect with beat module 104 and control module 101, and control module 101 is by reset signal RESET
It is transmitted to address module 105, based on reset signal RESET to realize that address module 105 carries out reset operation；Beat module 104
Carry signal RLCK is transmitted to address module 105, carry signal RLCK has the function of carry, address in address module 105
Module 105 obtains the roads N address signal Q according to reset signal RESET and carry signal RLCK, and the roads N address signal Q has a variety of
Coded combination；ROM module 106 is connect with address module 105, and the roads N address signal Q is transmitted to ROM module by address module 105
106, ROM module 106 generates N road encoded signal D according to the roads N address signal, and the wherein roads N encoded signal D has Multiple Code group
It closes, if the wherein all the way coding in the encoded signal D of the roads N changes, 10 generated sound driver signal BD of integrated circuit,
The audio frequency of BDB can also occur to change accordingly, since the roads N encoded signal D is combined with Multiple Code, then corresponding hair
Acoustic equipment 20 produces the alarm song with a variety of audio frequencies under the driving of sound driver signal BD, BDB.
Audio-frequency module 107 is connect with oscillator module 102 and ROM module 106, and audio-frequency module 107 is according to the roads N encoded signal
D carries out third time frequency dividing to oscillator signal OSC and obtains audio signal TONE, as noted previously, as being generated by ROM module 106
The roads N encoded signal D have a variety of different code combination modes, when ROM module 106 will be with particular code combination
When the roads N encoded signal D is transmitted to audio-frequency module 107, audio-frequency module 107 is according to the different code combinations pair of the roads N encoded signal D
After oscillator signal OSC carries out third time frequency dividing, to obtain the audio signal TONE with different audio frequencies；Illustratively, if N
=8, the code combination of the encoded signal D on 8 tunnels that ROM module 106 is generated is：01111101, at this point, audio-frequency module 107
The audio frequency of the audio signal TONE generated according to the code combination mode of encoded signal D is 545.4 hertz；It follows that
If changing an arbitrary code in the encoded signal of the roads N, it is equivalent to the code combination mode for changing the roads N encoded signal, then
Audio-frequency module 107 has just correspondingly generated the audio signal TONE with different audio frequencies, and then audible device 20 is driven to send out
Provide the alarm song of different audio frequencies；Therefore, in integrated circuit 10, by changing the roads N that are generated of ROM module 106
The code combination mode of encoded signal D, you can the audio frequency of alarm song is correspondingly adjusted, it is easy to operate, to improve collection
At the applicable generality of circuit 10, the audio of alarm song can not be changed by overcoming the integrated circuit of imitation alarm song in the prior art
Frequency reduces the usage experience sense of user.
Output module 108 is connect with control module 101 and audio-frequency module 107, when the triggering letter that control module 101 is generated
When number EN is the first level state, output module 108 to audio signal TONE carry out logical operation obtain sound driver signal BD,
BDB；Output module 108 is also connect with audible device 20 simultaneously, and sound driver signal BD, BDB are transmitted to hair by output module 108
Acoustic equipment 20, and then audible device 20 is driven to sound the alarm；Thus, only when the triggering that control module 101 is generated
Signal EN be the first level state when, output module 108 can just be connected and to audible device 20 make a sound drive signal BD,
BDB, at this time warning device 300 be in normal operating conditions；Preferably, it is high that the trigger signal EN, which is the first level state,
Level state；Therefore, the i.e. controllable output module of the low and high level state of the trigger signal generated by control module 101
108 conducting or off state, so control integrated circuit 10 whether to audible device 20 make a sound drive signal BD,
BDB, it is easy to operate, further simplify the structure of circuit；
It should be noted that N described above is the positive integer more than or equal to 8.
As an alternative embodiment, Fig. 3 shows the module knot of control module 101 provided in an embodiment of the present invention
Structure, as shown in figure 3, the control module 101 includes power on reset unit 1011 and signal generation unit 1012, details are as follows：
Power on reset unit 1011 accesses DC power supply VDD and generates power-on reset signal POR, the power-on reset signal
POR is used to carry out electrification reset protection during electrifying startup to control module 101, and then realizes and ensure the integrated circuit 10
Normal work；Wherein signal generation unit 1012 is connect with power on reset unit 1011, and power on reset unit 1011 will power on
Reset signal POR is transmitted to control signal generation unit 1012, and signal generation unit 1012 is according to power-on reset signal POR and upper
The inversion signal TGB of signal TG is drawn to generate reset signal RESET, signal generation unit 1012 is according to reset signal RESET, clock
Signal S1 and pull up signal TG generate trigger signal EN, and wherein clock signal S1 is generated by frequency division module 103, specifically, controlling
In the modular structure of molding block 101, signal generation unit 1012 can generate reset signal RESET and trigger signal EN simultaneously.
As an alternative embodiment, Fig. 4 shows power on reset unit 1011 provided in an embodiment of the present invention
Circuit structure, power on reset unit 1011 include：Second PMOS tube PMOS2, the second capacitance C2, the 25th reverser INV25,
26th reverser INV26 and the 27th reverser INV27；Wherein, the source electrode of the second PMOS tube PMOS2 connects direct current
The grounded-grid GND of source VDD, the second PMOS tube PMOS2, the drain electrode of the second PMOS tube PMOS2 and the 25th reverser INV25
Input terminal be connected to the first end of the second capacitance C2 altogether, the second end of the second capacitance C2 is grounded GND, the 25th reverser
The input terminal of the 26th reverser INV26 of output termination of INV25, the output termination second of the 26th reverser INV26
The output of the input terminal of 17 reverser INV27, the 27th reverser INV27 terminates signal generation unit 1012, and being used for will
Power-on reset signal POR is transmitted to signal generation unit 1012.
As an alternative embodiment, Fig. 5 shows signal generation unit 1012 provided in an embodiment of the present invention
Circuit structure, signal generation unit 1012 include：First PMOS tube PMOS1, the first reverser INV1, the second reverser INV2,
Third reverser INV3, the 4th reverser INV4, the 5th reverser INV5, the 6th reverser INV6, the first nor gate NOR1,
Two nor gate NOR2, the first d type flip flop ZDR1 and the first T triggers ZTR1.
The source electrode of wherein the first PMOS tube PMOS1 meets DC power supply VDD, the grounded-grid GND of the first PMOS tube PMOS1,
The drain electrode of first PMOS tube PMOS1 and the input terminal of the first reverser INV1 access pull up signal TG, specifically, due to first
The drain electrode of PMOS tube PMOS1 and the external control button of input terminal of the first reverser INV1, when control button is pressed, this phase
It is triggered over the ground when in control button, pull up signal TG is low level signal；If control button is not pressed, pulled up due to existing
Resistance, pull up signal TG is high level signal at this time；The input of second reverser INV2 terminates frequency division module 103, for accessing
Clock signal S1；The output end of second reverser INV2 and the input terminal of the 4th reverser INV4 are connected to the first d type flip flop altogether
The CK input terminals of ZDR1, the CKB input terminals of the first d type flip flop ZDR1 of output termination of the 4th reverser INV4, third reverser
The inversion signal TGB of the input terminal access pull up signal TG of INV3, the first input end of the first nor gate NOR1 connect reset
Unit 1011, for accessing power-on reset signal POR；The second of the first nor gate NOR1 of output termination of third reverser INV3
Input terminal, the input terminal of the 5th reverser INV5 of output termination of the first nor gate NOR1, the output end of the 5th reverser INV5
For output reset signal RESET；The reset of the reset signal input terminal R of first d type flip flop ZDR1 and the first T triggers ZTR1
Signal input part R is connected to the output end of the 5th reverser INV5 altogether, when the output end of the 5th reverser INV5 is by reset signal
When RESET is transmitted to the first d type flip flop ZDR1 and the first T trigger ZTR1, the first d type flip flop ZDR1 and the first T triggers
ZTR1 executes reset operation under the driving of reset signal RESET；The Q output of first d type flip flop ZDR1 connects the first T triggers
The CK input terminals of ZTR1, the CKB input terminals of the first T triggers ZTR1 of QB output terminations of the first d type flip flop ZDR1, first is reversed
The D input terminals of the output end of device INV1 and the first d type flip flop ZDR1 are connected to the first input end of the second nor gate NOR2 altogether, and first
The Q output of T triggers ZTR1 connects the second input terminal of the second nor gate NOR2, the output termination the 6th of the second nor gate NOR2
The input terminal of reverser INV6, the output end output trigger signal EN of the 6th reverser INV6.
As an alternative embodiment, Fig. 6 shows the circuit of oscillator module 102 provided in an embodiment of the present invention
Structure, as shown in fig. 6, oscillator module 102 includes：First capacitance C1, first resistor R1, the 7th reverser INV7, the 8th are instead
To device INV8, the 9th reverser INV9, the tenth reverser INV10, the 11st reverser INV11, the 12nd reverser INV12,
First NAND gate NAND1, the second NAND gate NAND2 and third NAND gate NAND3.
Wherein, the input terminal of the first end of the first capacitance C1, the first end of first resistor R1 and the 7th reverser INV7
It is connected to the input terminal of the 8th reverser INV8 altogether, the output of the 8th reverser INV8 terminates the input terminal of the 9th reverser INV9,
The first input end of the first NAND gate NAND1 of output termination of 7th reverser INV7, the second input of the first NAND gate NAND1
Terminate the output end of the second NAND gate NAND2, the first of the output end of the first NAND gate NAND1 and the second NAND gate NAND2 is defeated
Enter the first input end that end is connected to third NAND gate NAND3 altogether, the output of the 9th reverser INV9 terminates the second NAND gate NAND2
The second input terminal, third NAND gate NAND3 second input termination control module 101, for accessing trigger signal EN；Third
The input terminal of the tenth reverser INV10 of output termination of NAND gate NAND3, the output end of the tenth reverser INV10 and the first electricity
The second end for holding C1 is connected to the input terminal of the 11st reverser INV11, the output end of the 11st reverser INV11 and the first electricity altogether
The second end of resistance R1 is connected to the input terminal of the 12nd reverser INV12 altogether, and the output end of the 12nd reverser INV12 is oscillator
The output end of module 102 is configured as output to oscillator signal OSC.
As an alternative embodiment, Fig. 7 shows the circuit knot of frequency division module 103 provided in an embodiment of the present invention
Structure, as shown in fig. 7, frequency division module 103 includes：13rd reverser INV13, the 14th reverser INV14, the 15th reverser
INV15 and the first T flip-flop arrays 1031；Wherein, the first T flip-flop arrays 1031 include N+1 mutually cascade T triggerings
The reset signal input terminal R of device, every level-one T triggers in the first T flip-flop arrays 1031 is connected to control module 101 altogether, uses
In reset signal RESET is transmitted in every level-one T triggers in the first T flip-flop arrays 1031, and then the first T triggers
Array 1031 is executed according to reset signal RESET resets operation；In the first T flip-flop arrays 1031, i-stage T triggers
The Q output of ZTRi connects the CKB input terminals of i+1 grade T triggers ZTRi+1, the QB outputs termination of i-stage T triggers ZTRi the
The CK input terminals of i+1 grades of T triggers ZTRi+1, the i are 1 to the arbitrary positive integer between N.
The input of 13rd reverser INV13 terminates oscillator module 102, for accessing oscillator signal OSC；13rd is anti-
The input terminal of output end and the 14th reverser INV14 to device INV13 is connected to the first order in the first T flip-flop arrays 1031 altogether
The CKB input terminals of T triggers, the output of the 14th reverser INV14 terminate first order T in the first T flip-flop arrays 1031 and touch
The CK input terminals for sending out device, the Q output of N+1 grades of T triggers connects the 15th reverser in the first T flip-flop arrays 1031
The input terminal of INV15, the output end output frequency division signal H1 of the 15th reverser INV15.
It should be noted that after above-mentioned first T flip-flop arrays 1031 carry out first time frequency dividing to oscillator signal OSC
Obtain clock signal S1 and fractional frequency signal H1；Specifically, the Q outputs of the first order T triggers in the first T flip-flop arrays 1031
End or QB output ends export clock signal S1, the output end output frequency division signal H1 of the 15th reverser；Further, it divides
Clock signal S1 is transmitted to control module 101 by module 103, and after 103 output frequency division signal H1 of frequency division module, integrates electricity
Road 10 continues to divide to fractional frequency signal H1, and then obtains suitable audio frequency.
As an alternative embodiment, Fig. 8 shows the circuit knot of beat module 104 provided in an embodiment of the present invention
Structure, as shown in figure 8, beat module 104 includes：16th reverser INV16, the 17th reverser INV17, the second d type flip flop
ZDR2, third d type flip flop ZDR3, the 2nd T triggers ZTR2 and the 3rd T triggers ZTR3.
Wherein, the input of the 16th reverser INV16 terminates frequency division module 103, for accessing fractional frequency signal H1；16th
The CKB input terminals of the output end of reverser INV16, the CKB input terminals of the second d type flip flop ZDR2 and third d type flip flop ZDR3
It is connected to the input terminal of the 17th reverser INV17 altogether, the output end of the 17th reverser INV17 and third d type flip flop ZDR3's
CK input terminals are connected to the CK input terminals of the second d type flip flop ZDR2, the reset signal input terminal R of the second d type flip flop ZDR2, second altogether
The reset signal input terminal R of the reset signal input terminal R of T triggers ZTR2 and the 3rd T triggers ZTR3 are connected to control mould altogether
Block 101, for accessing reset signal RESET, beat module 104 is executed according to reset signal RESET resets operation；2nd D is touched
The Q output of hair device ZDR2 meets the D input terminals of third d type flip flop ZDR3, the 3rd D of QB output terminations of the second d type flip flop ZDR2
The QB outputs of the D input terminals and third d type flip flop ZDR3 of reset signal the input terminal R, the second d type flip flop ZDR2 of trigger ZDR3
End is connected to the CK input terminals of the 2nd T triggers ZTR2 altogether, and the Q output of third d type flip flop ZDR3 connects the 2nd T triggers ZTR2's
The Q output of CKB input terminals, the 2nd T triggers ZTR2 connects the CKB input terminals of the 3rd T triggers ZTR3, the 2nd T triggers
The CK input terminals of the 3rd T triggers ZTR3 of QB output terminations of ZTR2, the QB output end output carries letter of the 2nd T triggers ZTR2
Number RLCK.
As an alternative embodiment, Fig. 9 shows the circuit knot of address module 105 provided in an embodiment of the present invention
Structure, as shown in figure 9, address module 105 includes：Eighteen incompatibilities are triggered to device INV18, the 19th reverser INV19 and the 2nd T
Device array 1051；Wherein, the 2nd T flip-flop arrays 1051 include N number of cascade T triggers, in the 2nd T flip-flop arrays 1051
In, address signal, the reset signal input terminal R of every level-one T triggers connect the Q output output per level-one T triggers altogether all the way
In control module 101, for accessing reset signal RESET, the 2nd T flip-flop arrays 1051 are carried out according to reset signal RESET
Reset operation；The Q output of j-th stage T triggers ZTRj connects the CKB input terminals of+1 grade of T triggers ZTRj+1 of jth, and j-th stage T is touched
The CK input terminals for sending out+1 grade of T triggers ZTRj+1 of QB output termination jth of device ZTRj, wherein the j is 1 to appointing between N-1
Meaning positive integer.
Eighteen incompatibilities are to the input of device INV18 termination beat module 104, for accessing carry signal RLCK；Eighteen incompatibilities
The input terminal of output end and the 19th reverser INV19 to device INV18 is connected to the 1st in the 2nd T flip-flop arrays 1051 altogether
The CKB input terminals of grade T triggers, the output of the 19th reverser INV19 terminate the 1st grade of T in the 2nd T flip-flop arrays 1051
The CK input terminals of trigger.
As an alternative embodiment, Figure 10 shows the module knot of ROM module 106 provided in an embodiment of the present invention
Structure, as shown in Figure 10, ROM module 106 include translator unit ROWDEC_F and cell encoder ROM_512, translator unit
ROWDEC_F is connect with address module 105, and translator unit ROWDEC_F generates decoded signal X according to address signal Q<0:31>；
Optionally, address module 105 can be by a part of address signal transmission in the address signal Q of the roads N to translator unit ROWDEC_F；
Wherein translator unit ROWDEC_F is by decoded signal X<0:31>It is transmitted to cell encoder ROM_512, specifically, decoding letter
Number X<0:31>Including 32 segment signals.
Wherein cell encoder ROM_512 is connect with translator unit ROWDEC_F and address module 105, translator unit
ROWDEC_F is by decoded signal X<0:31>It is transmitted to cell encoder ROM_512, address module 105 can be by the roads N address signal Q
In another part address signal be transmitted to cell encoder ROM_512, cell encoder ROM_512 is according to decoded signal X<
0:31>N road encoded signal D are generated with address signal Q.
As an alternative embodiment, Figure 11 shows translator unit ROWDEC_F provided in an embodiment of the present invention
Circuit structure, Figure 12 shows the circuit structure of cell encoder ROM_512 provided in an embodiment of the present invention, in conjunction with Figure 11 and
Figure 12 it is found that translator unit ROWDEC_F by multiple CMOS tubes and multiple reversers interconnection form, it is similar, coding
Device unit R OM_512 is made of multiple CMOS tubes and the interconnection of multiple reversers；Pass through the multichannel address signal Q controls inputted
The conducting or shutdown of CMOS tube processed, to which the output of ROM module 105 has the roads the N encoded signal D of different code combination.
As a preferred embodiment, in the modular structure of above-mentioned ROM module 105, translator unit ROWDEC_
The leakproof electric signal input end of F and the leakproof electric signal input end of cell encoder ROM_512 are connected to control module 101 altogether, match
It is set to access trigger signal EN, with the leaky for preventing ROM module 105 from occurring during being stopped.
Optionally, Figure 13 shows the circuit structure of audio-frequency module 107 provided in an embodiment of the present invention, as shown in figure 13,
Audio-frequency module 107 includes：20th reverser INV20, the 21st reverser INV21, the 22nd reverser INV22,
23 reverser INV23, the 24th reverser INV24, third nor gate NOR3, the 4th T triggers ZTR4 and compound
Flip-flop array 1071.
Wherein, compound flip-flop array 1071 is configured to as frequency dividing device to being believed oscillation according to the roads N encoded signal D
Number OSC is repeatedly divided；Specifically, compound flip-flop array 1071 is cascaded by N number of compound trigger and at least one XOR gate
It forms, coding is believed all the way for the reset signal input terminal J accesses of compound trigger described in every level-one in compound flip-flop array 1071
Number, the input of the 20th reverser INV20 terminates oscillator module 102, for accessing oscillator signal OSC；Compound trigger battle array
It is connected to the output end of the 20th reverser INV20 in row altogether per the reversed clock signal input terminal CKB of the compound trigger of level-one, it is multiple
It closes in flip-flop array and is connected to the 21st reverser INV21 altogether per the positive clock signal input terminal CK of the compound trigger of level-one
Output end, the 21st reverser INV21 input termination the 20th reverser INV20 output end.
It should be noted that the compound trigger in above-mentioned compound flip-flop array 1071 includes N number of compound trigger,
In compound trigger and the T triggers and d type flip flop of the art there is similar signal processing function, but compound touch
Difference lies in the compound trigger in the embodiment of the present invention also has forward direction to the T triggers and d type flip flop of hair device and this field
Control terminal PS and Reverse Turning Control end PSB, the then signal accessed by positive control terminal PS and Reverse Turning Control end PSB can control
The signal condition that the positive output end Q and inverse output terminal QB of compound trigger are exported, i.e., it is compound in the embodiment of the present invention
Trigger has more signal control terminals, and the function in order to clearly illustrate compound trigger in the embodiment of the present invention is former
Reason, Figure 16 show the internal circuit configuration for the compound trigger that the embodiment of the present invention is provided, as shown in figure 16, compound triggering
Device is cascaded by reverser, CMOS tube and adder.
There is wherein third nor gate NOR3 N-1 input terminal, the input of third nor gate NOR3 to terminate compound trigger
The output of the positive output end Q of compound trigger in array 1071, third nor gate NOR3 terminate the 22nd reverser INV22
Input terminal, per the anti-of the compound trigger of level-one in the output end of the 22nd reverser INV22, compound flip-flop array 1071
It is connected to the CKB input terminals of the 4th T triggers ZTR4 altogether to the input terminal of control terminal PSB and the 23rd reverser INV23, the
Per the positive control terminal PS of the compound trigger of level-one in the output end and compound flip-flop array 1071 of 23 reverser INV23
It is connected to the CK input terminals of the 4th T triggers ZTR4, QB output the 24th reversers of termination of the 4th T triggers ZTR4 altogether
The output end of the input terminal of INV24, the 24th reverser INV24 is configured as output to audio signal TONE；It should be noted that
In above-mentioned audio-frequency module 107, the reset signal input termination control module 101 of the 4th T triggers ZTR4 resets letter for accessing
Number RESET.
As an alternative embodiment, as N=8, attached drawing 14 shows provided in an embodiment of the present invention compound tactile
Send out the circuit structure of device array 1071, as shown in figure 14, compound flip-flop array 1071 include 8 cascade compound triggers and
3 XOR gates, the compound flip-flop array 1071 carry out oscillator signal OSC to obtain having different audio frequencies after repeatedly dividing
Audio signal TONE；The frequency dividing mode of wherein compound flip-flop array 1071 has the code combination mode of 8 tunnel encoded signal D to determine
It is fixed.
As an alternative embodiment, Figure 15 shows the circuit of output module 108 provided in an embodiment of the present invention
Structure, as shown in figure 15, output module 108 includes：4th NAND gate NAND4, the 5th NAND gate NAND5, the second eighteen incompatibilities to
Device INV28, the 29th reverser INV29, the 30th reverser INV30, the 31st reverser INV31, the 32nd are instead
To device INV32, the 33rd reverser INV33 and the 34th reverser INV34；Wherein, the second eighteen incompatibilities are to device INV28
Input terminal and the second input terminal of the 4th NAND gate NAND4 be connected to audio-frequency module 107 altogether, be used for incoming audio signal TONE；
First input end from second eighteen incompatibilities to the 5th NAND gate NAND5 of output termination of device INV28, the of the 4th NAND gate NAND4
The second input terminal of one input terminal and the 5th NAND gate NAND5 are connected to control module 101 altogether, for accessing trigger signal EN, the
The input terminal of the 29th reverser INV29 of output termination of four NAND gate NAND4, the output of the 29th reverser INV29
The input terminal of the 30th reverser INV30 is terminated, the output of the 30th reverser INV30 terminates the 31st reverser INV31
Input terminal, the output end sending and receiving acoustic equipment 20 of the 31st reverser INV31, for sound driver signal BD to be transmitted to hair
Acoustic equipment 20；The input terminal of the 32nd reverser INV32 of output termination of 5th NAND gate NAND5, the 32nd reverser
The input terminal of the 33rd reverser INV33 of output termination of INV32, the output of the 33rd reverser INV33 terminate third
The input terminal of 14 reverser INV34, the output end sending and receiving acoustic equipment 20 of the 34th reverser INV34, for driving sound
Dynamic signal BDB is transmitted to audible device 20.
Through the embodiment of the present invention, in integrated circuit 10, control module 10 generates trigger signal EN and reset signal
RESET can control work and the halted state of integrated circuit, reset signal RESET by the level state of trigger signal EN
Play the role of reset in integrated circuit 10, and then drive audible device 20 that can cyclically sound the alarm, therefore, integrates
Circuit 10 has circuit structure simple, that scalability is strong, and integrated circuit 10 has higher flexibility；Simultaneously because
When the code combination for the multiplex coding signal that ROM module 106 generates changes, 107 obtained audio signal of audio-frequency module
TONE also has different audio frequencies, and then audible device 20 is driven to send out the alarm song with different audio frequencies.
It should be noted that herein, such as multiple, multichannel, multiple and a variety of etc the number referred both to more than 1
Amount.
Claims (10)
1. a kind of integrated circuit imitating alarm song, which is characterized in that including：
Pull up signal is accessed, is configured to obtain the control of trigger signal and reset signal according to the pull up signal, clock signal
Module；
It is connect with the control module, is configured to generate the oscillation of oscillator signal when the trigger signal is the first level state
Device module；
Connect with the control module and the oscillator module, be configured to according to the reset signal to the oscillator signal into
Frequency dividing obtains the frequency division module of the clock signal and fractional frequency signal to row for the first time；
It is connect with the control module and the frequency division module, is configured to carry out the fractional frequency signal according to the reset signal
Second of frequency dividing obtains the beat module of carry signal；
It is connect with the beat module and the control module, is configured to be obtained according to the reset signal and the carry signal
The address module of the roads N address signal；
It is connect with described address module, is configured to generate the ROM module of the roads N encoded signal according to the roads N address signal；
It connect, is configured to according to the roads N encoded signal to the oscillator signal with the oscillator module and the ROM module
It carries out third time frequency dividing and obtains the audio-frequency module of audio signal；And
It connect, is configured to when the trigger signal is in the first level state to institute with the control module and the audio-frequency module
It states audio signal progress logical operation and obtains the output module of sound driver signal；
The wherein described N is the positive integer more than or equal to 8.
2. integrated circuit according to claim 1, which is characterized in that the control module includes：
It is configured to access DC power supply and generates the power on reset unit of the power-on reset signal；
It connect, is configured to according to the power-on reset signal and the pull-up with the power on reset unit and the frequency division module
The inversion signal of signal generates the reset signal, and is believed according to the reset signal, the clock signal and the pull-up
Number generate the signal generation unit of the trigger signal.
3. integrated circuit according to claim 2, which is characterized in that the signal generation unit includes：First PMOS tube,
First reverser, the second reverser, third reverser, the 4th reverser, the 5th reverser, the 6th reverser, the first nor gate,
Second nor gate, the first d type flip flop and the first T triggers；
The source electrode of wherein described first PMOS tube meets DC power supply, the grounded-grid of first PMOS tube, the first PMOS
The drain electrode of pipe and the input terminal of first reverser are configured to access the pull up signal, the input terminal of second reverser
Connect the frequency division module, the input terminal of the output end of second reverser and the 4th reverser is connected to the first D altogether
The CK input terminals of trigger, the output of the 4th reverser terminate the CKB input terminals of first d type flip flop, the third
The input terminal of reverser is configured to access the inversion signal of the pull up signal, and the first input end of first nor gate meets institute
State power on reset unit, the output of the third reverser terminates the second input terminal of first nor gate, described first or
The output of NOT gate terminates the input terminal of the 5th reverser, and the reset signal input terminal of the first d type flip flop and the first T are touched
The reset signal input terminal of hair device is connected to the output end of the 5th reverser altogether, and the Q output of first d type flip flop meets institute
The CK input terminals of the first T triggers are stated, the QB outputs of first d type flip flop terminate the CKB inputs of the first T triggers
The D input terminals of end, the output end of first reverser and first d type flip flop are connected to the first of second nor gate altogether
The Q output of input terminal, the first T triggers connects the second input terminal of second nor gate, second nor gate
Output terminates the input terminal of the 6th reverser, and the output end of the 6th reverser is configured as output to the trigger signal.
4. integrated circuit according to claim 1, which is characterized in that the oscillator module includes：First capacitance, first
Resistance, the 7th reverser, the 8th reverser, the 9th reverser, the tenth reverser, the 11st reverser, the 12nd reverser,
One NAND gate, the second NAND gate and third NAND gate；
Wherein, the input terminal of the first end of first capacitance, the first end of the first resistor and the 7th reverser
It is connected to the input terminal of the 8th reverser altogether, the output of the 8th reverser terminates the input terminal of the 9th reverser,
The output of 7th reverser terminates the first input end of first NAND gate, the second input terminal of first NAND gate
Connect the output end of second NAND gate, the first input end of the output end of first NAND gate and second NAND gate is total
It is connected to the first input end of the third NAND gate, the second of output termination second NAND gate of the 9th reverser is defeated
Enter end, the second input of the third NAND gate terminates the control module, the output termination of the third NAND gate described the
The input terminal of ten reversers, the output end of the tenth reverser and the second end of first capacitance are connected to the described 11st altogether
The input terminal of reverser, the output end of the 11st reverser and the second end of the first resistor are connected to the described 12nd altogether
The output end of the input terminal of reverser, the 12nd reverser is configured as output to the oscillator signal.
5. integrated circuit according to claim 1, which is characterized in that the frequency division module includes：13rd reverser,
14 reversers, the 15th reverser and the first T flip-flop arrays；
Wherein, the first T flip-flop arrays include N+1 mutually cascade T triggers, in the first T flip-flop arrays
The reset signal input terminals of every level-one T triggers be connected to the control module altogether, in the first T flip-flop arrays, i-th
The Q output of grade T triggers connects the CKB input terminals of i+1 grade T triggers, the QB output termination i+1 grades of i-stage T triggers
The CK input terminals of T triggers, the i are 1 to the arbitrary positive integer between N；
The input of 13rd reverser terminates the oscillator module, the output end of the 13rd reverser and described the
The input terminal of 14 reversers is connected to the CKB input terminals of first order T triggers in the first T flip-flop arrays altogether, and described
The output of 14 reversers terminates the CK input terminals of first order T triggers in the first T flip-flop arrays, and the first T is touched
The Q output of N+1 grades of T triggers connects the input terminal of the 15th reverser, the 15th reverser in hair device array
Output end be configured as output to the fractional frequency signal.
6. integrated circuit according to claim 1, which is characterized in that the beat module includes：16th reverser,
17 reversers, the second d type flip flop, third d type flip flop, the 2nd T triggers and the 3rd T triggers；
Wherein, the input of the 16th reverser terminates the frequency division module, the output end of the 16th reverser, described
The CKB input terminals of the CKB input terminals of second d type flip flop and the third d type flip flop are connected to the 17th reverser altogether
Input terminal, the output end of the 17th reverser and the CK input terminals of the third d type flip flop are connected to the 2nd D triggerings altogether
The CK input terminals of device, the reset signal input terminal of second d type flip flop, the 2nd T triggers reset signal input terminal
And the reset signal input terminal of the 3rd T triggers is connected to the control module, the Q outputs of second d type flip flop altogether
The D input terminals of the third d type flip flop are terminated, the QB outputs of second d type flip flop terminate the reset of the third d type flip flop
The QB output ends of signal input part, the D input terminals of second d type flip flop and the third d type flip flop are connected to the 2nd T altogether
The CK input terminals of trigger, the Q output of the third d type flip flop connect the CKB input terminals of the 2nd T triggers, and described
The Q output of two T triggers meets the CKB input terminals of the 3rd T triggers, the QB output terminations institute of the 2nd T triggers
The CK input terminals of the 3rd T triggers are stated, the QB output ends of the 2nd T triggers are configured as output to the carry signal.
7. integrated circuit according to claim 1, which is characterized in that described address module includes：Eighteen incompatibilities are to device,
19 reversers and the 2nd T flip-flop arrays；
Wherein, the 2nd T flip-flop arrays include N number of cascade T triggers, each in the 2nd T flip-flop arrays
The Q output of grade T triggers is configured as output to address signal all the way, is connected to altogether per the reset signal input terminal of level-one T triggers
The control module, the Q output of j-th stage T triggers connect the CKB input terminals of+1 grade of T trigger of jth, j-th stage T triggers
The CK input terminals of QB output termination+1 grade of T trigger of jth, wherein the j is 1 to the arbitrary positive integer between N-1；
The eighteen incompatibilities terminate the beat module to the input of device, and the eighteen incompatibilities are to the output end of device and the described tenth
The input terminal of nine reversers is connected to the CKB input terminals of the 1st grade of T trigger in the 2nd T flip-flop arrays altogether, and the described tenth
The output of nine reversers terminates the CK input terminals of the 1st grade of T trigger in the 2nd T flip-flop arrays.
8. integrated circuit according to claim 1, which is characterized in that the ROM module includes：
It is connect with described address module, is configured to generate the translator unit of decoded signal according to described address signal；
It is connect with the translator unit and described address module, is configured to be given birth to according to the decoded signal and described address signal
At the cell encoder of the roads N encoded signal.
9. integrated circuit according to claim 1, which is characterized in that the audio-frequency module includes：20th reverser,
21 reversers, the 22nd reverser, the 23rd reverser, the 24th reverser, third nor gate, the 4th T are touched
Send out device and
It is configured to the compound flip-flop array to repeatedly being divided to the oscillator signal according to the roads N encoded signal；
The wherein described compound flip-flop array is made of N number of compound trigger and the cascade of at least one XOR gate, the compound triggering
The reset signal input terminal of compound trigger described in every level-one accesses encoded signal all the way, the 20th reverser in device array
Input terminate the oscillator module, the reversed clock signal in the compound flip-flop array per the compound trigger of level-one is defeated
Enter and holds the output end for being connected to the 20th reverser altogether, the forward direction in the compound flip-flop array per the compound trigger of level-one
Clock signal input terminal is connected to the output end of the 21st reverser altogether, and the input of the 21st reverser terminates institute
State the output end of the 20th reverser；
There is the wherein described third nor gate N-1 input terminal, the input of the third nor gate to terminate the compound trigger
The positive output end of compound trigger in array, the output of the third nor gate terminate the input of the 22nd reverser
End, the Reverse Turning Control in the output end of the 22nd reverser, the compound flip-flop array per the compound trigger of level-one
The input terminal of end and the 23rd reverser is connected to the CKB input terminals of the 4th T triggers altogether, and the described 23rd
Positive control terminal in the output end of reverser and the compound flip-flop array per level-one compound trigger is connected to described the altogether
The CK input terminals of four T triggers, the QB outputs of the 4th T triggers terminate the input terminal of the 24th reverser, institute
The output end for stating the 24th reverser is configured as output to the audio signal.
10. a kind of warning device, which is characterized in that including integrated circuit as described in any one of claim 1 to 9, and：
It is connect with the integrated circuit, is configured to the sound driver signal signal an alert generated according to the integrated circuit
Audible device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810667996.XA CN108769875A (en) | 2018-06-26 | 2018-06-26 | Imitate the integrated circuit and warning device of alarm song |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810667996.XA CN108769875A (en) | 2018-06-26 | 2018-06-26 | Imitate the integrated circuit and warning device of alarm song |
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| CN109584853A (en) * | 2018-12-14 | 2019-04-05 | 宗仁科技(平潭)有限公司 | A kind of piezo drive integrated circult and electronic equipment |
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