CN108768555B - Digital control type adjustable microwave delayer and delay test method thereof - Google Patents
Digital control type adjustable microwave delayer and delay test method thereof Download PDFInfo
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- CN108768555B CN108768555B CN201810952222.1A CN201810952222A CN108768555B CN 108768555 B CN108768555 B CN 108768555B CN 201810952222 A CN201810952222 A CN 201810952222A CN 108768555 B CN108768555 B CN 108768555B
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Abstract
The invention discloses a digital control type adjustable microwave delayer and a delay testing method thereof, belonging to the technical field of microwave measurement. The digital control type adjustable microwave delayer comprises an outer cover plate, an inner cover plate, a PCB (printed circuit board), a power supply plate and a box body; connectors are arranged on two sides of the box body, the power supply board, the PCB board and the inner cover board are sequentially arranged in the box body from bottom to top, and the outer cover board is arranged at the top of the box body; the PCB is provided with a radio frequency module, the control module is connected with the radio frequency module, and the power supply module is respectively connected with the control module and the radio frequency module; the control module comprises a programmable logic device; the radio frequency module comprises a power division network, a delay branch, a transmitting branch and a receiving branch, wherein the power division network is connected with the delay branch, and the delay branch is connected with the transmitting branch and the receiving branch; each delay branch comprises a 4-wavelength delayer, a bidirectional amplifier, an equalizer, a numerical control attenuator, a 4-bit delayer and an 8-wavelength delayer, wherein the 8-wavelength delayer is connected with a switch.
Description
Technical Field
The embodiment of the invention relates to the technical field of microwave measurement, in particular to a digital control type adjustable microwave delayer and a delay test method thereof.
Background
In radar communication systems, digital controlled adjustable microwave delays are increasingly used because of the need for a certain time delay of the transmitted or received radio frequency signals in many situations. The digitally controlled adjustable microwave delay device can simulate the time required by electromagnetic waves to come and go between the radar antenna and a target, and different time delays are required to be carried out on high-frequency signals sent by a radio station in the radio station channel simulator so as to simulate the interference of multipath transmission on the radio station and the like.
The digital control type adjustable microwave delay device comprises a microwave amplifier, a microwave delay device and a microwave switch, the delay state of the digital control type adjustable microwave delay device is adjusted according to an external digital control signal, the delay difference between each state is required to be very high in test, and the delay precision of an initial state is not required to be very high.
The current testing precision of the X-band vector network analyzer on the market mostly adopts a percentage form, namely when the maximum measuring range of the delay measurement of the microwave module is 100ns level, the testing precision is generally about 1 ns. In view of this, when the delay of the microwave module is in the millisecond level and the adjustable minimum step is 25ps, the test has extremely high requirements on the vector network analyzer, the precision needs to reach 0.0025%, and the delay test of the digital control type adjustable microwave delay device cannot be performed by using the common vector network analyzer.
Disclosure of Invention
In order to solve the problems in the prior art, the embodiment of the invention provides a digital control type adjustable microwave delayer and a delay test method thereof. The technical scheme is as follows:
in a first aspect, a digitally controlled adjustable microwave delay device is provided, comprising an outer cover plate, an inner cover plate, a PCB, a power supply plate and a box body;
connectors are arranged on two sides of the box body, the power supply board, the PCB board and the inner cover board are sequentially arranged in the box body from bottom to top, and the outer cover board is arranged at the top of the box body;
the power supply board is provided with a control module and a power supply module, the PCB board is provided with a radio frequency module, the control module is connected with the radio frequency module, and the power supply module is respectively connected with the control module and the radio frequency module;
the power supply module comprises a voltage stabilizer and a resistance-capacitance component;
the control module comprises a programmable logic device, a digital delay device, a driver, a diode and a triode;
the radio frequency module comprises a power division network, a delay branch, a transmitting branch and a receiving branch, wherein the power division network is connected with the delay branch, and the delay branch is respectively connected with the transmitting branch and the receiving branch;
the power dividing network comprises 2 couplers and 5 power dividers, wherein the first coupler is connected with the first power divider, the first power divider is connected with the second power divider and the third power divider, the third power divider is connected with the fourth power divider, and the fourth power divider is connected with the fifth power divider and the second coupler;
each delay branch comprises a 4-wavelength delayer, a bidirectional amplifier, an equalizer, a numerical control attenuator, a 4-bit delayer and an 8-wavelength delayer, wherein the 8-wavelength delayer is connected with a switch;
each transmitting branch comprises a driving amplifier, a medium power amplifier and a coupler, wherein the driving amplifier is connected with the switch, and the coupler is connected with the circulator;
each receiving branch comprises a limiter, a numerical control attenuator and a low noise amplifier, wherein the low noise amplifier is connected with a switch, and the limiter is connected with a circulator;
the circulator is connected with the antenna port, and the first coupler and the second coupler are respectively connected with the receiving output port;
each transmitting branch is also provided with a power detection circuit and a voltage amplification circuit, wherein the power detection circuit consists of a detection diode and a plurality of resistance container parts, the voltage amplification circuit consists of an operational amplifier and a plurality of resistance container parts, and the operational amplifier adopts a rail-to-rail in-phase proportional operational amplifier; in each transmitting branch, the power detection circuit is connected with the output end of the coupler in the transmitting branch, the output end of the power detection circuit is connected with the rail-to-rail in-phase proportional operational amplifier, the output end of the rail-to-rail in-phase proportional operational amplifier is connected with the programmable logic device in the control module, the detection level output by the power detection circuit is input into the rail-to-rail in-phase proportional operational amplifier, and the rail-to-rail in-phase proportional operational amplifier compares the detection level with the comparison level and then outputs the comparison result to the programmable logic device.
Optionally, in each transmitting branch, the coupler is connected with the power detection circuit, the output end of the power detection circuit is connected with the rail-to-rail in-phase proportional operational amplifier, and the output end of the rail-to-rail in-phase proportional operational amplifier is connected with the programmable logic device in the control module.
Optionally, the radio frequency module includes 4 delay branches, the 4 wavelength delayers in the first delay branch and the second delay branch are respectively connected with the second power divider, and the 4 wavelength delayers in the third delay branch and the fourth delay branch are respectively connected with the fifth power divider;
in each delay branch, a 4-wavelength delayer, a first bidirectional amplifier, a first equalizer, a numerical control attenuator, a 4-bit delayer, a second bidirectional amplifier, a second equalizer and an 8-wavelength delayer are sequentially connected.
In a second aspect, a delay test method for a digitally controlled adjustable microwave delay device is provided, where the digitally controlled adjustable microwave delay device is a digitally controlled adjustable microwave delay device as shown in the first aspect, and the digitally controlled adjustable microwave delay device is connected with a vector network analyzer, and the method includes:
the digital control type adjustable microwave delay device transmits a radio frequency signal, and the radio frequency signal takes the ground state of the digital control type adjustable microwave delay device as a reference and takes a preset time interval as a step to delay;
receiving radio frequency signals through a vector network analyzer, and obtaining detection data, wherein the detection data is the corresponding relation between frequency and phase;
determining the turnover times of the radio frequency signal at the ith frequency point according to the detection data and a test unit of the vector network analyzer, wherein the test unit comprises an unwarped phase and a phase;
determining the actual phase offset of the radio frequency signal at the ith frequency point according to the turnover times;
determining delay time according to the corresponding relation between the actual phase offset and the delay time;
and determining the delay precision of the digital control type adjustable microwave delay device according to the delay time and the preset time interval.
Optionally, when the test unit is phase, determining the number of times of turning of the radio frequency signal at the ith frequency point according to the detection data and the test unit of the vector network analyzer includes:
and determining the turnover times according to the number of the sawteeth in the line graph corresponding to the detection data, wherein the number of the sawteeth is equal to the turnover times.
Optionally, when the test unit is an unwrapped phase, determining the number of times of turning over the digitally controlled adjustable microwave delay according to the test data and the test unit of the vector network analyzer includes:
acquiring phase offset of any two frequency points according to the detection data;
determining the turnover times according to the following formula I and formula II;
pgj=360×n+p' ×g formula b;
wherein, p is the actual phase shift of the radio frequency signal, p' is the phase shift in the detection data, G is the frequency, n is the turnover number, and d is the delay time of the radio frequency signal.
Optionally, determining the actual phase offset of the radio frequency signal at the ith frequency point according to the test unit and the turnover number includes:
acquiring phase offset corresponding to an ith frequency point in the detection data;
determining the actual phase offset of the ith frequency point according to a formula III;
Y i ＝X i +n×360 formula three;
wherein Y is i For the actual phase shift of the ith frequency point, X i In order to detect the phase offset corresponding to the ith frequency point in the data, n is the turnover number.
Optionally, determining the delay time according to the corresponding relationship between the actual phase offset and the delay time includes:
determining delay time according to the actual phase offset and the formula I;
wherein p is the actual phase offset of the radio frequency signal, G is the frequency, n is the number of inversions, and d is the delay time of the radio frequency signal.
The technical scheme provided by the embodiment of the invention has the beneficial effects that:
a power self-checking circuit and a track-to-track (track-to-track) in-phase proportional operational amplifier in a digital control type adjustable microwave delay device realize the function of self-checking the transmitting power,
when the delay test is carried out, the phase offset is used for replacing the direct test delay, so that the problem of low delay test precision of the traditional digital control type adjustable microwave delay device is solved; the effect that the delay precision of the digital adjustable microwave delay device can be tested by using the vector network analyzer with the delay test precision of 1% is achieved, and the high precision requirement on vector network analysis during delay test is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a digitally controlled tunable microwave delay according to an exemplary embodiment;
FIG. 2 is an exploded view of a digitally controlled tunable microwave delay shown in accordance with an exemplary embodiment;
FIG. 3 is a schematic diagram of a radio frequency module according to an exemplary embodiment;
FIG. 4 is a schematic diagram of a voltage amplifying circuit in a radio frequency module according to an exemplary embodiment;
FIG. 5 is a flow chart illustrating a delay test method of a digitally controlled tunable microwave delay according to an exemplary embodiment;
FIG. 6 is a plot of the correspondence of test data obtained by the vector network analyzer under two test units;
FIG. 7 is a flow chart illustrating a delay test method of a digitally controlled tunable microwave delay according to another example embodiment;
fig. 8 is a flow chart illustrating a delay test method of a digitally controlled tunable microwave delay according to yet another exemplary embodiment.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
Referring to fig. 1 and 2, a block diagram of a digitally controlled tunable microwave delay device according to an embodiment of the present invention is schematically shown, where the digitally controlled tunable microwave delay device includes an outer cover plate 6, an inner cover plate 5, a PCB board 4, a power supply plate 3 and a box 1.
Alternatively, the power board is an FR4 board and the PCB board is a Rogers5880 board.
The power supply board is provided with a control module and a power module, the PCB board is provided with a radio frequency module, the control module is connected with the radio frequency module, and the power module is respectively connected with the control module and the radio frequency module.
The power supply module comprises various voltage regulators and resistance-capacitance components. Optionally, the voltage regulator LDO.
The resistive-capacitive devices are resistors and capacitors.
The control module comprises a programmable logic device, a digital delay device, various drivers, a diode and a triode. Optionally, the programmable logic device is a CPLD.
The radio frequency module comprises a power division network, a delay branch, a transmitting branch and a receiving branch. The power dividing network is connected with the delay branch, and the delay branch is respectively connected with the transmitting branch and the receiving branch.
The transmitting branch is used for amplifying the excitation signal and transmitting the excitation signal to the antenna port. The receiving branch is used for linearly amplifying the signal received by the antenna port. The delay branch is used to delay the signal. The power division network is used for distributing signals of all channels.
The power supply module is used for realizing voltage stabilization and adjustment of a power supply.
The control module is used for realizing the functions of power protection, data serial-parallel conversion, time-sharing work of receiving and transmitting, time-delay state control switching and the like.
Fig. 3 shows schematically the principle of a radio frequency module.
As shown in fig. 3, the power dividing network includes 2 couplers and 5 power dividers, the first coupler is connected with the first power divider, the first power divider is connected with the second power divider and the third power divider, the third power divider is connected with the fourth power divider, and the fourth power divider is connected with the fifth power divider and the second coupler.
The radio frequency module comprises 4 delay branches, the first delay branch and the second delay branch are respectively connected with the second power divider, and the third delay branch and the fourth delay branch are respectively connected with the fifth power divider.
Each delay branch comprises a 4-wavelength delayer, a bidirectional amplifier, an equalizer, a numerical control attenuator, a 4-bit delayer and an 8-wavelength delayer.
Each channel includes a switch and a circulator.
In each delay branch, a 4-wavelength delayer is connected with a power divider, and an 8-wavelength delayer is connected with a switch.
In each delay branch, a 4-wavelength delayer is connected with a first bidirectional amplifier, the first bidirectional amplifier is connected with a first equalizer, the first equalizer is connected with a numerical control attenuator, the numerical control attenuator is connected with a 4-bit delayer, the 4-bit delayer is connected with a second bidirectional amplifier, the second bidirectional amplifier is connected with a second equalizer, the second equalizer is connected with an 8-wavelength delayer, and the 8-wavelength delayer is connected with a switch.
The 4-bit delay device is a 1-bit 400ps numerical control delay device, the 8-bit delay device is a 1-bit 800ps numerical control delay device, and the 4-bit delay device is a 4-bit 25ps numerical control delay device.
Each transmitting branch comprises a driving amplifier DPA, a medium frequency amplifier MPA and a coupler, wherein the driving amplifier DPA is connected with the switch, the driving amplifier DPA is connected with the medium frequency amplifier MPA, the medium frequency amplifier MPA is connected with the coupler, and the coupler is connected with the circulator.
Each receiving branch comprises a limiter, a numerical control attenuator and a low noise amplifier LNA, the circulator is connected with the limiter, the limiter is connected with the numerical control attenuator, the numerical control attenuator is connected with the low noise amplifier LNA, and the low noise amplifier LNA is connected with the switch.
The circulator is connected with the antenna port, and the first coupler and the second coupler are respectively connected with the receiving output port.
In fig. 3, ZA1, ZA2, ZA3, ZA4 denote antenna ports, ZS denotes a collective port, ZR1, ZR2 denote reception output ports, and ZC1, ZC2 denote coupler output ports.
In order to meet the requirement of self-checking of the transmitting power, each transmitting branch is also provided with a power detection circuit and a voltage amplification circuit, the power detection circuit is composed of a detection diode and a plurality of resistance-capacitance components, the voltage amplification circuit is composed of an operational amplifier and a plurality of resistance-capacitance components, and in order to enable the detection level of the power detection circuit to reach the power supply voltage of the amplifier after being amplified, the operational amplifier adopts a rail-to-rail (in-phase) proportional operational amplifier.
In each transmitting branch, the power detection circuit is connected with the output end of a coupler in the transmitting branch, the output end of the power detection circuit is connected with the rail-to-rail in-phase proportional operational amplifier, the output end of the rail-to-rail in-phase proportional operational amplifier is connected with the programmable logic device in the control module, and the rail-to-rail in-phase proportional operational amplifier outputs a comparison level.
As shown in fig. 4, the detection level output by the power detection circuit is input into the rail-to-rail in-phase proportional operational amplifier U1, and the rail-to-rail in-phase proportional operational amplifier compares the detection level with the comparison level, and then outputs the comparison result and sends the comparison result to the programmable logic device.
It should be noted that, the specific circuit structures of the control module, the power module, and the power detection circuit in the digitally controlled adjustable microwave delay device are prior art in the field, and are not repeated here.
Referring to fig. 5, a flowchart of a delay test method of a digitally controlled tunable microwave delay device according to an embodiment of the invention is shown. Before the delay test, 2 test ports of the vector network analyzer are calibrated to be 0, and then the antenna port of the digital control type adjustable microwave delay device is connected with the test port of the vector network analyzer.
After receiving the radio frequency signal, the vector network analyzer processes the phase information and gain information of the radio frequency signal. As shown in fig. 6:
when using the unwarped phase as a test unit, due to the characteristics of the phase discriminator, the integer multiple of 360 ° of the phase offset cannot be recognized by the phase discriminator in the vector network analyzer, the first frequency point tested by the vector network analyzer will always be between-180 ° and +180°, and the actual phase offset also contains information of integer multiple of 360 °, i.e. the actual phase offset=the phase offset +360° x n in the vector network analyzer detection data, where n represents the number of times the actual phase offset is converted into the phase offset in the vector network analyzer detection data.
When phase is used as a test unit, due to the characteristics of the vector network analyzer, the accumulated phase offset of the subsequent frequency points is reflected in a line diagram corresponding to the detection data, namely the jump times of-180 degrees to +180 degrees, namely the number of saw teeth in the line diagram.
As shown in fig. 5, the delay test method of the digitally controlled tunable microwave delay device may include the following steps:
The radio frequency signal is delayed by taking the ground state of the numerical control microwave delay device as a reference and taking a preset time interval as a step.
The first frequency point tested will always be between-180 deg. and 180 deg. due to the characteristics of the vector network analyzer; since the normal working frequency band of the digital control type adjustable microwave delay is 8-12GHz, the digital control type adjustable microwave delay is limited by a microwave amplifier chip used in the digital control type adjustable microwave delay, and the digital control type adjustable microwave delay cannot be measured by taking 10MHz as an initial starting point and can only be measured by taking 8GHz as a starting point.
Alternatively, the delay is performed in 25ps steps. The delay of 25ps is equivalent to 72 DEG phase reduction at 8GHz, and secondary overturn is not caused.
The detection data is the corresponding relation between frequency and phase.
The test units include unwarped phase and phase.
The i-th frequency point is any one frequency point in the detection data.
And determining the delay time corresponding to the ith frequency point based on the corresponding relation between the actual phase offset and the delay time.
In summary, according to the delay test method of the digitally controlled adjustable microwave delay device provided by the embodiment of the invention, the digitally controlled adjustable microwave delay device is used for transmitting the radio frequency signal, the vector network analyzer is used for receiving the radio frequency signal, obtaining the detection data, determining the turnover times according to the detection data and the test unit of the vector network analyzer, and determining the actual phase offset of the radio frequency signal at the ith frequency point according to the test unit and the turnover times; determining delay time according to the corresponding relation between the actual phase offset of the ith frequency point and the delay time; determining the delay precision of the digital control type adjustable microwave delay device according to the delay time and a preset time interval; the phase offset is used for replacing direct test delay, so that the problem of low delay test precision of the traditional digital control type adjustable microwave delay device is solved; the effect that the delay precision of the digital adjustable microwave delay device can be tested by using the vector network analyzer with the delay test precision of 1% is achieved, and the high precision requirement on vector network analysis during delay test is reduced.
When the test unit is phase, the flow chart of the delay test method of the digital control type adjustable microwave delay device is shown in fig. 7.
In step 701, a digitally controlled adjustable microwave delay transmits a radio frequency signal.
This step is illustrated in step 501 and will not be described in detail here.
This step is illustrated in 502 and will not be described in detail herein.
The number of the saw teeth is equal to the turnover times.
The number of the saw teeth is an integer.
Taking fig. 6 as an example, at the a-th frequency point, the number of saw teeth is 1, that is, the number of times of turning over the i-th frequency point is 1.
And acquiring phase offset corresponding to the ith frequency point in the detection data.
According to formula Y i ＝X i +n×360 determines the actual phase offset of the i-th frequency bin.
Wherein Y is i For the actual phase shift of the ith frequency point, X i In order to detect the phase offset corresponding to the ith frequency point in the data, n is the turnover number.
The corresponding relation between the actual phase offset and the delay time can be expressed by the formula
A representation;
wherein p is the actual phase offset of the radio frequency signal, G is the frequency, n is the number of inversions, and d is the delay time of the radio frequency signal.
And determining the delay time corresponding to the actual phase offset of the ith frequency point according to the corresponding relation between the actual phase offset and the delay time.
And determining the delay precision of the digital control type adjustable microwave delay device according to the delay time corresponding to the ith frequency point and a preset time interval.
When the test unit is an unwrapped phase, the flow chart of the delay test method of the digitally controlled tunable microwave delay is shown in fig. 8.
In step 801, a digitally controlled adjustable microwave delay transmits a radio frequency signal.
This step is illustrated in step 501 and will not be described in detail here.
This step is illustrated in 502 and will not be described in detail herein.
pgj=360×n+p' ×g formula b;
wherein, p is the actual phase shift of the radio frequency signal, p' is the phase shift in the detection data, G is the frequency, n is the turnover number, and d is the delay time of the radio frequency signal.
Assume that a phase shift p3 'of a3 rd frequency point and a phase shift p5' of a 5 th frequency point are obtained from detection data; as can be obtained according to the first formula,
will->
Is brought into formula II to obtain
Since the time delays corresponding to any two frequency points are equal, that is d3=d5, the method canAnd obtaining the value of the turnover number n, and rounding n when n is not an integer, namely taking the integer before the decimal point.
Multiple groups of different frequency points can be selected simultaneously to calculate the n value so as to verify the correctness of the n value.
In step 805, the actual phase offset of the rf signal at the ith frequency point is determined according to the number of inversions.
And acquiring phase offset corresponding to the ith frequency point in the detection data.
According to formula Y i ＝X i +n×360 determines the actual phase offset of the i-th frequency bin.
Wherein Y is i For the actual phase shift of the ith frequency point, X i In order to detect the phase offset corresponding to the ith frequency point in the data, n is the turnover number.
the corresponding relation between the actual phase offset and the delay time can be expressed by the formula
A representation;
wherein p is the actual phase offset of the radio frequency signal, G is the frequency, n is the number of inversions, and d is the delay time of the radio frequency signal.
This step is illustrated in 705 and will not be described in detail here.
This step is illustrated at 706 and will not be described in detail here.
It should be noted that: the foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, where the program may be stored in a computer readable storage medium, and the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.
Claims (7)
1. The digital control type adjustable microwave delay device is characterized by comprising an outer cover plate, an inner cover plate, a PCB (printed circuit board), a power supply plate and a box body;
connectors are arranged on two sides of the box body, the power supply board, the PCB board and the inner cover board are sequentially arranged in the box body from bottom to top, and the outer cover board is arranged at the top of the box body;
the PCB is provided with a radio frequency module, the control module is connected with the radio frequency module, and the power supply module is respectively connected with the control module and the radio frequency module;
the power supply module comprises a voltage stabilizer and a resistance-capacitance component;
the control module comprises a programmable logic device, a digital delay device, a driver, a diode and a triode;
the radio frequency module comprises a power division network, a delay branch, a transmitting branch and a receiving branch, wherein the power division network is connected with the delay branch, and the delay branch is respectively connected with the transmitting branch and the receiving branch;
the power dividing network comprises 2 couplers and 5 power dividers, wherein the first coupler is connected with the first power divider, the first power divider is connected with the second power divider and the third power divider, the third power divider is connected with the fourth power divider, and the fourth power divider is connected with the fifth power divider and the second coupler;
each delay branch circuit comprises a 4-wavelength delayer, a bidirectional amplifier, an equalizer, a numerical control attenuator, a 4-bit delayer and an 8-wavelength delayer, wherein the 8-wavelength delayer is connected with a switch;
each transmitting branch comprises a driving amplifier, a medium power amplifier and a coupler, wherein the driving amplifier is connected with the switch, and the coupler is connected with the circulator;
each receiving branch comprises a limiter, a numerical control attenuator and a low noise amplifier, wherein the low noise amplifier is connected with the switch, and the limiter is connected with the circulator;
the circulator is connected with an antenna port, and the first coupler and the second coupler are respectively connected with a receiving output port;
each transmitting branch is also provided with a power detection circuit and a voltage amplification circuit, wherein the power detection circuit consists of a detection diode and a plurality of resistance container parts, the voltage amplification circuit consists of an operational amplifier and a plurality of resistance container parts, and the operational amplifier adopts a rail-to-rail in-phase proportional operational amplifier; in each transmitting branch, the power detection circuit is connected with the output end of the coupler in the transmitting branch, the output end of the power detection circuit is connected with the rail-to-rail in-phase proportional operational amplifier, the output end of the rail-to-rail in-phase proportional operational amplifier is connected with the programmable logic device in the control module, the detection level output by the power detection circuit is input into the rail-to-rail in-phase proportional operational amplifier, and the rail-to-rail in-phase proportional operational amplifier compares the detection level with the comparison level and then outputs the comparison result to the programmable logic device.
2. The digitally controlled tunable microwave delay of claim 1 wherein the radio frequency module comprises 4 delay branches, the 4 wavelength delays in the first delay branch and the second delay branch are respectively connected with the second power divider, and the 4 wavelength delays in the third delay branch and the fourth delay branch are respectively connected with the fifth power divider;
in each delay branch, a 4-wavelength delayer, a first bidirectional amplifier, a first equalizer, a numerical control attenuator, a 4-bit delayer, a second bidirectional amplifier, a second equalizer and an 8-wavelength delayer are sequentially connected.
3. A delay test method of a digitally controlled adjustable microwave delay device, wherein the digitally controlled adjustable microwave delay device is a digitally controlled adjustable microwave delay device according to claim 1 or 2, and the digitally controlled adjustable microwave delay device is connected with a vector network analyzer, the method comprising:
the digital control type adjustable microwave delay device transmits a radio frequency signal, and the radio frequency signal is delayed by taking the ground state of the digital control type adjustable microwave delay device as a reference and taking a preset time interval as a step;
receiving the radio frequency signal through the vector network analyzer, and obtaining detection data, wherein the detection data is the corresponding relation between frequency and phase;
determining the turnover times of the radio frequency signal at the ith frequency point according to the detection data and a test unit of the vector network analyzer, wherein the test unit comprises an unfolding phase and a phase;
determining the actual phase offset of the radio frequency signal at the ith frequency point according to the turnover times;
determining delay time according to the corresponding relation between the actual phase offset and the delay time;
and determining the delay precision of the digital control type adjustable microwave delayer according to the delay time and the preset time interval.
4. The delay test method of claim 3 wherein when the test unit is a phase, determining the number of times the radio frequency signal is flipped at the i-th frequency point according to the detection data and the test unit of the vector network analyzer comprises:
and determining the turnover times according to the number of the sawteeth in the line graph corresponding to the detection data, wherein the number of the sawteeth is equal to the turnover times.
5. The delay test method of claim 3, wherein when the test unit is an expansion phase, the determining the number of times of flip of the radio frequency signal at the ith frequency point according to the detection data and the test unit of the vector network analyzer comprises:
acquiring phase offset of any two frequency points according to the detection data;
determining the turnover times according to the following formula I and formula II;
pgj=360×n+p' ×g formula b;
wherein p is the actual phase shift of the radio frequency signal, p' is the phase shift in the detection data, G is the frequency, n is the turnover number, and d is the delay time of the radio frequency signal.
6. The delay test method of claim 3, wherein determining the actual phase offset of the radio frequency signal at the i-th frequency point according to the flip times comprises:
acquiring phase offset corresponding to an ith frequency point in the detection data;
determining the actual phase offset of the ith frequency point according to a formula III;
Y i ＝X i +n×360 formula three;
wherein Y is i For the actual phase shift of the ith frequency point, X i In order to detect the phase offset corresponding to the ith frequency point in the data, n is the turnover number.
7. The delay test method of claim 3, wherein determining the delay time based on the correspondence between the actual phase offset and the delay time comprises:
determining the delay time according to the actual phase offset and the formula I;
wherein, p is the actual phase shift of the radio frequency signal, G is the frequency, n is the turnover number, and d is the delay time of the radio frequency signal.
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| CN201810952222.1A CN108768555B (en) | 2018-08-21 | 2018-08-21 | Digital control type adjustable microwave delayer and delay test method thereof |
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