CN108666304B - Array substrate and display panel - Google Patents
Array substrate and display panel Download PDFInfo
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- CN108666304B CN108666304B CN201810443933.6A CN201810443933A CN108666304B CN 108666304 B CN108666304 B CN 108666304B CN 201810443933 A CN201810443933 A CN 201810443933A CN 108666304 B CN108666304 B CN 108666304B
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- 239000000758 substrate Substances 0.000 title claims abstract description 30
- 230000035939 shock Effects 0.000 claims description 8
- 239000002184 metal Substances 0.000 abstract description 10
- 229910052751 metal Inorganic materials 0.000 abstract description 10
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 description 17
- 238000000034 method Methods 0.000 description 9
- 230000003068 static effect Effects 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 2
- 208000034656 Contusions Diseases 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 208000034526 bruise Diseases 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/22—Antistatic materials or arrangements
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
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Abstract
The invention provides an array substrate and a display panel, comprising: the first routing comprises a main body part and a first protrusion part, and the first protrusion part is arranged on one side of the main body part close to the second routing; the second wire is arranged opposite to the first protrusion, and a first electrostatic protection electrode is arranged between the second wire and the first protrusion; the beneficial effects are that: the array substrate and the display panel provided by the invention can reduce the probability of electrostatic damage, and metal wiring required in the panel cannot be influenced even if the electrostatic damage occurs, so that the product yield is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and a display panel.
Background
In the design of the thin film transistor liquid crystal display panel, a large number of signals need to be connected with a peripheral driving circuit by using metal wiring, so that external driving signals and pulse timing signals are provided for a panel pixel area to be displayed and driven. In the routing of peripheral circuits, bulk and strip metal designs are most commonly used to reduce parasitic resistance and parasitic capacitance.
However, in the process of the tft-lcd, a lot of equipment and processes are needed, and a large amount of static electricity is accumulated on the glass substrate during the manufacturing process, which causes the large and long metal routing to be damaged by static electricity, resulting in abnormal resistance, open circuit or short circuit, and directly affecting the yield of the tft-lcd.
Disclosure of Invention
The embodiment of the invention provides an array substrate and a display panel, which can reduce the probability of electrostatic damage, and can not influence metal wiring required in the panel even if the electrostatic damage occurs, thereby improving the yield of products.
The invention provides an array substrate, comprising:
a first trace and a second trace, wherein,
the first routing comprises a main body part and a first protrusion part, and the first protrusion part is arranged on one side of the main body part close to the second routing;
the second wire is arranged opposite to the first protrusion, and a first electrostatic protection electrode is arranged between the second wire and the first protrusion;
the first routing wire divides the second routing wire into a first part and a second part, the first routing wire further comprises a second protrusion, the first protrusion is arranged on one side, close to the first part, of the main body, and the second protrusion is arranged on one side, close to the second part, of the main body, wherein the second part and the second protrusion are oppositely arranged, and a second electrostatic protection electrode is arranged between the second part and the second protrusion.
According to a preferred embodiment of the present invention, a distance between the first electrostatic discharge protection electrode and the first portion is equal to a distance between the first electrostatic discharge protection electrode and the first protrusion.
According to a preferred embodiment of the present invention, the first protrusion includes a first end and a second end, which are opposite to each other, and the first end is connected to the main body, wherein a distance between the first end and the second end is greater than a first preset value, and the first preset value is between 5um and 15 um.
According to a preferred embodiment of the present invention, a distance between the first portion and the first protrusion is greater than a second predetermined value, and the second predetermined value is between 100 to 200 um.
According to a preferred embodiment of the present invention, the second trace further includes a third portion, and the third portion is used for connecting the first portion and the second portion; the first routing line, the first electrostatic protection electrode, the first portion, the second electrostatic protection electrode and the second portion are located on the same layer, and the third portion, the first routing line, the first electrostatic protection electrode, the first portion, the second electrostatic protection electrode and the second portion are located on different layers.
According to a preferred embodiment of the present invention, the third portion is arranged in a cross-line structure to avoid the first protrusion and the second protrusion, so as to avoid short circuit between the third portion and the main body portion, the first portion or the second portion when the first protrusion and the second protrusion are subjected to electrostatic shock
Correspondingly, the invention also provides a display panel comprising the array substrate of any embodiment of the invention.
According to the array substrate provided by the invention, the protruding part is arranged on the first routing wire, so that the distance between the first routing wire and the second routing wire is increased, the probability of electrostatic damage is reduced, meanwhile, the electrode is arranged between the protruding part and the second routing wire, the effect of shielding an electric field is formed, and the electrostatic damage is caused on the electrode, so that even if the electrostatic damage is caused, the metal routing wires required in the panel cannot be influenced, and the product yield is improved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a first schematic view of a routing plane structure of an array substrate according to an embodiment of the present invention;
fig. 2 is a second schematic view of a routing plane structure of the array substrate according to the embodiment of the present invention;
fig. 3 is a schematic plan view of a partial routing area of the array substrate according to a preferred embodiment of the invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The first embodiment,
Referring to fig. 1, fig. 1 is a first schematic view illustrating a routing plane structure of an array substrate according to an embodiment of the invention. An embodiment of the present invention provides an array substrate, including:
a first trace 10 and a second trace 20; the first trace 10 includes a main body 101 and a first protrusion 102, and the first protrusion 102 is disposed on a side of the main body 101 close to the second trace 20; the second trace 20 is disposed opposite to the first protrusion 102, and a first esd protection electrode 501 is disposed between the second trace 20 and the protrusion 102, so that an electrostatic damage occurs on the first esd protection electrode 501.
The first trace 10 divides the second trace 20 into a first portion 201 and a second portion 202, the first trace further includes a second protrusion 103, the first protrusion 102 is disposed on a side of the main body 101 close to the first portion 201, the second protrusion 103 is disposed on a side of the main body 101 close to the second portion 202, wherein the second portion 202 is disposed opposite to the second protrusion 103, and a second esd protection electrode 502 is disposed between the second portion 202 and the second protrusion 103, so that an electrostatic shock occurs on the second esd protection electrode 502.
Preferably, the shape and size of the first protrusion 102 are the same as those of the second protrusion 103, and optionally, the shape of the first protrusion 102 and the second protrusion 103 may be trapezoidal.
Preferably, the shapes and sizes of the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 are the same, and the sizes of the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 may be defined according to the actual panel space.
Preferably, a distance between the first electrostatic protection electrode 501 and the first portion 201 is equal to a distance between the first electrostatic protection electrode 501 and the first protrusion 102.
It should be noted that the first protrusion 102 includes a first end 1021 and a second end 1022 that are oppositely disposed, and the first end 1021 is connected to the main body 101, wherein a distance between the first end 1021 and the second end 1022 is greater than a first preset value, and the first preset value is between 5um and 15 um. For example, preferably, the first preset value is 10um, and a distance between the first end 1021 and the second end 1022 is greater than 10 um.
Preferably, the distance between the first portion 201 and the first protrusion 102 is greater than a second preset value, and the second preset value is between 100 to 200 um. Preferably, the second preset value may be 150um, and a distance between the first portion 201 and the first protrusion 102 is greater than 150 um.
Further, referring to fig. 2, fig. 2 is a second schematic view of a routing plane structure of the array substrate according to the embodiment of the present invention. As shown in fig. 2, the second trace 20 further includes a third portion 203, where the third portion 203 is used to connect the first portion 201 and the second portion 202, for example, the third portion 203 is a cross-line structure, and when connecting the first portion 201 and the second portion 202, the third portion 203 avoids the first protrusion 102 and the second protrusion 103, and when the first protrusion 102 and the second protrusion 103 are damaged by electrostatic shock, the third portion 203 is prevented from being short-circuited with the main body 101, the first portion 201, or the second portion 202.
The first trace 10, the first esd protection electrode 501, the first portion 201, the second esd protection electrode 502, and the second portion 202 are located on the same layer, and the third portion 203 is located on a different layer from the first trace 10, the first esd protection electrode 501, the first portion 201, the second esd protection electrode 502, and the second portion 202.
In this embodiment, the first protrusion 102 and the second protrusion 103 are disposed on the first trace, which increases the distance between the first trace 10 and the second trace 20, and reduces the probability of electrostatic damage, and meanwhile, the first electrostatic protection electrode 501 is disposed between the first protrusion 102 and the first portion 201, and the second electrostatic protection electrode 502 is disposed between the second protrusion 103 and the second portion 202, which forms the function of shielding the electric field, so that the electrostatic damage occurs on the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502, even if the electrostatic damage occurs, the required metal trace in the panel will not be affected, and thus, the yield of the product is improved.
Example II,
The array substrate according to the first embodiment is further described in detail by way of example.
The array substrate provided by the embodiment of the invention can be implemented by combining one or more first wires and one or more second wires.
In this embodiment, a first trace and two second traces on the array substrate are specifically taken as an example for description.
Referring to fig. 3, fig. 3 is a schematic plan view of a partial routing area of an array substrate according to a preferred embodiment of the invention.
An embodiment of the present invention provides an array substrate, including:
a first trace 10, a second trace 20, and a third trace 30;
specifically, the first trace 10 may be a peripheral trace or a common electrode line, the second trace 20 may be a scan line or a common electrode line, and the third trace 30 may be a scan line or a common electrode line.
The first trace 10 separates the second trace 20 into a first portion 201 and a second portion 202; the first trace 10 includes a main body 101 and a first protruding portion 102, and the first protruding portion 102 is disposed on a side of the main body 101 close to the first portion 201; the first portion 201 is disposed opposite to the first protrusion 102, and a first esd protection electrode 501 is disposed between the first portion 201 and the first protrusion 102, so that an electrostatic damage occurs on the first esd protection electrode 501.
The first trace 10 divides the third trace 30 into a fourth portion 301 and a fifth portion 302; the first trace 10 includes a main body 101 and a third protruding portion 104, and the third protruding portion 104 is disposed on a side of the main body 101 close to the fourth portion 301; the fourth portion 301 is disposed opposite to the third protrusion 104, and a third esd protection electrode 503 is disposed between the fourth portion 301 and the third protrusion 104, so that an electrostatic damage occurs on the third esd protection electrode 503.
The first trace 10 further includes a second protrusion 103 and a fourth protrusion 105, the second protrusion 103 is disposed on a side of the main body 101 close to the second portion 202, wherein the second portion 202 is disposed opposite to the second protrusion 103, and a second esd protection electrode 502 is disposed between the second portion 202 and the second protrusion 103, so that an electrostatic damage occurs on the second esd protection electrode 502.
A fourth protrusion 105 is disposed on a side of the main body 101 close to the fifth portion 302, wherein the fifth portion 302 is disposed opposite to the fourth protrusion 105, and a fourth esd protection electrode 504 is disposed between the fifth portion 302 and the fourth protrusion 105, so that an esd may occur on the fourth esd protection electrode 504.
Specifically, two protruding parts are respectively and adjacently arranged on two sides of the peripheral wiring, the peripheral wiring induces discharge through the protruding parts, and meanwhile, the distance between the peripheral wiring and the first scanning line is increased, and the distance between the peripheral wiring and the second scanning line is increased, so that the probability of electrostatic damage is reduced; two scanning lines and four juts one-to-one are provided with an electrode between every jut and two scanning lines for absorb static, prevent that the static bruise from taking place on required metal walks the line, avoided the problem of metal walking line short circuit. The electrode may be a copper electrode or another electrode.
Preferably, the shape and size of the first protrusion 102 are the same as those of the second protrusion 103, and optionally, the shape of the first protrusion 102 and the second protrusion 103 may be trapezoidal; taking the first protrusion 102 as an example, the first protrusion 102 may be trapezoidal in shape, wherein one side 121 of the trapezoid is connected to the main body 101, and the other opposite side 122 is disposed opposite to the first portion 201; the first protrusion 102 and the second protrusion 103 may also be rectangular in shape; the method of disposing the third protrusion 104 and the fourth protrusion 105 is the same as the method of disposing the first protrusion 102 and the second protrusion 103, and will not be described again.
Preferably, the first esd protection electrode 501 and the second esd protection electrode 502 have the same shape and size, specifically, the first esd protection electrode 501 and the second esd protection electrode 502 may have a rectangular shape, and taking the first esd protection electrode 501 as an example, when the first esd protection electrode 501 has a rectangular shape, two long sides of the first esd protection electrode 501 may be respectively disposed opposite to the first portion 201 and the first protrusion 102, and the first esd protection electrode 501 may absorb static electricity induced and radiated by the first protrusion 102, so as to avoid the problem of short circuit of the first portion 2011. In addition, the sizes of the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 may be defined according to the actual panel space, and it should be noted that the shapes and sizes of the third electrostatic protection electrode 503 and the fourth electrostatic protection electrode 504 are the same, for which reference is specifically made to the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502, which is not described herein again.
Preferably, a distance between the first electrostatic protection electrode 501 and the first portion 201 is equal to a distance between the first electrostatic protection electrode 501 and the first protrusion 102, for example, the first electrostatic protection electrode 501 may be disposed on a centerline of the distance between the first protrusion 102 and the first portion 201, and the first electrostatic protection electrode 501 may also be disposed at a position closer to the first protrusion 102, and in addition, the first electrostatic protection electrode 501 may also be disposed at a position closer to the first portion 201, and the disposing methods of the second electrostatic protection electrode 502, the third electrostatic protection electrode 503, and the fourth electrostatic protection electrode 504 are the same as the disposing method of the first electrostatic protection electrode 501, which is not described herein again with reference to the disposing method of the first electrostatic protection electrode 501.
It should be noted that the first protrusion 102 includes a first end 1021 and a second end 1022 which are oppositely disposed, and the first end 1021 is connected to the main body 101, wherein a distance between the first end 1021 and the second end 1022 is greater than a first preset value, and the first preset value is between 5um and 15 um; for example, preferably, the distance between the first end 1021 and the second end 1022 may be set to be greater than 10um, static electricity is induced to be emitted through the first protrusion 102, and when an electrostatic impact occurs, the short circuit or other abnormal problems of the main body 101 due to the too close distance between the first end 1021 and the second end 1022 may not occur. The method for disposing the second protrusion 103, the third protrusion 104, and the fourth protrusion 105 may be the same as the first protrusion 102, and specifically, the method for disposing the first protrusion 102 may be referred to, and will not be described again.
Preferably, the distance between the first portion 201 and the first protrusion 102 is greater than a second preset value, the second preset value is between 100 to 200um, and preferably, the second preset value may be 150um, when an electrostatic shock occurs, the first portion 201 does not cause a short circuit or other abnormal problems of the first portion 201 due to too close distance to the first protrusion 102, for example, when the peripheral trace 10 induces discharge through the first protrusion 102, the distance between the first protrusion 102 and the scan line 10 is greater than 150um, and the scan line 20 does not cause abnormal problems such as a short circuit or an open circuit of the scan line 20 due to too close distance to the first protrusion 102. Similarly, the distance between the second portion 202 and the second protrusion 103, the distance between the fourth portion 301 and the third protrusion 104, and the distance between the fifth portion 302 and the fourth protrusion 105 are the same as those mentioned in this example, and are not described again here.
The second trace 20 further includes a third portion 203, where the third portion 203 is used to connect the first portion 201 and the second portion 202, and specifically, the third portion 203 may be a cross-line structure, and is used to connect the first portion 201 and the second portion 202, for example, the first scan line includes the first portion 201, the second portion 202, and the third portion 203, and when the third portion 203 needs to connect the first portion 201 and the second portion 202, the third portion 203 may avoid the first protrusion 102 and the second protrusion 103 to connect, so that even if the first protrusion 102 and the second protrusion 103 of the peripheral trace 10 are subjected to electrostatic shock, the third portion 203 of the first scan line 20 may not be short-circuited with the peripheral 10, the first portion 201 of the first scan line 20, or the second portion 202 of the first scan line 20.
The third trace 20 further includes a sixth portion 303, the sixth portion 303 is used to connect the fourth portion 301 and the fifth portion 302, specifically, the sixth portion 303 may be a cross-line structure, and is used to connect the fourth portion 301 and the fifth portion 302, for example, the second scan line includes the fourth portion 301, the fifth portion 302 and the sixth portion 303, when the sixth portion 303 needs to connect the fourth portion 301 and the fifth portion 302, the sixth portion 303 may avoid the third protrusion 104 and the fourth protrusion 105 to connect, so that even if the third protrusion 104 and the fourth protrusion 105 of the peripheral trace 10 are subjected to electrostatic shock, the sixth portion 303 of the second scan line 30 and the fourth portion 301 of the peripheral trace 10, or the fifth portion 302 of the second scan line 30 are not shorted.
The first trace 10, the first esd protection electrode 501, the first portion 201, the second esd protection electrode 502, and the second portion 202 are located on the same layer, and the third portion 203 is located on a different layer from the first trace 10, the first esd protection electrode 501, the first portion 201, the second esd protection electrode 502, and the second portion 202. For example, the first portion 201 of the first scan line 20, the second portion 202 of the first scan line 20 and the peripheral trace 10 are disposed on the same layer, the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 are disposed on the same layer as the first portion 201 of the first scan line 20, the second portion 202 of the first scan line 20 and the peripheral trace 10, and the third portion 203 of the first scan line 20 and the peripheral trace 10, the first electrostatic protection electrode 501, the first portion 201 of the scan line, the second electrostatic protection electrode 502 and the second portion 202 of the scan line are disposed on different layers, preferably, the third portion 203 of the first scan line 20 avoids the protrusion of the peripheral trace when crossing the line, so as to avoid the problem that the peripheral trace 10 is damaged by electrostatic shock to short or open the first scan line 20.
It should be noted that the first trace 10, the third esd protection electrode 503, the fourth portion 301, the fourth esd protection electrode 504, and the fifth portion 302 are located in the same layer, and the sixth portion 303, the first trace 10, the third esd protection electrode 503, the fourth portion 301, the fourth esd protection electrode 504, and the fifth portion 302 are located in different layers.
The invention further provides a display panel including any one of the array substrates in the above embodiments, which can be seen in the foregoing embodiments and will not be described herein again.
In this embodiment, the first protrusion 102 and the second protrusion 103 are disposed on the first trace 10, which increases the distance between the first trace 10 and the second trace 20, and reduces the probability of electrostatic damage, and meanwhile, the first electrostatic protection electrode 501 is disposed between the first protrusion 102 and the first portion 201, and the second electrostatic protection electrode 502 is disposed between the second protrusion 103 and the second portion 202, which forms the function of shielding the electric field, so that the electrostatic damage occurs on the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502, and even if the electrostatic damage occurs, the metal trace required in the panel will not be affected, thereby improving the yield of the product.
The array substrate and the display panel provided by the embodiments of the present invention are described in detail above, and the principles and embodiments of the present invention are explained herein by applying specific examples, and the descriptions of the above embodiments are only used to help understanding the present invention. Meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (7)
1. An array substrate, comprising a first trace and a second trace,
the first wire comprises a main body part and a first protrusion part, and the first protrusion part is arranged on one side of the main body part close to the second wire;
the second wire is arranged opposite to the first protrusion, and a first electrostatic protection electrode is arranged between the second wire and the first protrusion;
the first wire divides the second wire into a first part and a second part, the first wire further comprises a second protrusion, the first protrusion is arranged on one side of the main body part close to the first part, the second protrusion is arranged on one side of the main body part close to the second part, the second part and the second protrusion are oppositely arranged, and a second electrostatic protection electrode is arranged between the second part and the second protrusion.
2. The array substrate of claim 1, wherein a distance between the first ESD electrode and the first portion is equal to a distance between the first ESD electrode and the first protrusion.
3. The array substrate of claim 1, wherein the first protrusion comprises a first end and a second end opposite to each other, and the first end is connected to the main body, wherein a distance between the first end and the second end is greater than a first predetermined value, and the first predetermined value is between 5 and 15 um.
4. The array substrate of claim 3, wherein a distance between the first portion and the first protrusion is greater than a second predetermined value, and the second predetermined value is between 100 and 200 μm.
5. The array substrate of any one of claims 1 to 4, wherein the second trace further comprises a third portion, the third portion is used for connecting the first portion and the second portion; the first routing line, the first electrostatic protection electrode, the first portion, the second electrostatic protection electrode and the second portion are located on the same layer, and the third portion, the first routing line, the first electrostatic protection electrode, the first portion, the second electrostatic protection electrode and the second portion are located on different layers.
6. The array substrate of claim 5, wherein the third portion is configured as a jumper structure to avoid the first protrusion and the second protrusion, so as to avoid short circuit between the third portion and the main body, the first portion, or the second portion when the first protrusion and the second protrusion are subjected to electrostatic shock.
7. A display panel comprising the array substrate according to any one of claims 1 to 6.
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| CN201810443933.6A CN108666304B (en) | 2018-05-10 | 2018-05-10 | Array substrate and display panel |
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| CN201810443933.6A CN108666304B (en) | 2018-05-10 | 2018-05-10 | Array substrate and display panel |
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| CN108666304B true CN108666304B (en) | 2020-04-10 |
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| CN109634006B (en) * | 2018-12-03 | 2021-07-23 | Tcl华星光电技术有限公司 | Manufacturing method of TFT array substrate and TFT array substrate |
| CN111656521B (en) * | 2019-01-04 | 2023-12-26 | 京东方科技集团股份有限公司 | Electrostatic discharge protection circuit, display substrate and display device |
| CN110098198B (en) * | 2019-04-25 | 2022-01-07 | 上海中航光电子有限公司 | Array substrate and display panel |
| CN113064510B (en) * | 2021-03-05 | 2022-10-04 | 武汉华星光电半导体显示技术有限公司 | Display panel |
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| CN101568950A (en) * | 2006-12-22 | 2009-10-28 | 夏普株式会社 | Active matrix substrate and display panel equipped with the same |
| CN103984430A (en) * | 2013-02-08 | 2014-08-13 | 胜华科技股份有限公司 | Touch panel with electrostatic protection |
| CN107065339A (en) * | 2016-10-27 | 2017-08-18 | 厦门天马微电子有限公司 | A kind of array base palte, display panel and display device |
| CN107731791A (en) * | 2017-11-20 | 2018-02-23 | 深圳市华星光电技术有限公司 | A kind of structure for improving cross-line area damage by static electricity and repairing yield |
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| US8493349B2 (en) * | 2009-12-10 | 2013-07-23 | Lg Display Co., Ltd. | Touch screen panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101568950A (en) * | 2006-12-22 | 2009-10-28 | 夏普株式会社 | Active matrix substrate and display panel equipped with the same |
| CN103984430A (en) * | 2013-02-08 | 2014-08-13 | 胜华科技股份有限公司 | Touch panel with electrostatic protection |
| CN107065339A (en) * | 2016-10-27 | 2017-08-18 | 厦门天马微电子有限公司 | A kind of array base palte, display panel and display device |
| CN107731791A (en) * | 2017-11-20 | 2018-02-23 | 深圳市华星光电技术有限公司 | A kind of structure for improving cross-line area damage by static electricity and repairing yield |
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