CN108630283A - Test device and method for automatically recording memory redundancy page mistake address - Google Patents
Test device and method for automatically recording memory redundancy page mistake address Download PDFInfo
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- CN108630283A CN108630283A CN201710165743.8A CN201710165743A CN108630283A CN 108630283 A CN108630283 A CN 108630283A CN 201710165743 A CN201710165743 A CN 201710165743A CN 108630283 A CN108630283 A CN 108630283A
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- memory
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- redundancy page
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
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- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a kind of test devices automatically recording memory redundancy page mistake address, control unit and memory are replaced including address encryption unit, hardware check unit, redundancy page, wherein, address encryption unit is for being encrypted test operation address；Hardware check unit carries out function check to the physical space of memory, generates check errors signal；Redundancy page replaces control unit and includes redundancy page replacement record register, and the memory bad page physical address tag that verification is malfunctioned is mistake address, and deposit redundancy page, which is replaced, records register；When memory access asks the bad page of memory, redundancy page replaces the saved wrong address of control unit automatic identification, and memory-aided redundancy page is made to replace the bad page of memory automatically, completes redundancy page and replaces.The present invention is based on safe storage, the method for automatically recording redundancy replacement page address using hardware, hardware realization is more time saving than software program scanning, has the characteristics that efficient, applied widely.
Description
Technical field
The present invention relates to semiconductor memory technologies fields, more particularly to automatically record memory redundancy page mistake address
Test device and method.
Background technology
Currently, microelectric technique development is in the ascendant, especially memory test technology is introduced into printed circuit board, communication
The integrated circuit fields such as product and system on chip are simultaneously used widely, and in memory area, for in-memory data
Safety and reliability, it usually needs by memory test, memory is repaired.Existing memory test side
Method is operated generally by means of automatic test equipment (ATE, Automatic Test Equipment), by surveying automatically
The software program in equipment to be tried, is directed to each memory to be measured successively, the page address being successively read in memory is detected,
And judge to read data correctness according to detection page address data, if mistake, a redundancy is written into fault address
Page is replaced in record register, and the address of register storage is the physical address of memory.In this way, having read all deposit
After reservoir, ATE will be according to the wrong address recorded in register, to verifying to the memory physical page face for mistake occur（With
Give a definition for " bad page "）It is repaired one by one.
But for safe storage, the verification address that software program is sent by external interface to memory,
After memory inside is encrypted, physical storage physical address can be just converted to, and after detecting the error of verification address,
Software program is also needed to according to the actual Encryption Algorithm of memory inside, place is encrypted to the operation address that external interface issues
Reason, in this operating process, needs first to be converted to actual storage physical address, is then saved in redundancy page again and replaces record
In register.For above-mentioned detection method firstly the need of to actual Encryption Algorithm inside tester's open memory, this is a kind of
Unsafe way；On the other hand, the Encryption Algorithm of practical safe storage includes often certain randomness, by soft
Part can not fully achieve internal Encryption Algorithm.Therefore, the existing memory device detecting method carried out by software program, both consumed
When, and it is dangerous, it is easy error, also takes up memory inside space.
As shown in Figure 1, the work flow diagram replaced for existing memory redundancy page.In the workflow, first into
Row verification operation, rdn0, rdn1, rdn2, rdn3, rdn4 are the redundancy pages of memory, the sequencing from rdn0 to rdn4 according to
Secondary arrangement, rdn（n）For rdn0, rdn1, rdn2, rdn3, rdn4, n is corresponding with the rdn that it is determined.Memory verification operation
After beginning, memory verification operation is executed；Judge whether verification to the bad page for mistake occur, if not finding mistake, terminates
Operation.If verification is to the bad page for mistake occur, firstly, it is necessary to judge whether rdn0 pages used；It is soft if rdn0 is not used by
The bad page address of the appearance mistake is written corresponding redundancy page and replaced in record register by part program, then end operation；If
Rdn0 pages has been used, then needs to judge whether rdn1 pages used；If rdn1 is not used by, is there is mistake by software program in this
Bad page address corresponding redundancy page be written replace in record register, then end operation；And so on, by rdn2, rdn3
Verification operation is carried out with rdn4, finally, if rdn4 has been used, end operation.
From the point of view of the verification operation process of the memory described in above-mentioned Fig. 1, the test job principle of existing memory is：Needle
Occur the bad page of mistake to memory, in software program detection process, finds the bad page address of mistake, and by the bad page address
It is written in corresponding register.But if it is applied to safe deposit from can be seen that the method for testing memory described in above-mentioned Fig. 1
Reservoir, the software program in safe storage can not convert out memory inside actual storage physical address number after encryption
According to then cannot achieve the record of replacement redundancy page.Therefore, currently, carrying out the memory of test operation using software program, because
Time-consuming for software program detection process, reduces research and development testing efficiency；Moreover, the security breaches and appearance of the method for testing memory
The drawbacks of error-prone problem is existing memory test.
Invention content
In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to be based on safe storage, certainly using hardware
The device and method of dynamic record replacement redundancy page address, have the characteristics that efficient, applied widely.
In order to reach above-mentioned technical purpose, the technical solution adopted in the present invention is：
A kind of test device automatically recording memory redundancy page mistake address, including address encryption unit, hardware check unit,
Redundancy page replaces control unit and memory, wherein address encryption unit is sequentially connected hardware check unit and redundancy page is replaced
Control unit is encrypted for the test operation address in being instructed to test；
Hardware check unit connects redundancy page and replaces control unit, for receiving encryption address, and to the physical space of memory
Function check is carried out, when the bad page of verification to memory, memory verification error, hardware check unit generates check errors letter
Number；
Redundancy page replaces control unit and includes redundancy page replacement record register, the verification for receiving the transmission of hardware check unit
Error signal, and be wrong address by the memory bad page physical address tag of verification error, and automatically record the mistake address
Afterwards, deposit redundancy page is replaced in record register；
Memory and hardware check unit are connected with each other, when memory normal use, when memory bad page is accessed, and redundancy page
It replaces control unit automatic identification redundancy page and replaces the wrong address preserved in record register, and use in memory automatically
Redundancy page replaces the bad page of memory, completes redundancy page and replaces.
A kind of test method automatically recording memory redundancy page mistake address, the test method is in address encryption list
It is executed on the memorizer test device that member, hardware check unit, redundancy page replace control unit and memory forms, specific steps
It is as follows：
1）After memory verification operation starts, external interface sends the test comprising test operation address and instructs, address encryption list
Member receives the test comprising test operation address and instructs；
2）Test operation address during address encryption unit instructs test is encrypted, and generates encryption address, then will
Encryption address is sent to hardware check unit；
3）Hardware check unit receives encryption address, and carries out function check to the physical space of memory；
4）When the bad page of verification to memory, memory verification error, hardware check unit generates check errors signal；
5）Redundancy page replaces control unit and receives the check errors signal that hardware check unit is sent, and is believed according to check errors
Number, the memory bad page physical address tag by verification error is wrong address, after automatically recording the mistake address, is stored in redundancy
Page is replaced in record register；
6）When memory normal use, when the bad page of memory is accessed, redundancy page replaces control unit automatic identification redundancy page
The wrong address preserved in record register is replaced, and memory-aided redundancy page is made to replace the bad page of memory automatically, is completed
Redundancy page is replaced.
The present invention replaces control unit as a result of address above mentioned encryption unit, hardware check unit, redundancy page and posts
The memorizer test device and test method of storage composition, therefore, the advantageous effect obtained is, in memory test,
External interface is only needed to issue test instruction, other everythings are all completed by memory inside hardware logic, and test is improved
Efficiency；Hardware automatically records the front and back address of encryption, is conducive to board test and uses check errors address；Further, it is possible to avoid manually
The operating mistake occurred during software screening method, simulation time is short, substantially increases research and development and testing efficiency.Meanwhile for
For safe storage, does not need tester and understand memory inside Encryption Algorithm, improve safety and measurability.The present invention
Based on safe storage, the method for automatically recording redundancy replacement page address using hardware, hardware realization is scanned than software program
It is time saving, have the characteristics that efficient, applied widely.
The present invention will be further described with reference to the accompanying drawings and detailed description.
Description of the drawings
Fig. 1 is existing memory redundancy page replacement method flow chart.
Fig. 2 be the present invention be embodied automatically record memory redundancy page mistake address test device structure chart.
Fig. 3 is the test method flow chart for automatically recording memory redundancy page mistake address that the present invention is embodied.
Specific implementation mode
It is shown in Figure 2, automatically record memory redundancy page mistake address for the specific implementation of the invention being embodied
Test device structure chart.The test device includes address encryption unit, hardware check unit, redundancy page replacement control unit and deposits
Reservoir, wherein address encryption unit is sequentially connected hardware check unit and redundancy page and replaces control unit, memory respectively with firmly
Part verification unit, redundancy page are replaced control unit and are connected with each other；After memory verification operation starts, external interface sends test and refers to
It enables, test operation address is included in test instruction, test operation address generates encryption after address encryption unit encryption
Address Addr_enc, hardware check unit receives encryption address Addr_enc, and carries out function school to the physical space of memory
It tests, if it find that there is the memory physical page face of mistake, i.e. the bad page of memory, hardware check unit can generate check errors
Signal verify_err, redundancy page replace control unit and receive the check errors signal verify_ that hardware check unit is sent
Err, and be wrong address by the memory bad page physical address tag of check errors, and remember automatically according to check errors signal
After recording the mistake address, deposit redundancy page is replaced in record register.
The test method shown in Figure 3, being embodied for the present invention for automatically recording memory redundancy page mistake address
Flow chart.When memory normal use, after memory verification operation starts, memory verification operation is executed.Judge whether to verify
To the locked memory pages for mistake occur, the i.e. bad page of memory, if not finding bad page, memory end operation.If school
Bad page is tested, it is necessary first to judge whether rdn0 pages used.If rdn0 is not used by, it is single that control is replaced by redundancy page
Member automatically records wrong address and is replaced in record register to the corresponding redundancy pages of rdn0, then end operation；If rdn0 pages
It is used, then needs to judge whether rdn1 pages used.If rdn1 is not used by, it is automatic that control unit is replaced by redundancy page
Misregistration address is replaced to the corresponding redundancy pages of rdn1 in record register, then end operation；If rdn1 has been used,
It needs to judge whether rdn2 pages used.If rdn2 is not used by, control unit is replaced by redundancy page and automatically records mistake
Address is replaced to the corresponding redundancy pages of rdn2 in record register, then end operation；If rdn2 has been used, need to judge
Whether rdn3 pages used.If rdn3 is not used by, wrong address is automatically recorded by redundancy page replacement control unit and is arrived
The corresponding redundancy pages of rdn3 are replaced in record register, then end operation；If rdn3 has been used, need to judge that rdn4 is
It is no to be used.If rdn4 pages is not used by, control unit is replaced by redundancy page and automatically records wrong address to rdn3 correspondences
Redundancy page replace in record register, then end operation；If rdn4 has been used, false alarm, end operation are carried out.
The present invention is not limited to embodiment discussed above, the above description to specific implementation mode is intended to retouch
State and illustrate technical solution of the present invention.The obvious transformation or replacement enlightened based on the present invention should also be as being considered
Fall into protection scope of the present invention；Above specific implementation mode is used for disclosing the best implementation of the present invention, so that this
The those of ordinary skill in field can apply numerous embodiments of the invention and a variety of alternatives to reach the present invention's
Purpose.
Claims (2)
1. a kind of test device automatically recording memory redundancy page mistake address, which is characterized in that the test device includes ground
Location encryption unit, hardware check unit, redundancy page replace control unit and memory, wherein
Address encryption unit is sequentially connected hardware check unit and redundancy page replaces control unit, for the survey in being instructed to test
Examination operation address is encrypted；
Hardware check unit connects redundancy page and replaces control unit, for receiving encryption address, and to the physical space of memory
Function check is carried out, when the bad page of verification to memory, memory verification error, hardware check unit generates check errors letter
Number；
Redundancy page replaces control unit and includes redundancy page replacement record register, the verification for receiving the transmission of hardware check unit
Error signal, and the memory physical addresses of verification error are labeled as wrong address, after automatically recording the mistake address, deposit
Redundancy page is replaced in record register；
Memory and hardware check unit are connected with each other, when memory normal use, when the bad page of memory is accessed, and redundancy
Page replaces control unit automatic identification redundancy page and replaces the wrong address preserved in record register, and uses in memory automatically
Redundancy page replace memory bad page, complete redundancy page replace.
2. a kind of test method automatically recording memory redundancy page mistake address, which is characterized in that the test method is on ground
It is executed on the memorizer test device that location encryption unit, hardware check unit, redundancy page replace control unit and memory forms,
It is as follows：
1）After memory verification operation starts, external interface sends the test comprising test operation address and instructs, address encryption list
Member receives the test comprising test operation address and instructs；
2）Test operation address during address encryption unit instructs test is encrypted, and generates encryption address, then will
Encryption address is sent to hardware check unit；
3）Hardware check unit receives encryption address, and carries out function check to the physical space of memory；
4）When the bad page of verification to memory, memory verification error, hardware check unit generates check errors signal；
5）Redundancy page replaces control unit and receives the check errors signal that hardware check unit is sent, and is believed according to check errors
Number, the memory physical addresses of verification error are labeled as wrong address, after automatically recording the mistake address, deposit redundancy page replaces
It changes in record register；
6）When memory normal use, when the bad page of memory is accessed, redundancy page replaces control unit automatic identification redundancy page
The wrong address preserved in record register is replaced, and the redundancy page in memory is used to replace existing bad page automatically, is completed
Redundancy page is replaced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710165743.8A CN108630283A (en) | 2017-03-20 | 2017-03-20 | Test device and method for automatically recording memory redundancy page mistake address |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710165743.8A CN108630283A (en) | 2017-03-20 | 2017-03-20 | Test device and method for automatically recording memory redundancy page mistake address |
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| Publication Number | Publication Date |
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| CN108630283A true CN108630283A (en) | 2018-10-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710165743.8A Pending CN108630283A (en) | 2017-03-20 | 2017-03-20 | Test device and method for automatically recording memory redundancy page mistake address |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110471818A (en) * | 2019-07-15 | 2019-11-19 | 深圳市德名利电子有限公司 | The labeling method and device and equipment of a kind of pair of flash memory error physical address |
-
2017
- 2017-03-20 CN CN201710165743.8A patent/CN108630283A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110471818A (en) * | 2019-07-15 | 2019-11-19 | 深圳市德名利电子有限公司 | The labeling method and device and equipment of a kind of pair of flash memory error physical address |
| CN110471818B (en) * | 2019-07-15 | 2023-11-17 | 深圳市德明利技术股份有限公司 | Method, device and equipment for marking error physical address of flash memory |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 100083 Beijing City, Haidian District Wudaokou Wangzhuang Road No. 1 Tongfang Technology Plaza D floor 18 West Applicant after: ZIGUANG TONGXIN MICROELECTRONICS Co.,Ltd. Address before: 100083 Beijing City, Haidian District Wudaokou Wangzhuang Road No. 1 Tongfang Technology Plaza D floor 18 West Applicant before: BEIJING TONGFANG MICROELECTRONICS Co.,Ltd. |
|
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20181009 |