CN108563279A - Filter circuit of pressure-stabilizing and signal deteching circuit - Google Patents
Filter circuit of pressure-stabilizing and signal deteching circuit Download PDFInfo
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- CN108563279A CN108563279A CN201810759207.5A CN201810759207A CN108563279A CN 108563279 A CN108563279 A CN 108563279A CN 201810759207 A CN201810759207 A CN 201810759207A CN 108563279 A CN108563279 A CN 108563279A
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
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Abstract
One end of filter circuit of pressure-stabilizing and signal deteching circuit provided by the embodiments of the present application, the first filter capacitor is connect through the first RC network, the second RC network with one end of the second filter capacitor successively；One end of first divider resistance is connected between the first RC network and the second RC network, and the other end of the first divider resistance is connect with power supply；One end of second divider resistance is connected between the first RC network and the second RC network, the other end ground connection of the second divider resistance；The other end of first filter capacitor is connect through third RC network, the 4th RC network with the other end of the second filter capacitor successively；One end of third divider resistance is connected between third RC network and the 4th RC network, and the other end of third divider resistance is connect with power supply；One end of 4th divider resistance is connected between third RC network and the 4th RC network, the other end ground connection of the 4th divider resistance.
Description
Technical field
This application involves signal detection fields, in particular to a kind of filter circuit of pressure-stabilizing and signal deteching circuit.
Background technology
In carrying out signal detection process, in order to make electronic device (such as signal amplifier, signal comparator, operation amplifier
Device etc.) it works normally, the bias voltage of the input signal of electronic device must be maintained in certain range.If due to the external world
Interference causes bias voltage to drift about, excessively high so as to cause bias voltage, electronic device may be caused to fail.
In external interference, relatively conventional is common mode transient affair, common mode transient affair refer to transmitter circuit with
Acceptor circuit is connected to the course of work, and the voltage instantaneous of transmitter circuit is more than or less than the voltage of acceptor circuit.Such as
Common gate drivers in electric motor driver, inverter, when the high-voltage power pipe in system carry out the opening of fast speed/
Guan Shi, there is the voltages of fast transient between the transmitting module and receiving module of gate drivers.In particular with opening at a high speed
The application of device is closed, the transition speed of voltage is getting faster, and common mode transient affair also gets over the influence for transmitting signal bias voltage
Come more serious.
Apply for content
In view of this, the embodiment of the present application provides a kind of filter circuit of pressure-stabilizing and signal deteching circuit.
In a first aspect, the embodiment of the present application provides a kind of filter circuit of pressure-stabilizing, the circuit includes：First RC network,
Second RC network, third RC network, the 4th RC network, the first divider resistance, the second divider resistance, third divider resistance, the 4th
Divider resistance, the first filter capacitor and the second filter capacitor；One end of first filter capacitor is successively through the first RC
Network, second RC network are connect with one end of second filter capacitor；One end of first divider resistance is connected to
Between first RC network and second RC network, the other end of first divider resistance is connect with power supply；Described
One end of two divider resistances is connected between first RC network and second RC network, second divider resistance it is another
One end is grounded；The other end of first filter capacitor is filtered through the third RC network, the 4th RC network with described second successively
The other end of wave capacitance connects；One end of the third divider resistance is connected to the third RC network and the 4th RC network
Between, the other end of the third divider resistance is connect with the power supply；One end of 4th divider resistance is connected to described
Between third RC network and the 4th RC network, the other end of the 4th divider resistance is grounded.
Second aspect, the embodiment of the present application provide a kind of signal deteching circuit, including transmitter circuit, signal processing electricity
Road and above-mentioned filter circuit of pressure-stabilizing, the transmitter circuit is through the first high_voltage isolation capacitance and the second high_voltage isolation capacitance
It is connect with the filter circuit of pressure-stabilizing, the filter circuit of pressure-stabilizing is connect with the signal processing circuit.
Filter circuit of pressure-stabilizing and signal deteching circuit provided by the embodiments of the present application have the beneficial effect that：
Filter circuit of pressure-stabilizing provided by the embodiments of the present application, the circuit include：First RC network, the second RC network,
Three RC networks, the 4th RC network, the first divider resistance, the second divider resistance, third divider resistance, the 4th divider resistance, first
Filter capacitor and the second filter capacitor.One end of first filter capacitor is successively through first RC network, described second
RC network is connect with one end of second filter capacitor；One end of first divider resistance is connected to first RC network
Between second RC network, the other end of first divider resistance is connect with power supply；The one of second divider resistance
End is connected between first RC network and second RC network, the other end ground connection of second divider resistance；It is described
The other end of the first filter capacitor other end through the third RC network, the 4th RC network and second filter capacitor successively
Connection；One end of the third divider resistance is connected between the third RC network and the 4th RC network, the third
The other end of divider resistance is connect with the power supply；One end of 4th divider resistance is connected to the third RC network and institute
Between stating the 4th RC network, the other end of the 4th divider resistance is grounded.First filter capacitor and the second filter capacitor can
When common mode transient affair occurs, to constrain the drift of differential signal bias voltage, while can also play will be in differential signal
Including the effect that filters out of low-frequency noise.
Above objects, features, and advantages to enable the embodiment of the present application to be realized are clearer and more comprehensible, it is cited below particularly compared with
Good embodiment, and coordinate appended attached drawing, it is described in detail below.
Description of the drawings
Illustrate the technical solutions in the embodiments of the present application or in the prior art in order to clearer, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is the circuit diagram of signal deteching circuit in the prior art；
Fig. 2 shows the circuit diagrams of filter circuit of pressure-stabilizing provided by the embodiments of the present application；
Fig. 3 shows a kind of circuit diagram of specific implementation mode of filter circuit of pressure-stabilizing provided by the embodiments of the present application；
Fig. 4 shows the circuit diagram of another specific implementation mode of filter circuit of pressure-stabilizing provided by the embodiments of the present application；
Fig. 5 is the effect comparison schematic diagram of filter circuit of pressure-stabilizing provided by the present application and circuit in the prior art；
Fig. 6 a are that the bias voltage of filter circuit of pressure-stabilizing provided by the present application and circuit in the prior art changes over time
Schematic diagram；
Fig. 6 b are the schematic diagrames of the variation waveform of common-mode voltage；
Fig. 7 is the circuit diagram of signal deteching circuit provided by the embodiments of the present application；
Fig. 8 is the module map of signal deteching circuit provided by the embodiments of the present application.
Specific implementation mode
Fig. 1 is referred to, Fig. 1 shows signal deteching circuit in the prior art, the first high_voltage isolation capacitance Ca1 and second
High_voltage isolation capacitance Ca2 is the capacitance between transmitter circuit TX and acceptor circuit RX, during they are with acceptor circuit RX
It detects network to be connected, inputs of the differential voltage signal Va1 and Va2 as signal processing circuit Q after detecting network filtering.
Signal processing circuit Q typically comparator or amplifier.
It includes reference voltage Vref 1, and the capacitance between reference voltage and differential voltage signal to detect network
(Cb1/Cb2) and resistance (Rb1/Rb2).Transmitter circuit TX Vt1 output signal by Ca1 and " Cb1 is in parallel with Rb1's "
Partial pressure forms signal Va1；Output signals of the transmitter circuit TX on Vt2 is divided by Ca2 and " Cb2 is in parallel with Rb2's ",
Form signal Va2.Since Va1 and Va2 share the same reference voltage Vref 1, so the differential signal on Vt1 and Vt2 just passes
The defeated differential signal that at Va1 and Va2, formation is isolated by Ca1 and Ca2.
When between transmitter circuit TX and acceptor circuit RX there are when the situation of voltage transient, next with transmitter electricity
Road TX for the voltage rapid increase of acceptor circuit RX relative to illustrating：By the capacitance of capacitance Ca1 and capacitance Ca2
Capacitance is regarded as equal, that is, is Ca.If the zooming rate of voltage is β kV/us (reaching as high as hundreds of kV/us).It is logical
Normal Ca1 and Ca2 is much smaller than Cb1 and Cb2, so common-mode voltage is mainly undertaken by Ca1 and Ca2；So flow through being total to for Ca1 and Ca2
The size of mould electric current Ia1 and Ia2 is:
Ia1=Ia2≈βCa
Since signal processing circuit Q usually has prodigious input impedance, so the exhausted big portion of common mode current Ia1 and Ia2
Branch flows into reference voltage Vref 1 by Cb1/Cb2 and Rb1/Rb2.In order to control quiescent current, reference voltage Vref 1 is made
The resistance value of divider resistance Rf1 and Rf2 are very big, it is possible to be approximately considered whole common mode currents and flow into voltage stabilizing electricity
Hold Cf.For the voltage transient event that a duration is Δ t, the variation delta Vref1 that can calculate Vref1 is：
Since the on-chip capacitance of integrated circuit is limited, so Cf smaller (being, for example, less than hundreds of pF).Transmitter and receiver
Between total capacitance can also be close to or up to pF magnitudes.If the voltage transient event that a β is about 100kV/us maintains
10ns, then Δ Vref1 can reach several volts.
On the other hand, a part of common mode current Ia1 and Ia2 can respectively flow through resistance Rb1 and Rb2, respectively in resistance Rb1
Pressure drop is generated with Rb2 so that Va1 and Va2 generates an additional increment relative to Vref1.
Since the supply voltage of signal processing circuit Q is usually in 1V to 5V, by above-mentioned analysis, as signal processing circuit
The voltage of the Va1 and Va2 of Q inputs are easy to the input voltage working range beyond Q, then Q cannot again transmit Va1 and Va2
Differential signal handled.That is during voltage transient, acceptor circuit just no longer works normally.
In order to solve the above technical problems, the embodiment of the present application provides following filter circuit of pressure-stabilizing and signal detection electricity
Road, below in conjunction with attached drawing, in the embodiment of the present application filter circuit of pressure-stabilizing and signal deteching circuit describe in detail.
Embodiment
Fig. 2 specifically is referred to, Fig. 2 shows filter circuit of pressure-stabilizing provided by the embodiments of the present application, the circuit includes：The
One RC network U1, the second RC network U2, third RC network U3, the 4th RC network U4, the first divider resistance Rf1, the second partial pressure electricity
Resistance Rf2, third divider resistance Rg1, the 4th divider resistance Rg2, the first filter capacitor Cd1 and the second filter capacitor Cd2, first
Electric capacity of voltage regulation Cf, the second electric capacity of voltage regulation Cg.
One end of the first filter capacitor Cd1 is successively through the first RC network U1, the second RC network U2 and institute
State one end connection of the second filter capacitor Cd2；One end of the first divider resistance Rf1 be connected to the first RC network U1 with
Between the second RC network U2 (i.e. the first reference voltage point), the other end and the power supply Vdd of the first divider resistance Rf1 connect
It connects；One end of the second divider resistance Rf2 is connected between the first RC network U1 and the second RC network U2 (i.e.
Reference voltage point), the other end ground connection of the second divider resistance Rf2.Preferably, the ratio of the resistance value of Rf1 and Rf2 exists
Between 0.8 to 1.2.
The other end of the first filter capacitor Cd1 successively through the third RC network U3, the 4th RC network U4 with it is described
The other end of second filter capacitor Cd2 connects；One end of the third divider resistance Rg1 be connected to the third RC network U3 with
Between the 4th RC network U4 (i.e. the second reference voltage point), the other end and the power supply of the third divider resistance Rg1
Vdd connections；One end of the 4th divider resistance Rg2 is connected between the third RC network U3 and the 4th RC network U4
(i.e. the second reference voltage point), the other end ground connection of the 4th divider resistance Rg2.Preferably, the resistance value of Rg1 and Rg2
Ratio is between 0.8 to 1.2.
First filter capacitor Cd1 and the second filter capacitor Cd2 can constrain difference letter when common mode transient affair occurs
The drift of number bias voltage, while the low-frequency noise that can also play the role of including in differential signal filters out.
Fig. 3 is referred to, Fig. 3 shows a kind of specific implementation mode of filter circuit of pressure-stabilizing provided by the embodiments of the present application,
One end of the first electric capacity of voltage regulation Cf is connected between the first divider resistance Rf1 and the second divider resistance Rf2 (the i.e. first reference in figure
Voltage), another termination AC deposition (i.e. or supply voltage) of the first electric capacity of voltage regulation Cf.One end of the second electric capacity of voltage regulation Cg
It is connected between the third divider resistance Rg1 and the 4th divider resistance Rg2 (i.e. the second reference voltage), described second is steady
Another termination AC deposition (i.e. or supply voltage) of voltage capacitance Cg.Professional and technical personnel should be appreciated that Cf can also connect
It is connected between the first reference voltage point and power supply Vdd；Or a part of Cf is connected between the first reference point and ground, it is remaining
A part is connected between the first reference point and power supply Vdd.That is Cf refers to that (they are all by the first reference point and ground and power supply Vdd
Equivalent AC deposition) regulated power supply summation.Similar, Cg refers to the second reference point and ground and the regulated power supply of power supply Vdd
Summation.Specific allocation proportions of the Cf and Cg between ground and power supply Vdd should not be construed as limiting the invention.
The first RC network U1 includes the first RC capacitors Cb1 and the first RC resistor Rb1, the first RC capacitances
Device Cb1 is in parallel with the first RC resistors Rb1；After the first RC capacitors Cb1 is in parallel with the first RC resistors Rb1
One end connect with one end of the first filter capacitor Cd1, the other end and the second RC network U2 far from described second
One end (i.e. the first reference voltage point) of filter capacitor Cd2 connects.
The second RC network U2 includes the 2nd RC capacitors Cb2 and the 2nd RC resistor Rb2, the 2nd RC capacitances
Device Cb2 is in parallel with the 2nd RC resistors Rb2；After the 2nd RC capacitors Cb2 is in parallel with the 2nd RC resistors Rb2
One end connect with one end of the second filter capacitor Cd2, the other end and the first RC network U1 far from described first
One end (i.e. the first reference voltage point) of filter capacitor Cd1 connects.
First RC network U1 and the second RC network U2 can be specifically symmetrical, the first RC capacitors Cb1 and the 2nd RC electricity
The capacitance of container Cb2 is equal, and the first RC resistors Rb1 is equal with the resistance value of the 2nd RC resistors Rb2.First RC network U1
The parasitic capacitance of resistance can be considered as and resistance only comprising resistance and not comprising capacitance in parallel therewith with the second RC network U2
Capacitance in parallel；The ohmic leakage of capacitance can also be considered as capacitance parallel connection only comprising capacitance and not comprising resistance in parallel therewith
Resistance.The concrete composition of first RC network U1 and the second RC network U2 are not construed as limiting the invention.
The third RC network U3 includes the 3rd RC capacitors Ce1 and the 3rd RC resistor Re1, the 3rd RC capacitances
Device Ce1 is in parallel with the 3rd RC resistors Re1；After the 3rd RC capacitors Ce1 is in parallel with the 3rd RC resistors Re1
One end far from the first RC network U1 of one end and the first filter capacitor Cd1 connect, the other end and the described 4th
One end (i.e. the second reference voltage point) far from the second filter capacitor Cd2 of RC network U4 connects.
The 4th RC network U4 includes the 4th RC capacitors Ce2 and the 4th RC resistor Re2, the 4th RC capacitances
Device Ce2 is in parallel with the 4th RC resistors Re2；After the 4th RC capacitors Ce2 is in parallel with the 4th RC resistors Re2
One end far from the second RC network U2 of one end and the second filter capacitor Cd2 connect, the other end and the third
One end (i.e. the second reference voltage point) far from the first filter capacitor Cd1 of RC network U3 connects.
Third RC network U3 and the 4th RC network U4 can be specifically symmetrical.3rd RC capacitors Ce1 and the 4th RC electricity
The capacitance of container Ce2 is equal, and the 3rd RC resistors Re1 is equal with the resistance value of the 4th RC resistors Re2, third RC network U3
The parasitic capacitance of resistance can be considered as and resistance only comprising resistance and not comprising capacitance in parallel therewith with the 4th RC network U4
Capacitance in parallel；The ohmic leakage of capacitance can also be considered as capacitance parallel connection only comprising capacitance and not comprising resistance in parallel therewith
Resistance.The concrete composition of third RC network U3 and the 4th RC network U4 are not construed as limiting the invention.
First reference voltage Vref 1 can by the first divider resistance Rf1, the second divider resistance Rf2, dividing point with ground and
The sum total Cf compositions of electric capacity of voltage regulation between power supply Vdd.
Second reference voltage Vref 2 can by third divider resistance Rg1, the 4th divider resistance Rg2, dividing point with ground and
The summation Cg compositions of electric capacity of voltage regulation between power supply Vdd.
The capacitance of the first filter capacitor Cd1 is equal with the capacitance of the second filter capacitor Cd2, and is less than institute
State 1/10th of the sum of the capacitance of the first electric capacity of voltage regulation Cf and the capacitance of the second electric capacity of voltage regulation Cg.First filtered electrical
The breakdown voltage for holding Cd1 and the second filter capacitor Cd2 is usually less than 2000V, and specifically, the breakdown voltage of filter capacitor can be with
Less than 1000V.
The operation principle of filter circuit of pressure-stabilizing provided by the embodiments of the present application is as follows：
Vref1 can drift about in voltage transient in the prior art, specifically with transmitter circuit TX relative to reception
The voltage of device circuit RX is by taking constant rate of speed rapid increase as an example, common mode current generates on Rb1 and Rb2 in the process pressure drop
It is constant that can be approximately considered, so the change rate of voltage can be write as on Va1, Va2 node：
Voltage due to Va1 and Va2 is changing, thus also have common mode displacement electric current flow through the first filter capacitor Cd1 and
Second filter capacitor Cd2 (since the capacitance of the two is equal, it is Cd to take capacitance herein), this common mode current Id1 and Id2 can
It is as follows to calculate：
In the dividing point of the second reference voltage Vref 2, Id1 and Id2 can largely flow into the of the second reference voltage Vref 2
Two electric capacity of voltage regulation Cg, so the drift value Δ Vref2 of the second reference voltage Vref 2 can be estimated as follows：
That is the offset of Vref2 voltages is (2Cd/Cg) such a ratio of Vref1 voltage drift amounts, such as
Fruit Cd (capacitance of Cd1 or Cd2) is more much smaller than Cg, then Vref2 just stablizes much than Vref1.
On the other hand, in integrated circuits, the limited area of chip, so the total voltage stabilizing electricity that can be placed on chip
Have limit.Two independent reference voltage (i.e. the first reference voltage Vref 1 and the second reference voltages have been used in the present invention
Vref2), it is necessary to two electric capacity of voltage regulation (i.e. the first electric capacity of voltage regulation Cf and the second electric capacity of voltage regulation Cg).
It will demonstrate that below, using the solution of the present invention, even if each electric capacity of voltage regulation is than the single electricity that the prior art uses
Holding (referring to Fig. 1) will be small, but Vref2 is still more steady than using the prior art of more bulky capacitor but only single reference voltage
It is fixed.
Assuming that the area that ic core on piece can be used for placing capacitance is S, the capacitance of the unit area of integrated capacitance
Density is Cox.Using the prior art, the voltage drift of Vref1 is：
In the present invention, the shared area S for placing capacitance of the electric capacity of voltage regulation on Vref1 and Vref2, so：
Cf+Cg=SCox
According to average inequality, when Cf=Cg, Cf·CgThe drift of maximum, i.e. Vref2 is minimum：
So in the present invention, the voltage drift on Vref2 is：
As long as so Cd two orders of magnitude smaller than the summation of electric capacity of voltage regulation, Δ Vref2Δ V can be significantly smaller thanref1.Example
Such as, work as SCoxWhen=200pF, if using the prior art, before be computed Δ Vref1 and can reach several volts.And this
In invention, the capacitor averaging of 200pF is distributed into Cf and Cg (each 100pF), then it is 2pF to take Cd, can calculate Δ Vref2
Only hundreds of millivolts.Therefore, Cd needs to be less than the capacitance for the electric capacity of voltage regulation that the first reference voltage and the second reference voltage include
The 10% of summation, i.e. (Cf+Cg)/10.Specifically, Cd can be the capacitance for the electric capacity of voltage regulation that the first and second reference voltages include
It is worth the 0.2%-5% of summation.Preferably, the ratio of the capacitance of Cf and Cg is between 0.2 to 5.0.
First reference voltage and the second reference voltage shown in Fig. 3 be by divider resistance and dividing point with ground or
Electric capacity of voltage regulation between dividing point and power supply Vdd voltage is realized, it should be understood that reference voltage can also be real by other means
Existing, equivalent input impedance can indicate that in general, the DC impedance of Zf and Zg are all larger, to limit with Zf and Zg
The quiescent current on reference voltage flow direction processed ground or power supply Vdd voltage, refers to Fig. 4.
The net that first filter capacitor Cd1, the second filter capacitor Cd2 are constituted with third RC network U3 and the 4th RC network U4
Network has the function of high-pass filter, can filter out the low-frequency noise at Va1 and Va2.
Fig. 5 is referred to, Fig. 5 shows filter circuit of pressure-stabilizing provided by the present application and the contrast effect figure of the prior art, folding
Line 401 is drift (the Δ V of reference voltage when common mode transient affair occurs under the prior artref1).Broken line 402 is to work as Cd=0.01
×S·CoxWhen, drift (the Δ V of corresponding second reference voltage of filter circuit of pressure-stabilizing provided by the present applicationref2), compared to existing
Technology, the present invention reduces the reference voltage drift before data processor more than 10 times, but required electric capacity of voltage regulation amount
It need not increase.
Fig. 6 a and Fig. 6 b are referred to, are the voltage simulation results of differential signal detection circuit input terminal, for convenience of description, only
Show input voltage waveform when no data transmission, i.e., (data-signal of transmission is to be superimposed upon to the bias voltage of differential signal
Small-pulse effect in the offset signal).Fig. 6 b are referred to, 510 be the waveform of common-mode voltage, i.e., transmitter circuit is relative to receiver
The current potential (VGND1-VGND2) of circuit.511 it is corresponding be transmitter current potential relative to the raised common mode transient state thing of receiver current potential
Part, 512 it is corresponding be common mode transient affair that transmitter current potential is reduced relative to receiver current potential.
Refer to Fig. 6 a, 501 when being using the prior art, differential signal detection circuit input terminal (in Fig. 1 Va1 or
Va2 voltage oscillogram)；502 be using after the method for the present invention, signal processing circuit input terminal (Vd1 or Vd2 in Fig. 2)
Oscillogram.Horizontal line 503 is the dynamic range headroom of signal processing circuit in figure, you can the highest normally to handle signal biases
Voltage.In the prior art when input signal is located at the region corresponding to 504, have exceeded on the voltage of signal processing circuit
Limit, at the moment, the signal of transmission cannot normally be handled by follow-up differential signal detection circuit.And the present invention due to controlling well
The drift of the second reference voltage Vref 2 has been made, so during voltage transient, the input voltage 505 of signal processing circuit
The upper voltage limit for all believing detection circuit without departing from difference at any time, ensure that the normal transmission of signal.
The above analysis is based on the case where transmitter circuit current potential instantaneously rises relative to acceptor circuit current potential.Opposite
Situation can also do similar analysis, and details are not described herein.
It should be noted that Fig. 2 is referred to, the letter exported after segmentation biasing filter circuit of pressure-stabilizing of the present invention
Number Vd1 and Vd2 is directly accessed differential signal detection circuit Q.In practical application, other filters can be increased after Vd1 and Vd2
Wave circuit, then be connected with signal processing circuit Q.
Fig. 3 is referred to, the embodiment of the present application also provides a kind of signal deteching circuits, including transmitter circuit TX, signal
Processing circuit Q and such as above-mentioned filter circuit of pressure-stabilizing, the transmitter circuit TX are through the first high_voltage isolation capacitance Ca1 and the
Two high_voltage isolation capacitance Ca2 are connect with the filter circuit of pressure-stabilizing, and the filter circuit of pressure-stabilizing connects with the signal processing circuit
It connects.
One end of first high_voltage isolation capacitance Ca1 is connected with transmitter TX and the other end is connected with acceptor circuit RX, the
One end of two high_voltage isolation capacitance Ca2 is connected with transmitter circuit TX and the other end is connected with acceptor circuit RX.Described first
The other end of high_voltage isolation capacitance Ca1 is connected with one end of the first filter capacitor Cd1, the second high_voltage isolation capacitance
The other end of Ca1 is connected with one end of the second filter capacitor Cd2.The breakdown voltage of high_voltage isolation capacitance is typically larger than
1000V, it is preferred that the breakdown voltage of high_voltage isolation capacitance is more than 2000V.In order to ensure the process occurred in common mode transient affair
In, the high voltage between transmitter circuit TX and acceptor circuit RX is mainly by the first high_voltage isolation capacitance Ca1 and the second high pressure
Isolation capacitance Ca2 undertakes, rather than is undertaken by filter capacitor, increases breakdown risk, it is necessary to assure first high_voltage isolation electricity
The capacitance for holding Ca1 and the second high_voltage isolation capacitance Ca2 is less than the first filter capacitor Cd1 and the second filter capacitor Cd2.Specifically
Ground, the 40% of capacitance of the capacitance less than the first filter capacitor Cd1 of the first high_voltage isolation capacitance Ca1；Second high_voltage isolation
The 40% of capacitance of the capacitance of capacitance Ca2 less than the second filter capacitor Cd2.
First high_voltage isolation capacitance Ca1 and the second high_voltage isolation capacitance Ca2 be mainly used for bearing transmitter and receiver it
Between need the high voltage being isolated.First filter capacitor Cd1 and the second filter capacitor Cd2 is mainly used for occurring in common mode transient affair
In the process, the drift of the first, second, third, fourth RC network of cooperation constraint differential signal bias voltage, while by differential signal
Including low-frequency noise filter out.
Fig. 7 is referred to, sometimes for higher isolation voltage is obtained, the first high_voltage isolation capacitance may include multiple
First insulator capacitance, the multiple first insulator capacitance are serially connected；The second high_voltage isolation capacitance includes multiple
Two insulator capacitances, the multiple second insulator capacitance are serially connected.The quantity of specific series capacitance is not constituted to this hair
Bright limitation.
Pass through driver 602 by input signal and by the input signal after 601 reverse phase of phase inverter in transmitter circuit TX
Enhance with 603, then receiver is transferred in the form of differential signal by high_voltage isolation capacitance Ca11-Ca1n and Ca21-Ca2n
Circuit RX.The breakdown voltage of high_voltage isolation capacitance is more than 2000V, can specifically have 1 or multiple with high breakdown voltage
Capacitance connect to be formed.According to the requirement of specific production technology, high_voltage isolation capacitance can be located at transmitter or receiver core
On piece can also be located at other than transmitter or receiver chip, then is connected by encapsulation (such as bonding line).Pass through high_voltage isolation
Capacitive transmission biases the input terminal phase of regulator circuit and comparator circuit by the segmentation of the present invention to the differential signal of receiver
Even, output signal is obtained.Then the output signal can be reverted into level signal by latch.
Fig. 8 is referred to, in the embodiment show in figure 8, including three chips.First chip TX is transmitter above-mentioned electricity
Road, the second chip CA are special isolation capacitance chip, are integrated with the first high_voltage isolation capacitance and the second high_voltage isolation electricity above
Hold, third chip RX is acceptor circuit, contains segmentation biasing filter circuit of pressure-stabilizing and differential signal comparator electricity above-mentioned
Road, the first filter capacitor Cd1 and the second filter capacitor Cd2 are integrated on third chip.First chip and the second chip pass through key
It closes lead 601 to be connected, the second chip is connected with third chip by bonding wire 602.The technical advantage of the embodiment is will to lead
The high_voltage isolation capacitance for undertaking high voltage is separately positioned at different from the chip of transmitter and acceptor circuit, then emitting
Device chip, receiver chip and high_voltage isolation electric capacity chip can be respectively adopted different semiconductor technology processing procedures and be produced,
It will be compatible with preferable filter capacitor with standard CMOS process and receiver chip integrates, and will be compatible with standard CMOS process poor
The individual chip of high_voltage isolation capacitance, to achieve the effect that optimization system performance, reduce system cost.
Filter circuit of pressure-stabilizing and signal deteching circuit provided by the embodiments of the present application, the circuit include：First RC network
U1, the second RC network U2, third RC network U3, the 4th RC network U4, the first divider resistance Rf1, the second divider resistance Rf2,
Three divider resistance Rg1, the 4th divider resistance Rg2, the first filter capacitor Cd1 and the second filter capacitor Cd2.First filtering
One end of capacitance Cd1 is successively through the first RC network U1, the second RC network U2 and the one of the second filter capacitor Cd2
End connection；One end of the first divider resistance Rf1 is connected between the first RC network U1 and the second RC network U2,
The other end of the first divider resistance Rf1 is connect with power supply Vdd；One end of the second divider resistance Rf2 is connected to described
Between first RC network U1 and the second RC network U2, the other end of the second divider resistance Rf2 is grounded；First filter
The other end of wave capacitance Cd1 is another with the second filter capacitor Cd2's through the third RC network U3, the 4th RC network U4 successively
One end connects；One end of the third divider resistance Rg1 be connected to the third RC network U3 and the 4th RC network U4 it
Between, the other end of the third divider resistance Rg1 is connect with the power supply Vdd；One end of the 4th divider resistance Rg2 connects
Between the third RC network U3 and the 4th RC network U4, the other end of the 4th divider resistance Rg2 is grounded.First
Filter capacitor Cd1 and the second filter capacitor Cd2 can constrain differential signal bias voltage when common mode transient affair occurs
Drift, while the low-frequency noise that can also play the role of including in differential signal filters out.
It should be noted that each embodiment in this specification is described in a progressive manner, each embodiment weight
Point explanation is all difference from other examples, and the same or similar parts between the embodiments can be referred to each other.
For device class embodiment, since it is basically similar to the method embodiment, so fairly simple, the related place ginseng of description
See the part explanation of embodiment of the method.
In several embodiments provided herein, it should be understood that disclosed device and method can also pass through it
Its mode is realized.The apparatus embodiments described above are merely exemplary, for example, the flow chart and block diagram in attached drawing are aobvious
The device of multiple embodiments according to the application, architectural framework in the cards, the work(of method and computer program product are shown
It can and operate.In this regard, each box in flowchart or block diagram can represent one of a module, section or code
Point, a part for the module, section or code includes one or more for implementing the specified logical function executable
Instruction.It should also be noted that at some as in the realization method replaced, the function of being marked in box can also be attached to be different from
The sequence marked in figure occurs.For example, two continuous boxes can essentially be basically executed in parallel, they also may be used sometimes
To execute in the opposite order, this is depended on the functions involved.It is also noted that each of block diagram and or flow chart
The combination of box in box and block diagram and or flow chart, function or the dedicated of action are based on as defined in execution
The system of hardware is realized, or can be realized using a combination of dedicated hardware and computer instructions.
In addition, each function module in each embodiment of the application can integrate to form an independent portion
Point, can also be modules individualism, can also two or more modules be integrated to form an independent part.
It, can be with if the function is realized and when sold or used as an independent product in the form of software function module
It is stored in a computer read/write memory medium.Based on this understanding, the technical solution of the application is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be expressed in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be
People's computer, server or network equipment etc.) execute each embodiment the method for the application all or part of step.
And storage medium above-mentioned includes：USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic disc or CD.It needs
Illustrate, herein, relational terms such as first and second and the like be used merely to by an entity or operation with
Another entity or operation distinguish, and without necessarily requiring or implying between these entities or operation, there are any this realities
The relationship or sequence on border.Moreover, the terms "include", "comprise" or its any other variant are intended to the packet of nonexcludability
Contain, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes
Other elements that are not explicitly listed, or further include for elements inherent to such a process, method, article, or device.
In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including the element
Process, method, article or equipment in there is also other identical elements.
The foregoing is merely the preferred embodiments of the application, are not intended to limit this application, for the skill of this field
For art personnel, the application can have various modifications and variations.Within the spirit and principles of this application, any made by repair
Change, equivalent replacement, improvement etc., should be included within the protection domain of the application.It should be noted that：Similar label and letter exist
Similar terms are indicated in following attached drawing, therefore, once being defined in a certain Xiang Yi attached drawing, are then not required in subsequent attached drawing
It is further defined and is explained.
The above, the only specific implementation mode of the application, but the protection domain of the application is not limited thereto, it is any
Those familiar with the art can easily think of the change or the replacement in the technical scope that the application discloses, and should all contain
It covers within the protection domain of the application.Therefore, the protection domain of the application shall be subject to the protection scope of the claim.
Claims (10)
1. a kind of filter circuit of pressure-stabilizing, which is characterized in that the circuit includes：First RC network, the second RC network, the 3rd RC nets
Network, the 4th RC network, the first divider resistance, the second divider resistance, third divider resistance, the 4th divider resistance, the first filtered electrical
Appearance and the second filter capacitor；
One end of first filter capacitor is successively through first RC network, second RC network and second filtered electrical
One end of appearance connects；
One end of first divider resistance is connected between first RC network and second RC network, described first point
The other end of piezoresistance is connect with power supply；One end of second divider resistance is connected to first RC network and described second
Between RC network, the other end of second divider resistance is grounded；
The other end of first filter capacitor is successively through the third RC network, the 4th RC network and second filter capacitor
The other end connection；
One end of the third divider resistance is connected between the third RC network and the 4th RC network, the third point
The other end of piezoresistance is connect with the power supply；One end of 4th divider resistance be connected to the third RC network with it is described
Between 4th RC network, the other end of the 4th divider resistance is grounded.
2. filter circuit of pressure-stabilizing according to claim 1, which is characterized in that further include the first electric capacity of voltage regulation, described first
One end of electric capacity of voltage regulation is connected between first divider resistance and second divider resistance, first electric capacity of voltage regulation
Another termination AC deposition.
3. filter circuit of pressure-stabilizing according to claim 2, which is characterized in that further include the second electric capacity of voltage regulation, described second
One end of electric capacity of voltage regulation is connected between the third divider resistance and the 4th divider resistance, second electric capacity of voltage regulation
Another termination AC deposition (.
4. filter circuit of pressure-stabilizing according to claim 3, which is characterized in that the capacitance of first filter capacitor and institute
The capacitance for stating the second filter capacitor is equal, and less than the capacitance of first electric capacity of voltage regulation and second electric capacity of voltage regulation
/ 10th of the sum of capacitance.
5. filter circuit of pressure-stabilizing according to claim 1, which is characterized in that first RC network includes the first RC capacitances
Device and the first RC resistors, the first RC capacitors and the first RC capacitor in parallel；
The first RC capacitors are connect with one end after the first RC capacitor in parallel with first filter capacitor, another
It holds and is connect with one end far from second filter capacitor of second RC network.
6. filter circuit of pressure-stabilizing according to claim 1, which is characterized in that second RC network includes the 2nd RC capacitances
Device and the 2nd RC resistors, the 2nd RC capacitors and the 2nd RC capacitor in parallel；
The 2nd RC capacitors are connect with one end after the 2nd RC capacitor in parallel with second filter capacitor, another
It holds and is connect with one end far from second filter capacitor of first RC network.
7. filter circuit of pressure-stabilizing according to claim 1, which is characterized in that the third RC network includes the 3rd RC capacitances
Device and the 3rd RC resistors, the 3rd RC capacitors and the 3rd RC capacitor in parallel；
The separate institute of the 3rd RC capacitors and one end and first filter capacitor after the 3rd RC capacitor in parallel
One end connection of the first RC network is stated, one end far from second filter capacitor of the other end and the 4th RC network connects
It connects.
8. filter circuit of pressure-stabilizing according to claim 1, which is characterized in that the 4th RC network includes the 4th RC capacitances
Device and the 4th RC resistors, the 4th RC capacitors and the 4th RC capacitor in parallel；
The separate institute of the 4th RC capacitors and one end and second filter capacitor after the 4th RC capacitor in parallel
One end connection of the second RC network is stated, one end far from first filter capacitor of the other end and the third RC network connects
It connects.
9. a kind of signal deteching circuit, which is characterized in that including transmitter circuit, signal processing circuit and such as claim 1-
8 any one of them filter circuit of pressure-stabilizing, the transmitter circuit is through the first high_voltage isolation capacitance and the second high_voltage isolation electricity
Appearance is connect with the filter circuit of pressure-stabilizing, and the filter circuit of pressure-stabilizing is connect with the signal processing circuit.
10. signal deteching circuit according to claim 9, which is characterized in that the first high_voltage isolation capacitance includes more
A first insulator capacitance, the multiple first insulator capacitance are serially connected；The second high_voltage isolation capacitance includes multiple
Second insulator capacitance, the multiple second insulator capacitance are serially connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810759207.5A CN108563279A (en) | 2018-07-11 | 2018-07-11 | Filter circuit of pressure-stabilizing and signal deteching circuit |
Applications Claiming Priority (1)
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|---|---|---|---|
| CN201810759207.5A CN108563279A (en) | 2018-07-11 | 2018-07-11 | Filter circuit of pressure-stabilizing and signal deteching circuit |
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| CN108563279A true CN108563279A (en) | 2018-09-21 |
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| CN201810759207.5A Pending CN108563279A (en) | 2018-07-11 | 2018-07-11 | Filter circuit of pressure-stabilizing and signal deteching circuit |
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Cited By (1)
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| CN109004927A (en) * | 2018-10-18 | 2018-12-14 | 重庆线易电子科技有限责任公司 | Pulse signal transmission circuit and refresh pulse signal circuit |
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