CN108540168A - A kind of device and method that anti-narrowband interference long code spread spectrum synchronization head captures in real time - Google Patents
A kind of device and method that anti-narrowband interference long code spread spectrum synchronization head captures in real time Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7097—Interference-related aspects
- H04B1/71—Interference-related aspects the interference being narrowband interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7075—Synchronisation aspects with code phase acquisition
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7075—Synchronisation aspects with code phase acquisition
- H04B1/708—Parallel implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7097—Interference-related aspects
- H04B1/71—Interference-related aspects the interference being narrowband interference
- H04B1/7102—Interference-related aspects the interference being narrowband interference with transform to frequency domain
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Abstract
The present invention proposes that a kind of anti-narrowband interference long code spreads the device and method captured in real time, to realize the real-time capture of synchronous head in complex communication environment and in long code spread spectrum communication system, and improves acquisition probability, while reducing capture complexity.Acquisition equipment and method：Transmitting synchronous head Data Data is generated, receiving terminal carries out AF panel to the data received；Shift register carries out serial storage and parallel output to the data after AF panel；Despreading module de-spreads data；Ram cell is sequentially stored to data after despreading and parallel output；The adjustment of sequence and symbol adjustment module to data progress sequence and symbol after adjustment；Parallel low-pass filter module is filtered data after adjustment；Parallel FFT module carries out parallel FFT operation to filtered data；Modulus of access and selection maximum value module to FFT result modulus and choose maximum modulus value；Judgment module judge synchronous head whether acquisition success.
Description
Technical field
The invention belongs to communication technology process field, it is related to a kind of anti-narrowband interference long code spread spectrum synchronization head and catches in real time
The device and method obtained can be used in covert communications or burst communication system to having narrowband interference, the information of long code spread spectrum to carry out
Real-time synchronization captures.
Background technology
The 1950s, mid-term generates spread-spectrum (Spread Spectrum) communication technology, initial application
Field is mainly military communication.The information theory basic theories of Shannon illustrates that spread spectrum communication is very effective antijam communication side
Formula, i.e., so-called bandwidth exchange the method for channel capacity for, its main feature is that the bandwidth used in transmission information is much larger than information band itself
It is wide.Spread spectrum technic is spread in originator with pseudo noise code, is realized and is de-spread with same pseudo-random code in receiving end, realizes information
Transmission, this so that spread spectrum communication is with good performance, especially have very strong anti-interference ability and anti-intercepting and capturing.
Spread spectrum mainly has Direct Sequence Spread Spectrum, frame hopping spread spectrum, frequency hopping spread spectrum, hop-time spread spectrum etc..Direct Sequence Spread Spectrum
Technology is quickly grown, the baseband signal as a result of pseudo noise code as band spectrum modulation, thus has the advantages that many uniquenesses：
When in communication, strong antijamming capability, transmission power is low, also has low intercepting and capturing, security performance good.It is excellent just because of these
Point, spread spectrum are quickly grown, and are used widely in fields such as communication, data transmission, navigator fix, rangings.
One inevitable problem of Resistant DS Spread Spectrum System is narrowband interference, it is generally the case that the electromagnetism of communication
Environment is sufficiently complex, and communication condition is more severe, and there are the various interference with statistical property time-varying of pattern, in these interference,
The interference of high power narrowband has become one of the main reason for destroying communication system.
One critical problem of Resistant DS Spread Spectrum System be how fast Acquisition.Capture refers to local reference code and connects
The code phase alignment of code is received, while local clock and carrier frequency being made to be mutually aligned.Capture will not only search for the phase of pseudo noise code
Position, but also the Doppler frequency shift of multicarrier is searched, it is the process of a two-dimensional search.Common two dimension acquisition search strategy has puppet
The serial search strategy of sequence row carrier wave, the serial search strategy of pseudo-code parallel carriers, the parallel search plan of the serial carrier wave of pseudo-code
Slightly.These methods are all searching carrier Doppler frequency shifts while searching for code phase, when phase and carrier wave all search correctly
When value, it is only acquisition success, so under the very long situation of synchronizing information, usually to be taken a long time to synchronize.
In order to reduce capture time, FFT spectrum analysis is introduced, when local pseudo-code is consistent with incoming semator code phase, local
After pseudo-code is multiplied with input signal, residual carrier is as a result only remained, FFT spectrum analysis is done to it, values of Doppler frequency shift can be obtained.It is general
It is captured all over the PMF-FFT (partial matched filter) used, such as application publication number is CN104280750A, it is entitled
The patent application of " the long code capture systems based on partial matched filter fft algorithm " discloses a kind of partial matched filter FFT calculations
Method, the single element phase that this method receives single element aggregate-value buffer module by using the memory RAM of table tennis random storage
The rate of dry accumulation data flow reduces, and can reduce the hardware resource and fortune of progress Fast Fourier Transform FFT after matched filtering
Calculation amount, but the synchronizing information after spread spectrum generates spread spectrum substantially or using single pseudo-code to synchronizing information is carried out, in length
Receiving terminal just needs the shift register for the single pseudo-code depth grown to carry out related operation with local pseudo-code very much when code spread spectrum, firmly
Part complexity is excessively high.
In convert communication system, reliable capture in real time is the key that system normal communication.Spread spectrum can cause bandwidth to become
Width unavoidably has narrowband interference, and the capture of subsequent synchronisation head and the bit error rate can be caused very big problem occur, in addition because real
Show covert communications, is exactly that information stashes as far as possible, or even is completely hidden in noise if covert communications, this will
Ask signal-to-noise ratio relatively low, just need long code in this case to obtain high-gain, but capture complexity height can be brought simultaneously etc.
Problem.
Invention content
It is an object of the invention to solve the problem above-mentioned, it is proposed that a kind of anti-narrowband interference long code spread spectrum synchronization head is real-time
The device and method of capture, to realize the real-time capture of synchronous head in complex communication environment and in long code spread spectrum communication system,
And acquisition probability is improved, while reducing capture complexity.
To achieve the above object, the technical solution that the present invention takes is：
A kind of device that anti-narrowband interference long code spread spectrum synchronization head captures in real time, including setting are received in spread spectrum communication system
Serial FFT computing modules, AF panel module, serial i FFT computing modules, shift register, despreading module, the RAM at end are mono-
Member, sequence and symbol adjustment module, parallel low-pass filter module, parallel FFT computing module, Modulus of access and selection maximum value mould
Block and judgment module, wherein：
Serial FFT computing modules, transformation of the time domain to frequency domain is carried out for the continuous number signal to receiving in real time；
AF panel module, the modulus value for the data after being converted to serial FFT computing modules carry out thresholding judgement, and will
Data zero setting corresponding more than the frequency point of thresholding；
Serial i FFT computing modules carry out the change of frequency domain to time domain for the data after inhibiting AF panel module in real time
It changes；
Shift register, the data for being exported to serial i FFT computing modules are serially stored, and by the number of storage
According to parallel output；
Module is de-spread, is used for by carrying out related realization despreading to the output of local pseudo-code and shift register, and sequentially
Output；
Ram cell includes the RAM of multiple parallel arrangeds, for the output of serial storage despreading module in order, and to depositing
The data of storage press identical address parallel output；
Sequence and symbol adjust module, are ranked up for the data to multiple RAM parallel outputs, and to the number after sequence
It is adjusted according to symbol；
Parallel low-pass filter module, the output data for adjusting module to sequence and symbol carry out parallel low pass filtered
Wave；
Parallel FFT computing module, the data for being exported to parallel low-pass filter module carry out parallel FFT operation；
Modulus of access and selection maximum value module select modulus value for the output data Modulus of access to parallel FFT computing module
In maximum value and output；
Judgment module compares for the maximum modulus value to Modulus of access and selection maximum value module output with pre-determined threshold
Compared with, and judge synchronous head whether acquisition success；
The device that above-mentioned anti-narrowband interference long code spread spectrum synchronization head captures in real time, the AF panel module, including prolong
When module, Modulus of access module and judge zero setting module, wherein the output of FFT is delayed by the time delay module, Modulus of access module will
The output of FFT carries out summed square Modulus of access, judges that zero setting module judges the output of time delay module and Modulus of access module
And zero setting.
A kind of method that anti-narrowband interference long code spread spectrum synchronization head captures in real time, includes the following steps：
Step 1) setup parameter：
According to the characteristic that the autocorrelative peak value of pseudo-random sequence is more sharp, length and RAM are chosen in pseudo-random sequence
The identical first pseudo-code PN of RAM number in unit1, choose length and the identical second pseudo-code PN of shift register depth2, setting
AF panel thresholding T1, setting judge detection threshold T2；
Step 2) transmitting terminal emits synchronous head data：
Transmitting terminal passes through the first pseudo-code PN1Synchronous head data 1 are spread, the synchrodata after being spread, and led to
Cross the second pseudo-code PN2Synchrodata after spread spectrum is spread, synchronous head Data Concurrent is obtained and penetrates；
The serial FFT computing modules of step 3) carry out FFT transform to the data received：
Serial FFT computing modules carry out time domain to frequency in real time to the synchronous head data for having mixed interference and noise received
The transformation in domain obtains the data after FFT transform；
Step 4) AF panel module carries out AF panel to the data after FFT transform：
Data after AF panel mould time delay module in the block converts serial FFT computing modules postpone, and do simultaneously
Disturb the data Modulus of access operation after the Modulus of access module in suppression module converts serial FFT computing modules, AF panel module
In judge zero setting module judge Modulus of access module output whether be more than setting thresholding T1, if so, by Postponement module
Correspond to the data zero setting of frequency point in output, otherwise the data for corresponding to frequency point in the output of Postponement module be not processed, zero setting and
Data after the data composition AF panel of not zero setting；
Step 5) serial i FFT computing modules carry out IFFT transformation to the data after AF panel：
Data after AF panel are carried out the transformation of frequency domain to time domain by serial i FFT computing modules in real time, obtain IFFT changes
Data after changing；
Data after step 6) shift register converts the IFFT received carry out serial storage and parallel output：
Data after the IFFT transformation of shift register serial received, start parallel output after being filled with, obtain parallel output
Data after IFFT transformation；
Step 7) de-spreads module and is de-spread to the data after the IFFT transformation of parallel output：
De-spread the data after module converts the IFFT of parallel output and the second pseudo-code PN2The data of corresponding position carry out phase
Operation is closed, realizes the despreading of the data after being converted to IFFT, the data after being de-spread simultaneously sequentially export；
Step 8) ram cell is sequentially stored to the data of despreading module output and parallel output：
Step 8a) ram cell since first RAM by the sequence of despreading module output data from first address RAM
It stores successively backward, first RAM starts to deposit second RAM after being filled with, and stores successively, until all RAM are filled with and then are returned again
First RAM is returned, is stored again；
Step 8b) after all RAM are filled with, identical address is stored it in since first address RAM ram cell
Data parallel exports, defeated since the data of first address until the data end of output of the last one address RAM, then again
Go out；
The adjustment of step 9) sequence and symbol adjustment module to data the progress sequence and symbol of RAM parallel outputs：
Sequence and symbol adjustment module arrange the data of ram cell parallel output according to the sequence of deposit RAM, real
Now to the adjustment of the data order of RAM parallel outputs, and data and the first pseudo-code PN to having adjusted sequence1Dot product is carried out, is obtained
Data after being adjusted to symbol realize the adjustment to the data symbol for having adjusted sequence；
Data after step 10) parallel low-pass filter module adjusts symbol are filtered：
Data after parallel low-pass filter module adjusts symbol carry out low-pass filtering, after obtaining low-pass filtering
Data；
Step 11) parallel FFT module carries out parallel FFT operation to the data after low-pass filtering：
Parallel FFT module carries out parallel FFT operation to the data after low-pass filtering, obtains the data after FFT operations；
Step 12) Modulus of access and selection maximum value module to the data modulus after FFT operations and choose maximum modulus value：
Modulus of access and selection maximum value module carry out Modulus of access operation to the data after FFT operations, and from operation result
The maximum modulus value of middle selection, obtains modulus value maximum value；
Step 13) judgment module judge synchronous head whether acquisition success：
Judgment module judges whether modulus value maximum value is more than preset thresholding T2, if so, synchronous head acquisition success, otherwise
Execute step (3).
Compared with prior art, the present invention having the following advantages that：
1, the present invention is realized due to being provided with frequency domain interference suppression module in the front end of receiving terminal shift register to narrowband
The inhibition of interference avoids the prior art because narrowband interference causes to capture the low defect of accuracy, effectively increases follow-up
The probability that success captures in capture.
2, the present invention is used when obtaining synchronous head data and is first spread to synchronizing information, then again to spread spectrum after
The method that data are spread again, compared with the prior art directly spreads to obtain the technology of synchronous head data using single long code,
Can first data be de-spread with number when once shortening long code spread spectrum into shift register when the data that receiving terminal processing receives
According to length, the excessive problem of the existing required shift register depth of PMF-FFT technologies is avoided, system is effectively reduced
Complexity.
3, the present invention is added to parallel low-pass filter module between receiving terminal ram cell and parallel FFT module, right
Data carry out low-pass filtering, the data sine wave handled into FFT can be made more smooth, with available data directly into the skill of FFT
Art is compared, and can be judged more acurrate to the FFT modulus value exported, be further increased the probability successfully captured.
Description of the drawings
Fig. 1 is the structural schematic diagram of acquisition equipment of the present invention；
Fig. 2 is the implementation process block diagram of catching method of the present invention.
Specific implementation mode
Below in conjunction with the drawings and specific embodiments, invention is further described in detail.
Referring to Fig.1, a kind of device that long code spread spectrum synchronization head captures in real time, including FFT module, AF panel module,
It is IFFT modules, shift register, despreading module, ram cell, sequence and symbol adjustment module, parallel FFT computing module, parallel
Low pass filter blocks, Modulus of access and selection maximum value module, judgment module.
It is connected in turn after the FFT module, AF panel module, IFFT modules, shift register, despreading mould is fast, RAM
Unit, sequence and symbol adjust module, parallel FFT computing module, parallel low-pass filter module, Modulus of access and selection maximum value
Module and judgment module.
The points of FFT module are 1024 points, and the synchronous head data for having mixed interference and noise received are carried out 1024
Data are transformed from the time domain to frequency domain by point FFT point transformation in real time；
AF panel module, including time delay module, Modulus of access module and judge zero setting module, wherein the time delay module will
The output of FFT is delayed, and the output of FFT is carried out summed square Modulus of access by Modulus of access module, judges zero setting module to Modulus of access mould
The output of block is judged, if more than given AF panel thresholding 1000, judges zero setting module by corresponding frequency in time delay module
The data zero setting of point position, does not otherwise process the output of time delay module, and the data of zero setting and not zero setting are constituted altogether to be done
Disturb the data after inhibiting；
IFFT modules points are 1024 points, by data after AF panel carry out 1024 point IFFT changes change commanders data in real time from
Frequency-domain transform is to time domain；
The depth of shift register is 256, and the serial mode after being converted to IFFT stores, and starts after register is filled with
Parallel output realizes the function that the serial data that IFFT modules export is become to parallel data, because will be with the second of 256 length
Pseudo-code PN2Correlation is done, so depth is 256；
Module is de-spread to be responsible for carrying out first time despreading, the local pseudo-code of despreading module storage to parallel IFFT output datas
For the second pseudo-code PN of 256 length2, pass through the second pseudo-code PN grown 2562With 256 data phases of shift register parallel output
It answers the data of position to carry out related operation, the data after being de-spread one by one, and sequentially exports；
The number of RAM is 64, because of the first pseudo-code PN1Length be 64, while in order to ensure the alignment of code phase,
The depth of RAM be 256, i.e., with the second pseudo-code PN2Equal length.Shift register, can be there are one despread values into a sampling point
Output, sequentially stores the output of shift register since first address of first RAM, because RAM depth is second pseudo-
Code PN2Length, so first RAM is filled with the data stored in the identical address of rear second RAM and first RAM is
Data under same code phase, remaining RAM similarly, start the number for reading all RAM identical address parallel after all RAM are filled with
According to；
The sequence that sequence and symbol adjustment 64 RAM of module pair are stored in RAM with the data that address exports is ranked up, because
RAM store when be cycle storage, it is possible to after come in data storage address it is earlier, so it needs to be determined which
Data are first entered, and correct data order are only after adjustment, then by data and the first pseudo-code PN1Dot product is carried out, is reached
To the purpose of adjustment symbol；
Parallel low-pass filter is filtered the data after adjustment, obtains filtered data, adds low pass filtered
Wave device can further filter out interference, keep sine wave more smooth；
64 parallel FFT computing modules do parallel FFT to the output of filter, can effectively be dropped used here as parallel FFT
The input time of low FFT module data reaches compared with the real-time FFT transformation for realizing data under low rate；
Modulus of access and selection maximum value module do summed square to the output of FFT and obtain modulus value, then by modulus value most
Big value output；
Judgment module is used for judging Modulus of access and selects whether the maximum value of maximum value module output is more than given thresholding
8000, if so, synchronous head acquisition success, otherwise without acquisition success, continuation judges next time.
With reference to Fig. 2, a kind of method that anti-narrowband interference long code spread spectrum synchronization head captures in real time includes the following steps：
Step 1) setup parameter：
According to the characteristic that the autocorrelative peak value of pseudo-random sequence is more sharp, it is 64 that length is chosen in pseudo-random sequence
First pseudo-code PN1The the second pseudo-code PN for being 256 with length2, shift register depth is set as 256, sets RAM number of ram cell
It is 64, single RAM depth is 256, sets AF panel thresholding as 1000, sets and judge detection threshold as 8000；
Step 2) transmitting terminal emits synchronous head data：
Transmitting terminal use length for 64 the first pseudo-code PN1It is spread to 1, it is 256 the second pseudo-code then to use length
PN2, to passing through PN1The synchronizing information of spread spectrum is spread again, is obtained the synchronous head data that length is 16384, is then emitted；
The serial FFT computing modules of step 3) carry out FFT transform to the data received：
1024 FFT transform are carried out to the synchronous head data for having mixed interference and noise received in receiving terminal, will be counted
Frequency domain is transformed from the time domain to when factually, obtains the data after FFT transform；
Step 4) AF panel module carries out AF panel to the data after FFT transform：
Postponement module in AF panel module is by two clocks of data delay after FFT transform, while Modulus of access module
Summed square Modulus of access operation is carried out to the data after FFT transform, judge zero setting module by by the output of Modulus of access module and
AF panel thresholding 1000 compares, if being greater than thresholding, by the data zero setting of the corresponding frequency point of the output of Postponement module, otherwise not
The output of Postponement module is handled, the data of zero setting and non-zero setting constitute the data after AF panel altogether；
Step 5) serial i FFT computing modules carry out IFFT transformation to the data after AF panel：
Data after AF panel are done into 1024 point IFFT operations by data in real time from frequency-domain transform to time domain, obtain IFFT
Data after transformation；
Data after step 6) shift register converts the IFFT received carry out parallel output：
Data after shift register converts IFFT do serial storage, and until being filled with, the depth of shift register is
256, that is, it is filled with 256 data parallel outputs after 256 data, while continuing to be stored in data in toward register, is often stored in one
The data of a sampling point then 256 data of parallel output obtain the data after 256 IFFT transformation of parallel output, because of this hair
It is bright that secondary spread spectrum is utilized, as long as so shift register storage depth and the second pseudo-code PN here2Length be equally
It can be to effectively reduce implementation complexity compared with prior art；
Step 7) de-spreads module and is de-spread to the data after the IFFT transformation of parallel output：
256 the second pseudo-codes grown for de-spreading the data after module converts 256 IFFT of parallel output and locally prestoring
PN2The data of corresponding position carry out related calculation, and realize the despreading to data, the data after a despreading are obtained, because information is
Continuously, so the data after multiple despreadings can be obtained here, these data are sequentially exported；
Step 8) ram cell is sequentially stored to the data of despreading module output and parallel output：
Step 8a) ram cell a total of 64 RAM, each RAM depth be 256, from first ground first RAM
Location starts to be filled with 256 after first RAM is filled with by the output valve of despreading module output sequence successively storage despreading module
After a value, then start to store from second RAM, until 64 RAM are all filled with, then again from first of first RAM
Address starts to store again, covers legacy data；
Step 8b) ram cell 64 RAM, the parallel output since address 1, i.e., every time from 64 RAM identical address
Place gets a data and exports, 64 data of each parallel output, after 256 addresses all take in order, followed by
The value since address 1, because it is 256 that RAM, which obtains storage depth, number 64, so being stored in the number of each RAM identical address
According to being all the data agreed under code phase, it can ensure that the data taken out are same when so the data of identical address being exported
Then data under code phase could carry out the adjustment of sequence and symbol；
The adjustment of step 9) sequence and symbol adjustment module to data the progress sequence and symbol of RAM parallel outputs：
Sequence and symbol adjust module, are ranked up to 64 data taken out from RAM, because when being stored in RAM
Will appear earlier address storage be after come in the data come, so to be ranked up here, it is ensured that the sequence of data
It is to realize the sequence to the data of RAM parallel outputs, and first that the data after sequence are grown with local 64 according to storage order
Pseudo-code PN1Dot product is done, the value after 64 symbols adjustment is obtained, realizes and the symbol of data after sequence is adjusted, and export；
Data after step 10) parallel low-pass filter module adjusts symbol are filtered：
Parallel low-pass filter module does low-pass filtering to the output of symbol and sequence adjustment module, then parallel output,
Here adding a low-pass filter filtering can make the data sine wave into FFT more smooth, make the output mould subsequently to FFT
The judgement of value is more acurrate；
Step 11) parallel FFT module carries out parallel FFT operation to the data after low-pass filtering：
Parallel 64 FFT modules do parallel FFT to the output data of low-pass filter, and parallel FFT can reduce FFT operations
Time can complete outputting and inputting for FFT compared with commonly using serial FFT under relatively low clock rate；
Step 12) Modulus of access and selection maximum value module to the data modulus after FFT operations and choose maximum modulus value：
Modulus of access and selection maximum value module, by 64 values of parallel FFT output respectively by imaginary part and real part summed square
Obtain modulus value, taken out from 64 obtained data it is maximum that, and maximum value is exported.
Step 13) judgment module judge synchronous head whether acquisition success：
Receiving terminal judgment module module, judges whether the maximum value that a upper module obtains is more than pre-determined threshold 8000, if
It is, then acquisition success, otherwise without acquisition success, to execute step (3).
Claims (3)
1. a kind of device that anti-narrowband interference long code spread spectrum synchronization head captures in real time, which is characterized in that logical in spread spectrum including setting
Believe serial FFT computing modules, AF panel module, serial i FFT computing modules, shift register, the despreading mould of system receiving terminal
Block, ram cell, sequence and symbol adjustment module, parallel low-pass filter module, parallel FFT computing module, Modulus of access and selection
Maximum value module and judgment module, wherein：
Serial FFT computing modules, transformation of the time domain to frequency domain is carried out for the continuous number signal to receiving in real time；
AF panel module, the modulus value for the data after being converted to serial FFT computing modules carries out thresholding judgement, and will be more than
The corresponding data zero setting of frequency point of thresholding；
Serial i FFT computing modules carry out the transformation of frequency domain to time domain for the data after inhibiting AF panel module in real time；
Shift register, the data for being exported to serial i FFT computing modules are serially stored, and simultaneously by the data of storage
Row output；
Module is de-spread, is used for by carrying out related realization despreading to the output of local pseudo-code and shift register, and sequentially export；
Ram cell includes the RAM of multiple parallel arrangeds, for the output of serial storage despreading module in order, and to storage
Data press identical address parallel output；
Sequence and symbol adjust module, are ranked up for the data to multiple RAM parallel outputs, and to the data symbols after sequence
It number is adjusted；
Parallel low-pass filter module, the output data for adjusting module to sequence and symbol carry out parallel low-pass filtering；
Parallel FFT computing module, the data for being exported to parallel low-pass filter module carry out parallel FFT operation；
Modulus of access and selection maximum value module are selected for the output data Modulus of access to parallel FFT computing module in modulus value
Maximum value simultaneously exports；
Judgment module is compared for the maximum modulus value to Modulus of access and selection maximum value module output with pre-determined threshold, and
Judge synchronous head whether acquisition success.
2. the device that anti-narrowband interference long code spread spectrum synchronization head described in claim 1 captures in real time, which is characterized in that described dry
It disturbs suppression module, including time delay module, Modulus of access module and judges zero setting module, wherein the time delay module is by the output of FFT
The output of FFT is carried out summed square Modulus of access, judges zero setting module to time delay module and Modulus of access mould by delay, Modulus of access module
The output of block carries out judgement and zero setting.
3. a kind of method that anti-narrowband interference long code spread spectrum synchronization head captures in real time, it is characterised in that include the following steps：
(1) setup parameter：
According to the characteristic that the autocorrelative peak value of pseudo-random sequence is more sharp, length and ram cell are chosen in pseudo-random sequence
In the identical first pseudo-code PN of RAM number1, choose length and the identical second pseudo-code PN of shift register depth2, setting interference
Suppression threshold T1, setting judge detection threshold T2；
(2) transmitting terminal emits synchronous head data：
Transmitting terminal passes through the first pseudo-code PN1Synchronous head data 1 are spread, the synchrodata after being spread, and passes through second
Pseudo-code PN2Synchrodata after spread spectrum is spread, synchronous head Data Concurrent is obtained and penetrates；
(3) serial FFT computing modules carry out FFT transform to the data received：
Serial FFT computing modules carry out time domain to the synchronous head data for having mixed interference and noise received and arrive frequency domain in real time
Transformation, obtains the data after FFT transform；
(4) AF panel module carries out AF panel to the data after FFT transform：
Data after AF panel mould time delay module in the block converts serial FFT computing modules postpone, while interfering suppression
For molding Modulus of access module in the block to the data Modulus of access operation after the transformation of serial FFT computing modules, AF panel mould is in the block
Judge that zero setting module judges whether the output of Modulus of access module is more than the thresholding T1 of setting, if so, by the output of Postponement module
Otherwise the data zero setting of middle corresponding frequency point is not processed the data that frequency point is corresponded in the output of Postponement module, zero setting and do not set
Data after zero data composition AF panel；
(5) serial i FFT computing modules carry out IFFT transformation to the data after AF panel：
Data after AF panel are carried out the transformation of frequency domain to time domain by serial i FFT computing modules in real time, after obtaining IFFT transformation
Data；
(6) data after shift register converts the IFFT received carry out serial storage and parallel output：
Data after the IFFT transformation of shift register serial received, start parallel output after being filled with, obtain the IFFT of parallel output
Data after transformation；
(7) despreading module de-spreads the data after the IFFT transformation of parallel output：
De-spread the data after module converts the IFFT of parallel output and the second pseudo-code PN2The data of corresponding position carry out related fortune
It calculates, realizes the despreading of the data after being converted to IFFT, the data after being de-spread simultaneously sequentially export；
(8) ram cell sequentially stores simultaneously parallel output to the data of despreading module output：
(8a) ram cell since first RAM by the sequence of despreading module output data from first address RAM backward successively
Storage, first RAM starts to deposit second RAM after being filled with, store successively, until all RAM are filled with and then return again to first
RAM is stored again；
(8b) ram cell stores it in the data of identical address simultaneously after all RAM are filled with since first address RAM
Row output, exports until the data end of output of the last one address RAM, then again since the data of first address；
(9) adjustment of sequence and symbol adjustment module to data the progress sequence and symbol of RAM parallel outputs：
Sequence and symbol adjustment module arrange the data of ram cell parallel output according to the sequence of deposit RAM, realization pair
The adjustment of the data order of RAM parallel outputs, and data and the first pseudo-code PN to having adjusted sequence1Dot product is carried out, is accorded with
Data after number adjustment, realize adjustment to the data symbol for having adjusted sequence；
(10) data after parallel low-pass filter module adjusts symbol are filtered：
Data after parallel low-pass filter module adjusts symbol carry out low-pass filtering, obtain the number after low-pass filtering
According to；
(11) parallel FFT module carries out parallel FFT operation to the data after low-pass filtering：
Parallel FFT module carries out parallel FFT operation to the data after low-pass filtering, obtains the data after FFT operations；
(12) Modulus of access and selection maximum value module to the data modulus after FFT operations and choose maximum modulus value：
Modulus of access and selection maximum value module carry out Modulus of access operation to the data after FFT operations, and are selected from operation result
Maximum modulus value is taken, modulus value maximum value is obtained；
(13) judgment module judge synchronous head whether acquisition success：
Judgment module judges whether modulus value maximum value is more than preset thresholding T2, if so, synchronous head acquisition success, otherwise executes
Step (3).
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