CN108509372B - System-on-chip - Google Patents

System-on-chip Download PDF

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CN108509372B
CN108509372B CN201810165115.4A CN201810165115A CN108509372B CN 108509372 B CN108509372 B CN 108509372B CN 201810165115 A CN201810165115 A CN 201810165115A CN 108509372 B CN108509372 B CN 108509372B
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width modulation
signal
pulse width
module
feedback
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CN108509372A (en
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何曾
黄敏君
胡建
杨波
张坤
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Amlogic Shanghai Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention relates to the technical field of integrated circuits, in particular to a system-on-chip, which comprises a central processing unit and a video processing module which are connected with each other; the video processing module transmits a feedback signal to the central processing unit in real time according to the self-operation power consumption requirement; further comprising: the pulse width modulation module is connected with the central processing unit; the feedback signal has a first feedback state, a second feedback state and a third feedback state; the pulse width modulation module receives and selects to operate in a first mode, a second mode or a third mode according to the control instruction; the power supply module is respectively connected with the pulse width modulation module and the central processing unit; when the pulse width modulation module operates in a first mode, outputting a pulse signal with a duty ratio larger than 0 and smaller than 1 to the power supply module; outputting a second signal having a constant level value of 1 when operating in the third mode; the conditions that the duty ratio of the output pulse signal is 0 and 1 can be compatible, and the duty ratio range of the signal output by the pulse width modulation module is expanded.

Description

System-on-chip
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a system-on-chip.
Background
In recent years, with the mainstream of an android system, a high-end chip of an ARM architecture is applied more and more to smart televisions, smart boxes, smart phones and tablet computers, the number of cores of the chip is continuously increased, VPU (Video Processing Unit, VPU for short) configuration of the chip is higher and higher, functions required by consumers are more and more, power consumption is a great problem influencing chip process design, the power consumption of the chip is also an important index of a product, and different power consumptions in different function modes are the direction of energy saving design of the product.
The early industry practice was to use a resistor voltage divider to obtain the maximum voltage required by the feedback voltage output system to meet the requirements of any functional mode. The mode voltage is always output in the maximum state meeting the requirements of the chip, the power consumption is high, the chip is continuously hot, and the service life is influenced. In the existing method, DVFS (Dynamic voltage and frequency scaling, DVFS for short) adjustable voltage is adopted to meet the requirements of different function modes, when a product runs, the function modes are switched fast, the running function modes have the condition of large span and discontinuity, DVFS must meet the requirement of timely response under each function mode, and meanwhile, the provided voltage must be the voltage meeting the requirements of the current mode, otherwise, the SOC (System on Chip System, SOC for short) is easy to run and jam if light, and then the System is hard to crash.
The DVFS principle is that when the processor works at different dominant frequencies, different duty ratios are output through the chip pulse width modulation port to control the direct current power supply to provide different required voltages, the working voltage of the CPU is generally about 1V, the working frequency range of the processor is also very large, different frequencies correspond to different voltages, the requirement on the fineness of the voltage by the processor is very high, and the good operation of the system can be guaranteed only through smooth transition. If the range of the pulse width modulation output is not wide enough, the voltage jump range is large, and the system is easy to restart or crash.
Disclosure of Invention
In view of the above problems, the present invention provides a system-on-chip, which includes a central processing unit and a video processing module connected to each other; the video processing module is characterized in that the video processing module transmits a feedback signal to the central processing unit in real time according to the self-operation power consumption requirement; the central processing unit outputs a corresponding control instruction to the pulse width modulation module according to the state of the feedback signal; further comprising:
the pulse width modulation module is connected with the central processing unit;
the feedback signal has a first feedback state, a second feedback state and a third feedback state;
the pulse width modulation module receives and selects to operate in a first mode corresponding to the first feedback state, a second mode corresponding to the second feedback state or a third mode corresponding to the third feedback state according to the control instruction;
the power supply module is respectively connected with the pulse width modulation module and the central processing unit;
when the pulse width modulation module operates in the first mode, outputting a pulse signal with a duty ratio larger than 0 and smaller than 1 to the power supply module;
when the pulse width modulation module operates in the second mode, outputting a first signal with a constant level value of 0 to the power supply module;
when the pulse width modulation module operates in the third mode, outputting a second signal with a constant level value of 1 to the power supply module;
and the power supply module supplies power to the central processing unit according to the pulse signal.
In the soc chip, a switch for controlling the output of the pulse signal is disposed in the pulse width modulation module;
the control command comprises a switch control command and a level control command, and the level control command has a first control state and a second control state;
when the switch is switched off under the control of the switch control instruction, the pulse width modulation module works in the first mode;
when the switch is switched on under the control of the switch control instruction and the level control instruction is in the first control state, the pulse width modulation module works in the second mode;
and when the switch is switched on under the control of the switch control instruction and the level control instruction is in the second control state, the pulse width modulation module works in the third mode.
In the soc chip, the cpu is connected to the video processing module through an information amount monitoring port to monitor and output the corresponding control command to the pwm module according to the state of the feedback signal at the information amount monitoring port.
In the soc chip, the pulse width modulation module outputs the pulse signal through a first output port;
the pulse width modulation module outputs the first signal and the second signal through a second output port;
wherein the first output port and the second output port share a pin.
The soc chip described above, wherein the frequency of the pulse signal is 800 kHz.
In the soc chip, a voltage value of the feedback signal in the second feedback state is 1.16V.
In the soc chip, a voltage value of the feedback signal in the third feedback state is 0.86V.
In the soc chip, a voltage value of the feedback signal in the first feedback state is between 0.87V and 1.15V.
The above system-on-chip, wherein the resolution of the feedback signal is 10 mV.
Has the advantages that: the system-on-chip provided by the invention can be compatible with the condition that the duty ratio of the output pulse signal is 0 and 1, and the duty ratio range of the signal output by the pulse width modulation module is expanded.
Drawings
FIG. 1 is a waveform diagram of a pulse signal according to an embodiment of the present invention;
FIG. 2 is a waveform diagram of a first signal according to an embodiment of the present invention;
FIG. 3 is a waveform diagram of a second signal according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a package of a SoC chip according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a power module according to an embodiment of the invention.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
In a preferred embodiment, a system-on-chip is provided, which comprises a central processing unit and a video processing module connected with each other; the video processing module transmits a feedback signal to the central processing unit in real time according to the self-operation power consumption requirement; the central processing unit outputs a corresponding control instruction to the pulse width modulation module according to the state of the feedback signal; the method can also comprise the following steps:
the pulse width modulation module is connected with the central processing unit;
the feedback signal has a first feedback state, a second feedback state and a third feedback state;
the pulse width modulation module receives and selects to operate in a first mode corresponding to the first feedback state, a second mode corresponding to the second feedback state or a third mode corresponding to the third feedback state according to the control instruction;
the power supply module is respectively connected with the pulse width modulation module and the central processing unit;
when the pulse width modulation module operates in a first mode, outputting a pulse signal with a duty ratio larger than 0 and smaller than 1 to the power supply module;
when the pulse width modulation module operates in a second mode, outputting a first signal with a constant level value of 0 to the power supply module;
when the pulse width modulation module operates in a third mode, outputting a second signal with a constant level value of 1 to the power supply module;
and the power supply module supplies power to the central processing unit according to the pulse signal.
In the above technical solution, as shown in fig. 1 to fig. 3, the pulse width modulation module in the first mode outputs the pulse signal whose level value is a normal value, taking the resolution of the duty ratio as 0.01 as an example, the duty ratio of the pulse signal in the first mode may be any value of 0.01 to 0.99; compared with the traditional technology which can not output the pulse signal with the duty ratio of 0 or 1, the pulse width modulation module has the advantages that the second mode is added, the first signal with the level value of 0 is output by the pulse width modulation module in the second mode, and the first signal is equivalent to the pulse signal with the duty ratio of 0; and a third mode is added, wherein the output of the pulse width modulation module in the third mode is a second signal with the level value of 1, which is equivalent to a pulse signal with the duty ratio of 1; the level value here refers to a digital concept, and the actual voltage value thereof can be set according to actual conditions; the resolution of the duty cycle may also be other than 0.01 and is not to be considered as limiting the invention; the higher the power consumption required by the video processing module is, the higher the power supply module is to provide a power supply with higher power to the central processing unit; on the contrary, the lower the power consumption required by the video processing module, the lower the power supply module only needs to provide power supply with lower power to the central processing unit.
In a preferred embodiment, a switch for controlling the output pulse signal is arranged in the pulse width modulation module;
the control command comprises a switch control command and a level control command, and the level control command has a first control state and a second control state;
when the switch is switched off under the control of the switch control instruction, the pulse width modulation module works in a first mode;
when the switch is switched on under the control of the switch control instruction and the level control instruction is in a first control state, the pulse width modulation module works in a second mode;
when the switch is switched on under the control of the switch control instruction and the level control instruction is in the second control state, the pulse width modulation module works in the third mode.
In a preferred embodiment, the central processing unit is connected to the video processing module through an information amount monitoring port to monitor and output a corresponding control command to the pulse width modulation module according to the state of a feedback signal at the information amount monitoring port.
As shown in fig. 4, in a preferred embodiment, the pwm module outputs the pulse signal through a first output port;
the pulse width modulation module outputs a first signal and a second signal through a second output port;
the first output port and the second output port share one pin.
In the technical scheme, the first output port and the second output port share one pin to form a composite pin Core _ PWM, so that the pulse signal, the first signal and the second signal are all output from the same composite pin Core _ PWM without adding extra pins and connecting wires; the second Output port may be a GPIO (General Purpose Input/Output, GPIO for short) port.
In a preferred embodiment, the frequency of the pulse signal may be 800kHz, and in other cases, the pulse signal may be a pulse signal with other frequencies, and is particularly suitable for a pulse signal with a high frequency.
In a preferred embodiment, the voltage value of the feedback signal in the second feedback state may be 1.16V.
In a preferred embodiment, the voltage value of the feedback signal in the third feedback state may be 0.86V.
In a preferred embodiment, the voltage value of the feedback signal in the first feedback state may be between 0.87V and 1.15V, such as 0.89V, or 0.92V, or 0.95V, or 1.10V.
In a preferred embodiment, the resolution of the feedback signal may be 10mV, which is a preferred case, and in other cases, the feedback signal may be of other resolutions.
Specifically, the settings can be made as follows:
Figure BDA0001584200470000071
in the above table, the column where step is located indicates the resolution of the feedback signal, the column where VDDCPU is located indicates the voltage value (unit is V) output by the power module under different resolutions, the column where dutyH reg is located indicates the register configuration high level duty ratio, the column where dutyL reg is located indicates the register configuration low level ratio, the column where dutyH is located indicates the high level duty ratio of the pulse signal, the column where dutyL is located indicates the low level duty ratio of the pulse signal, the column where VDDIO is 3.3V indicates the power supply standard voltage for the pulse width modulation module, the column where VDDIO is 3.15V indicates the power supply minimum voltage for the pulse width modulation module, and the column where VDDIO is 3.45V indicates the power supply maximum voltage for the pulse width modulation module; the standard uses VDDIO 3.3V for power supply, and the lists of VDDIO 3.15V and VDDIO 3.45V are used to illustrate that the power supply voltage itself for the pwm module may have errors, and there may be small deviations if the power supply voltages are different.
In summary, the system-on-chip provided by the present invention includes a central processing unit and a video processing module connected to each other; the video processing module transmits a feedback signal to the central processing unit in real time according to the self-operation power consumption requirement; the central processing unit outputs a corresponding control instruction to the pulse width modulation module according to the state of the feedback signal; the method can also comprise the following steps: the pulse width modulation module is connected with the central processing unit; the feedback signal has a first feedback state, a second feedback state and a third feedback state; the pulse width modulation module receives and selects to operate in a first mode corresponding to the first feedback state, a second mode corresponding to the second feedback state or a third mode corresponding to the third feedback state according to the control instruction; the power supply module is respectively connected with the pulse width modulation module and the central processing unit; when the pulse width modulation module operates in a first mode, outputting a pulse signal with a duty ratio larger than 0 and smaller than 1 to the power supply module; when the pulse width modulation module operates in a second mode, outputting a first signal with a constant level value of 0 to the power supply module; when the pulse width modulation module operates in a third mode, outputting a second signal with a constant level value of 1 to the power supply module; the power supply module supplies power to the central processing unit according to the pulse signal; the conditions that the duty ratio of the output pulse signal is 0 and 1 can be compatible, and the duty ratio range of the signal output by the pulse width modulation module is expanded.
While the specification concludes with claims defining exemplary embodiments of particular structures for practicing the invention, it is believed that other modifications will be made in the spirit of the invention. While the above invention sets forth presently preferred embodiments, these are not intended as limitations.
Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above description. Therefore, the appended claims should be construed to cover all such variations and modifications as fall within the true spirit and scope of the invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to be within the intent and scope of the present invention.

Claims (8)

1. A system-on-chip comprises a central processing unit and a video processing module which are connected; the video processing module is characterized in that the video processing module transmits a feedback signal to the central processing unit in real time according to the self-operation power consumption requirement; the central processing unit outputs a corresponding control instruction to the pulse width modulation module according to the state of the feedback signal; further comprising:
the pulse width modulation module is connected with the central processing unit;
the feedback signal has a first feedback state, a second feedback state and a third feedback state;
the pulse width modulation module receives and selects to operate in a first mode corresponding to the first feedback state, a second mode corresponding to the second feedback state or a third mode corresponding to the third feedback state according to the control instruction;
the power supply module is respectively connected with the pulse width modulation module and the central processing unit;
when the pulse width modulation module operates in the first mode, outputting a pulse signal with a duty ratio larger than 0 and smaller than 1 to the power supply module;
when the pulse width modulation module operates in the second mode, outputting a first signal with a constant level value of 0 to the power supply module;
when the pulse width modulation module operates in the third mode, outputting a second signal with a constant level value of 1 to the power supply module;
the power supply module supplies power to the central processing unit according to the pulse signal; a switch for controlling the output of the pulse signal is arranged in the pulse width modulation module;
the control command comprises a switch control command and a level control command, and the level control command has a first control state and a second control state;
when the switch is switched off under the control of the switch control instruction, the pulse width modulation module works in the first mode;
when the switch is switched on under the control of the switch control instruction and the level control instruction is in the first control state, the pulse width modulation module works in the second mode;
and when the switch is switched on under the control of the switch control instruction and the level control instruction is in the second control state, the pulse width modulation module works in the third mode.
2. The soc chip according to claim 1, wherein the cpu is connected to the video processing module through an information amount monitoring port to monitor and output the corresponding control command to the pwm module according to a state of the feedback signal at the information amount monitoring port.
3. The soc chip of claim 1, wherein the pwm module outputs the pulse signal through a first output port;
the pulse width modulation module outputs the first signal and the second signal through a second output port;
wherein the first output port and the second output port share a pin.
4. The soc chip of claim 1, wherein the pulse signal has a frequency of 800 kHz.
5. The soc chip of claim 1, wherein the voltage value of the feedback signal in the second feedback state is 1.16V.
6. The soc chip of claim 1, wherein the voltage value of the feedback signal in the third feedback state is 0.86V.
7. The soc chip of claim 1, wherein the voltage of the feedback signal in the first feedback state is between 0.87V and 1.15V.
8. The soc chip of claim 1, wherein the feedback signal has a resolution of 10 mV.
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